/[gxemul]/trunk/src/include/machine.h
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Contents of /trunk/src/include/machine.h

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Revision 32 - (show annotations)
Mon Oct 8 16:20:58 2007 UTC (16 years, 5 months ago) by dpavlin
File MIME type: text/plain
File size: 15946 byte(s)
++ trunk/HISTORY	(local)
$Id: HISTORY,v 1.1421 2006/11/06 05:32:37 debug Exp $
20060816	Adding a framework for emulated/virtual timers (src/timer.c),
		using only setitimer().
		Rewriting the mc146818 to use the new timer framework.
20060817	Adding a call to gettimeofday() every now and then (once every
		second, at the moment) to resynch the timer if it drifts.
		Beginning to convert the ISA timer interrupt mechanism (8253
		and 8259) to use the new timer framework.
		Removing the -I command line option.
20060819	Adding the -I command line option again, with new semantics.
		Working on Footbridge timer interrupts; NetBSD/NetWinder and
		NetBSD/CATS now run at correct speed, but unfortunately with
		HUGE delays during bootup.
20060821	Some minor m68k updates. Adding the first instruction: nop. :)
		Minor Alpha emulation updates.
20060822	Adding a FreeBSD development specific YAMON environment
		variable ("khz") (as suggested by Bruce M. Simpson).
		Moving YAMON environment variable initialization from
		machine_evbmips.c into promemul/yamon.c, and adding some more
		variables.
		Continuing on the LCA PCI bus controller (for Alpha machines).
20060823	Continuing on the timer stuff: experimenting with MIPS count/
		compare interrupts connected to the timer framework.
20060825	Adding bogus SCSI commands 0x51 (SCSICDROM_READ_DISCINFO) and
		0x52 (SCSICDROM_READ_TRACKINFO) to the SCSI emulation layer,
		to allow NetBSD/pmax 4.0_BETA to be installed from CDROM.
		Minor updates to the LCA PCI controller.
20060827	Implementing a CHIP8 cpu mode, and a corresponding CHIP8
		machine, for fun. Disassembly support for all instructions,
		and most of the common instructions have been implemented: mvi,
		mov_imm, add_imm, jmp, rand, cls, sprite, skeq_imm, jsr,
		skne_imm, bcd, rts, ldr, str, mov, or, and, xor, add, sub,
		font, ssound, sdelay, gdelay, bogus skup/skpr, skeq, skne.
20060828	Beginning to convert the CHIP8 cpu in the CHIP8 machine to a
		(more correct) RCA 180x cpu. (Disassembly for all 1802
		instructions has been implemented, but no execution yet, and
		no 1805 extended instructions.)
20060829	Minor Alpha emulation updates.
20060830	Beginning to experiment a little with PCI IDE for SGI O2.
		Fixing the cursor key mappings for MobilePro 770 emulation.
		Fixing the LK201 warning caused by recent NetBSD/pmax.
		The MIPS R41xx standby, suspend, and hibernate instructions now
		behave like the RM52xx/MIPS32/MIPS64 wait instruction.
		Fixing dev_wdc so it calculates correct (64-bit) offsets before
		giving them to diskimage_access().
20060831	Continuing on Alpha emulation (OSF1 PALcode).
20060901	Minor Alpha updates; beginning on virtual memory pagetables.
		Removed the limit for max nr of devices (in preparation for
		allowing devices' base addresses to be changed during runtime).
		Adding a hack for MIPS [d]mfc0 select 0 (except the count
		register), so that the coproc register is simply copied.
		The MIPS suspend instruction now exits the emulator, instead
		of being treated as a wait instruction (this causes NetBSD/
		hpcmips to get correct 'halt' behavior).
		The VR41xx RTC now returns correct time.
		Connecting the VR41xx timer to the timer framework (fixed at
		128 Hz, for now).
		Continuing on SPARC emulation, adding more instructions:
		restore, ba_xcc, ble. The rectangle drawing demo works :)
		Removing the last traces of the old ENABLE_CACHE_EMULATION
		MIPS stuff (not usable with dyntrans anyway).
20060902	Splitting up src/net.c into several smaller files in its own
		subdirectory (src/net/).
20060903	Cleanup of the files in src/net/, to make them less ugly.
20060904	Continuing on the 'settings' subsystem.
		Minor progress on the SPARC emulation mode.
20060905	Cleanup of various things, and connecting the settings
		infrastructure to various subsystems (emul, machine, cpu, etc).
		Changing the lk201 mouse update routine to not rely on any
		emulated hardware framebuffer cursor coordinates, but instead
		always do (semi-usable) relative movements.
20060906	Continuing on the lk201 mouse stuff. Mouse behaviour with
		multiple framebuffers (which was working in Ultrix) is now
		semi-broken (but it still works, in a way).
		Moving the documentation about networking into its own file
		(networking.html), and refreshing it a bit. Adding an example
		of how to use ethernet frame direct-access (udp_snoop).
20060907	Continuing on the settings infrastructure.
20060908	Minor updates to SH emulation: for 32-bit emulation: delay
		slots and the 'jsr @Rn' instruction. I'm putting 64-bit SH5 on
		ice, for now.
20060909-10	Implementing some more 32-bit SH instructions. Removing the
		64-bit mode completely. Enough has now been implemented to run
		the rectangle drawing demo. :-)
20060912	Adding more SH instructions.
20060916	Continuing on SH emulation (some more instructions: div0u,
		div1, rotcl/rotcr, more mov instructions, dt, braf, sets, sett,
		tst_imm, dmuls.l, subc, ldc_rm_vbr, movt, clrt, clrs, clrmac).
		Continuing on the settings subsystem (beginning on reading/
		writing settings, removing bugs, and connecting more cpus to
		the framework).
20060919	More work on SH emulation; adding an ldc banked instruction,
		and attaching a 640x480 framebuffer to the Dreamcast machine
		mode (NetBSD/dreamcast prints the NetBSD copyright banner :-),
		and then panics).
20060920	Continuing on the settings subsystem.
20060921	Fixing the Footbridge timer stuff so that NetBSD/cats and
		NetBSD/netwinder boot up without the delays.
20060922	Temporarily hardcoding MIPS timer interrupt to 100 Hz. With
		'wait' support disabled, NetBSD/malta and Linux/malta run at
		correct speed.
20060923	Connecting dev_gt to the timer framework, so that NetBSD/cobalt
		runs at correct speed.
		Moving SH4-specific memory mapped registers into its own
		device (dev_sh4.c).
		Running with -N now prints "idling" instead of bogus nr of
		instrs/second (which isn't valid anyway) while idling.
20060924	Algor emulation should now run at correct speed.
		Adding disassembly support for some MIPS64 revision 2
		instructions: ext, dext, dextm, dextu.
20060926	The timer framework now works also when the MIPS wait
		instruction is used.
20060928	Re-implementing checks for coprocessor availability for MIPS
		cop0 instructions. (Thanks to Carl van Schaik for noticing the
		lack of cop0 availability checks.)
20060929	Implementing an instruction combination hack which treats
		NetBSD/pmax' idle loop as a wait-like instruction.
20060930	The ENTRYHI_R_MASK was missing in (at least) memory_mips_v2p.c,
		causing TLB lookups to sometimes succeed when they should have
		failed. (A big thank you to Juli Mallett for noticing the
		problem.)
		Adding disassembly support for more MIPS64 revision 2 opcodes
		(seb, seh, wsbh, jalr.hb, jr.hb, synci, ins, dins, dinsu,
		dinsm, dsbh, dshd, ror, dror, rorv, drorv, dror32). Also
		implementing seb, seh, dsbh, dshd, and wsbh.
		Implementing an instruction combination hack for Linux/pmax'
		idle loop, similar to the NetBSD/pmax case.
20061001	Changing the NetBSD/sgimips install instructions to extract
		files from an iso image, instead of downloading them via ftp.
20061002	More-than-31-bit userland addresses in memory_mips_v2p.c were
		not actually working; applying a fix from Carl van Schaik to
		enable them to work + making some other updates (adding kuseg
		support).
		Fixing hpcmips (vr41xx) timer initialization.
		Experimenting with O(n)->O(1) reduction in the MIPS TLB lookup
		loop. Seems to work both for R3000 and non-R3000.
20061003	Continuing a little on SH emulation (adding more control
		registers; mini-cleanup of memory_sh.c).
20061004	Beginning on a dev_rtc, a clock/timer device for the test
		machines; also adding a demo, and some documentation.
		Fixing a bug in SH "mov.w @(disp,pc),Rn" (the result wasn't
		sign-extended), and adding the addc and ldtlb instructions.
20061005	Contining on SH emulation: virtual to physical address
		translation, and a skeleton exception mechanism.
20061006	Adding more SH instructions (various loads and stores, rte,
		negc, muls.w, various privileged register-move instructions).
20061007	More SH instructions: various move instructions, trapa, div0s,
		float, fdiv, ftrc.
		Continuing on dev_rtc; removing the rtc demo.
20061008	Adding a dummy Dreamcast PROM module. (Homebrew Dreamcast
		programs using KOS libs need this.)
		Adding more SH instructions: "stc vbr,rn", rotl, rotr, fsca,
		fmul, fadd, various floating-point moves, etc. A 256-byte
		demo for Dreamcast runs :-)
20061012	Adding the SH "lds Rm,pr" and bsr instructions.
20061013	More SH instructions: "sts fpscr,rn", tas.b, and some more
		floating point instructions, cmp/str, and more moves.
		Adding a dummy dev_pvr (Dreamcast graphics controller).
20061014	Generalizing the expression evaluator (used in the built-in
		debugger) to support parentheses and +-*/%^&|.
20061015	Removing the experimental tlb index hint code in
		mips_memory_v2p.c, since it didn't really have any effect.
20061017	Minor SH updates; adding the "sts pr,Rn", fcmp/gt, fneg,
		frchg, and some other instructions. Fixing missing sign-
		extension in an 8-bit load instruction.
20061019	Adding a simple dev_dreamcast_rtc.
		Implementing memory-mapped access to the SH ITLB/UTLB arrays.
20061021	Continuing on various SH and Dreamcast things: sh4 timers,
		debug messages for dev_pvr, fixing some virtual address
		translation bugs, adding the bsrf instruction.
		The NetBSD/dreamcast GENERIC_MD kernel now reaches userland :)
		Adding a dummy dev_dreamcast_asic.c (not really useful yet).
		Implementing simple support for Store Queues.
		Beginning on the PVR Tile Accelerator.
20061022	Generalizing the PVR framebuffer to support off-screen drawing,
		multiple bit-depths, etc. (A small speed penalty, but most
		likely worth it.)
		Adding more SH instructions (mulu.w, fcmp/eq, fsub, fmac,
		fschg, and some more); correcting bugs in "fsca" and "float".
20061024	Adding the SH ftrv (matrix * vector) instruction. Marcus
		Comstedt's "tatest" example runs :) (wireframe only).
		Correcting disassembly for SH floating point instructions that
		use the xd* registers.
		Adding the SH fsts instruction.
		In memory_device_dyntrans_access(), only the currently used
		range is now invalidated, and not the entire device range.
20061025	Adding a dummy AVR32 cpu mode skeleton.
20061026	Various Dreamcast updates; beginning on a Maple bus controller.
20061027	Continuing on the Maple bus. A bogus Controller, Keyboard, and
		Mouse can now be detected by NetBSD and KOS homebrew programs.
		Cleaning up the SH4 Timer Management Unit, and beginning on
		SH4 interrupts.
		Implementing the Dreamcast SYSASIC.
20061028	Continuing on the SYSASIC.
		Adding the SH fsqrt instruction.
		memory_sh.c now actually scans the ITLB.
		Fixing a bug in dev_sh4.c, related to associative writes into
		the memory-mapped UTLB array. NetBSD/dreamcast now reaches
		userland stably, and prints the "Terminal type?" message :-]
		Implementing enough of the Dreamcast keyboard to make NetBSD
		accept it for input.
		Enabling SuperH for stable (non-development) builds.
		Adding NetBSD/dreamcast to the documentation, although it
		doesn't support root-on-nfs yet.
20061029	Changing usleep(1) calls in the debugger to to usleep(10000)
		(according to Brian Foley, this makes GXemul run better on
		MacOS X).
		Making the Maple "Controller" do something (enough to barely
		interact with dcircus.elf).
20061030-31	Some progress on the PVR. More test programs start running (but
		with strange output).
		Various other SH4-related updates.
20061102	Various Dreamcast and SH4 updates; more KOS demos run now.
20061104	Adding a skeleton dev_mb8696x.c (the Dreamcast's LAN adapter).
20061105	Continuing on the MB8696x; NetBSD/dreamcast detects it as mbe0.
		Testing for the release.

==============  RELEASE 0.4.3  ==============


1 #ifndef MACHINE_H
2 #define MACHINE_H
3
4 /*
5 * Copyright (C) 2005-2006 Anders Gavare. All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions are met:
9 *
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 * 3. The name of the author may not be used to endorse or promote products
16 * derived from this software without specific prior written permission.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
19 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28 * SUCH DAMAGE.
29 *
30 *
31 * $Id: machine.h,v 1.136 2006/10/25 09:24:06 debug Exp $
32 */
33
34 #include <sys/types.h>
35 #include <sys/time.h>
36
37 #include "debugger_gdb.h"
38 #include "symbol.h"
39
40 #include "machine_arc.h"
41 #include "machine_pmax.h"
42 #include "machine_x86.h"
43
44
45 #define MAX_BREAKPOINTS 8
46 #define BREAKPOINT_FLAG_R 1
47
48 #define MAX_TICK_FUNCTIONS 16
49
50 #define MAX_STATISTICS_FIELDS 8
51
52 struct cpu_family;
53 struct diskimage;
54 struct emul;
55 struct fb_window;
56 struct memory;
57 struct of_data;
58 struct settings;
59
60 /* Ugly: */
61 struct kn230_csr;
62 struct kn02_csr;
63 struct dec_ioasic_data;
64 struct ps2_data;
65 struct footbridge_data;
66 struct dec5800_data;
67 struct au1x00_ic_data;
68 struct malta_data;
69 struct vr41xx_data;
70 struct jazz_data;
71 struct crime_data;
72 struct mace_data;
73 struct sgi_ip20_data;
74 struct sgi_ip22_data;
75 struct sgi_ip30_data;
76
77 struct isa_pic_data {
78 struct pic8259_data *pic1;
79 struct pic8259_data *pic2;
80
81 int *pending_timer_interrupts;
82 int last_int;
83
84 int native_irq;
85 int native_secondary_irq;
86 uint8_t secondary_mask1;
87 };
88
89
90 struct machine_bus {
91 struct machine_bus *next;
92
93 char *name;
94
95 void (*debug_dump)(void *);
96 void *extra;
97 };
98
99
100 struct machine {
101 /* Pointer back to the emul struct we are in: */
102 struct emul *emul;
103
104 /* Settings: */
105 struct settings *settings;
106
107 /* Name as choosen by the user: */
108 char *name;
109
110 int arch; /* ARCH_MIPS, ARCH_PPC, .. */
111 int machine_type; /* MACHINE_PMAX, .. */
112 int machine_subtype; /* MACHINE_DEC_3MAX_5000, .. */
113
114 int cycle_accurate; /* Set to non-zero for cycle
115 accurate (slow) emulation. */
116
117 /* Name set by code in src/machines/machine_*.c: */
118 char *machine_name;
119
120 int stable; /* startup warning for non-stable
121 emulation modes. */
122
123 /* The serial number is mostly used when emulating multiple machines
124 in a network. nr_of_nics is the current nr of network cards, which
125 is useful when emulating multiple cards in one machine: */
126 int serial_nr;
127 int nr_of_nics;
128
129 /* TODO: How about multiple cpu familys in one machine? */
130 struct cpu_family *cpu_family;
131
132 /*
133 * The "mainbus":
134 *
135 * o) memory
136 * o) devices
137 * o) CPUs
138 */
139
140 struct memory *memory;
141
142 int main_console_handle;
143
144 /* Hardware devices, run every x clock cycles. */
145 int n_tick_entries;
146 int ticks_till_next[MAX_TICK_FUNCTIONS];
147 int ticks_reset_value[MAX_TICK_FUNCTIONS];
148 void (*tick_func[MAX_TICK_FUNCTIONS])(struct cpu *, void *);
149 void *tick_extra[MAX_TICK_FUNCTIONS];
150 double tick_hz[MAX_TICK_FUNCTIONS];
151
152 void (*md_interrupt)(struct machine *m, struct cpu *cpu,
153 int irq_nr, int assert);
154
155 char *cpu_name; /* TODO: remove this, there could be several
156 cpus with different names in a machine */
157 int byte_order_override;
158 int bootstrap_cpu;
159 int use_random_bootstrap_cpu;
160 int start_paused;
161 int ncpus;
162 struct cpu **cpus;
163
164 /* Registered busses: */
165 struct machine_bus *first_bus;
166 int n_busses;
167
168 /* These are used by stuff in cpu.c, mostly: */
169 int64_t ninstrs;
170 int64_t ninstrs_show;
171 int64_t ninstrs_flush;
172 int64_t ninstrs_since_gettimeofday;
173 struct timeval starttime;
174
175 struct diskimage *first_diskimage;
176
177 struct symbol_context symbol_context;
178
179 int random_mem_contents;
180 int physical_ram_in_mb;
181 int memory_offset_in_mb;
182 int prom_emulation;
183 int register_dump;
184 int arch_pagesize;
185
186 int bootdev_type;
187 int bootdev_id;
188 char *bootstr;
189 char *bootarg;
190
191 struct debugger_gdb gdb;
192
193 /* Breakpoints: */
194 int n_breakpoints;
195 char *breakpoint_string[MAX_BREAKPOINTS];
196 uint64_t breakpoint_addr[MAX_BREAKPOINTS];
197 int breakpoint_flags[MAX_BREAKPOINTS];
198
199 /* Cache sizes: (1 << x) x=0 for default values */
200 /* TODO: these are _PER CPU_! */
201 int cache_picache;
202 int cache_pdcache;
203 int cache_secondary;
204 int cache_picache_linesize;
205 int cache_pdcache_linesize;
206 int cache_secondary_linesize;
207
208 int dbe_on_nonexistant_memaccess;
209 int instruction_trace;
210 int show_nr_of_instructions;
211 int show_trace_tree;
212 int show_symbolic_register_names;
213 int emulated_hz;
214 int allow_instruction_combinations;
215 char *userland_emul; /* NULL for no userland emulation */
216 int force_netboot;
217 int slow_serial_interrupts_hack_for_linux;
218 uint64_t file_loaded_end_addr;
219 char *boot_kernel_filename;
220 char *boot_string_argument;
221 int exit_without_entering_debugger;
222 int n_gfx_cards;
223
224 /* Instruction statistics: */
225 char *statistics_filename;
226 FILE *statistics_file;
227 int statistics_enabled;
228 char *statistics_fields; /* "vpi" etc. */
229
230 /* Machine-dependent: (PROM stuff, etc.) */
231 union {
232 struct machine_arcbios arc;
233 struct machine_pmax pmax;
234 struct machine_pc pc;
235 } md;
236
237 /* OpenFirmware: */
238 struct of_data *of_data;
239
240 /* Bus-specific interrupt data: */
241 struct isa_pic_data isa_pic_data;
242
243 /* Machine-dependent interrupt specific structs: */
244 union {
245 struct kn230_csr *kn230_csr;
246 struct kn02_csr *kn02_csr;
247 struct dec_ioasic_data *dec_ioasic_data;
248 struct ps2_data *ps2_data;
249 struct dec5800_data *dec5800_csr;
250 struct au1x00_ic_data *au1x00_ic_data;
251 struct vr41xx_data *vr41xx_data;
252 struct jazz_data *jazz_data;
253 struct malta_data *malta_data;
254 struct sgi_ip20_data *sgi_ip20_data;
255 struct sgi_ip22_data *sgi_ip22_data;
256 struct sgi_ip30_data *sgi_ip30_data;
257 struct {
258 struct crime_data *crime_data;
259 struct mace_data *mace_data;
260 } ip32;
261 struct footbridge_data *footbridge_data;
262 struct bebox_data *bebox_data;
263 struct prep_data *prep_data;
264 struct cpc700_data *cpc700_data;
265 struct gc_data *gc_data;
266 struct v3_data *v3_data;
267 } md_int;
268
269 /* X11/framebuffer stuff: */
270 int use_x11;
271 int x11_scaledown;
272 int x11_scaleup;
273 int x11_n_display_names;
274 char **x11_display_names;
275 int x11_current_display_name_nr; /* updated by x11.c */
276
277 int n_fb_windows;
278 struct fb_window **fb_windows;
279 };
280
281
282 /* Tick function "prototype": */
283 #define DEVICE_TICK(x) void dev_ ## x ## _tick(struct cpu *cpu, void *extra)
284
285
286 /*
287 * Machine emulation types:
288 */
289
290 #define ARCH_NOARCH 0
291 #define ARCH_MIPS 1
292 #define ARCH_PPC 2
293 #define ARCH_SPARC 3
294 #define ARCH_ALPHA 4
295 #define ARCH_X86 5
296 #define ARCH_ARM 6
297 #define ARCH_IA64 7
298 #define ARCH_M68K 8
299 #define ARCH_SH 9
300 #define ARCH_HPPA 10
301 #define ARCH_I960 11
302 #define ARCH_AVR 12
303 #define ARCH_TRANSPUTER 13
304 #define ARCH_RCA180X 14
305 #define ARCH_AVR32 15
306
307 /* MIPS: */
308 #define MACHINE_BAREMIPS 1000
309 #define MACHINE_TESTMIPS 1001
310 #define MACHINE_PMAX 1002
311 #define MACHINE_COBALT 1003
312 #define MACHINE_HPCMIPS 1004
313 #define MACHINE_PS2 1005
314 #define MACHINE_SGI 1006
315 #define MACHINE_ARC 1007
316 #define MACHINE_NETGEAR 1008
317 #define MACHINE_SONYNEWS 1009
318 #define MACHINE_EVBMIPS 1010
319 #define MACHINE_PSP 1011
320 #define MACHINE_ALGOR 1012
321 #define MACHINE_QEMU_MIPS 1013
322
323 /* PPC: */
324 #define MACHINE_BAREPPC 2000
325 #define MACHINE_TESTPPC 2001
326 #define MACHINE_WALNUT 2002
327 #define MACHINE_PMPPC 2003
328 #define MACHINE_SANDPOINT 2004
329 #define MACHINE_BEBOX 2005
330 #define MACHINE_PREP 2006
331 #define MACHINE_MACPPC 2007
332 #define MACHINE_DB64360 2008
333 #define MACHINE_MVMEPPC 2009
334
335 /* SPARC: */
336 #define MACHINE_BARESPARC 3000
337 #define MACHINE_TESTSPARC 3001
338 #define MACHINE_SPARC 3002
339
340 /* Alpha: */
341 #define MACHINE_BAREALPHA 4000
342 #define MACHINE_TESTALPHA 4001
343 #define MACHINE_ALPHA 4002
344
345 /* X86: */
346 #define MACHINE_BAREX86 5000
347 #define MACHINE_X86 5001
348
349 /* ARM: */
350 #define MACHINE_BAREARM 6000
351 #define MACHINE_TESTARM 6001
352 #define MACHINE_CATS 6002
353 #define MACHINE_HPCARM 6003
354 #define MACHINE_ZAURUS 6004
355 #define MACHINE_NETWINDER 6005
356 #define MACHINE_SHARK 6006
357 #define MACHINE_IQ80321 6007
358 #define MACHINE_IYONIX 6008
359 #define MACHINE_TS7200 6009
360 #define MACHINE_QEMU_ARM 6010
361
362 /* IA64: */
363 #define MACHINE_BAREIA64 7000
364 #define MACHINE_TESTIA64 7001
365
366 /* M68K: */
367 #define MACHINE_BAREM68K 8000
368 #define MACHINE_TESTM68K 8001
369
370 /* SH: */
371 #define MACHINE_BARESH 9000
372 #define MACHINE_TESTSH 9001
373 #define MACHINE_HPCSH 9002
374 #define MACHINE_DREAMCAST 9003
375
376 /* HPPA: */
377 #define MACHINE_BAREHPPA 10000
378 #define MACHINE_TESTHPPA 10001
379
380 /* I960: */
381 #define MACHINE_BAREI960 11000
382 #define MACHINE_TESTI960 11001
383
384 /* AVR: */
385 #define MACHINE_BAREAVR 12000
386 #define MACHINE_AVR_PAL 12001
387 #define MACHINE_AVR_MAHPONG 12002
388
389 /* TRANSPUTER: */
390 #define MACHINE_BARETRANSPUTER 13000
391
392 /* ARCH_RCA180X: */
393 #define MACHINE_BARE180X 14000
394 #define MACHINE_CHIP8 14001
395
396 /* AVR32: */
397 #define MACHINE_BAREAVR32 15000
398 #define MACHINE_TESTAVR32 15001
399
400 /* Other "pseudo"-machines: */
401 #define MACHINE_NONE 0
402 #define MACHINE_USERLAND 100000
403
404 /* DEC: */
405 #define MACHINE_DEC_PMAX_3100 1
406 #define MACHINE_DEC_3MAX_5000 2
407 #define MACHINE_DEC_3MIN_5000 3
408 #define MACHINE_DEC_3MAXPLUS_5000 4
409 #define MACHINE_DEC_5800 5
410 #define MACHINE_DEC_5400 6
411 #define MACHINE_DEC_MAXINE_5000 7
412 #define MACHINE_DEC_5500 11
413 #define MACHINE_DEC_MIPSMATE_5100 12
414
415 #define DEC_PROM_CALLBACK_STRUCT 0xffffffffbfc04000ULL
416 #define DEC_PROM_EMULATION 0xffffffffbfc08000ULL
417 #define DEC_PROM_INITIAL_ARGV (INITIAL_STACK_POINTER + 0x80)
418 #define DEC_PROM_STRINGS 0xffffffffbfc20000ULL
419 #define DEC_PROM_TCINFO 0xffffffffbfc2c000ULL
420 #define DEC_MEMMAP_ADDR 0xffffffffbfc30000ULL
421
422 /* HPCmips: */
423 #define MACHINE_HPCMIPS_CASIO_BE300 1
424 #define MACHINE_HPCMIPS_CASIO_E105 2
425 #define MACHINE_HPCMIPS_NEC_MOBILEPRO_770 3
426 #define MACHINE_HPCMIPS_NEC_MOBILEPRO_780 4
427 #define MACHINE_HPCMIPS_NEC_MOBILEPRO_800 5
428 #define MACHINE_HPCMIPS_NEC_MOBILEPRO_880 6
429 #define MACHINE_HPCMIPS_AGENDA_VR3 7
430 #define MACHINE_HPCMIPS_IBM_WORKPAD_Z50 8
431
432 /* HPCarm: */
433 #define MACHINE_HPCARM_IPAQ 1
434 #define MACHINE_HPCARM_JORNADA720 2
435
436 /* HPCsh: */
437 #define MACHINE_HPCSH_JORNADA680 1
438 #define MACHINE_HPCSH_JORNADA690 2
439
440 /* SGI and ARC: */
441 #define MACHINE_ARC_NEC_RD94 1
442 #define MACHINE_ARC_JAZZ_PICA 2
443 #define MACHINE_ARC_NEC_R94 3
444 #define MACHINE_ARC_DESKTECH_TYNE 4
445 #define MACHINE_ARC_JAZZ_MAGNUM 5
446 #define MACHINE_ARC_NEC_R98 6
447 #define MACHINE_ARC_JAZZ_M700 7
448 #define MACHINE_ARC_NEC_R96 8
449
450 /* Algor: */
451 #define MACHINE_ALGOR_P4032 4
452 #define MACHINE_ALGOR_P5064 5
453
454 /* EVBMIPS: */
455 #define MACHINE_EVBMIPS_MALTA 1
456 #define MACHINE_EVBMIPS_MALTA_BE 2
457 #define MACHINE_EVBMIPS_MESHCUBE 3
458 #define MACHINE_EVBMIPS_PB1000 4
459
460 /* PReP: */
461 #define MACHINE_PREP_IBM6050 1
462 #define MACHINE_PREP_MVME2400 2
463
464 /* Sun SPARC: */
465 #define MACHINE_SPARC_SS5 1
466 #define MACHINE_SPARC_SS20 2
467 #define MACHINE_SPARC_ULTRA1 3
468 #define MACHINE_SPARC_ULTRA60 4
469
470 /* MacPPC: TODO: Real model names */
471 #define MACHINE_MACPPC_G3 1
472 #define MACHINE_MACPPC_G4 2
473 #define MACHINE_MACPPC_G5 3
474
475 /* MVMEPPC */
476 #define MACHINE_MVMEPPC_1600 1
477 #define MACHINE_MVMEPPC_2100 2
478 #define MACHINE_MVMEPPC_5500 3
479
480 /* X86: */
481 #define MACHINE_X86_GENERIC 1
482 #define MACHINE_X86_XT 2
483
484
485 /* For the automachine system: */
486 struct machine_entry_subtype {
487 int machine_subtype;/* Old-style subtype */
488 const char *name; /* Official name */
489 int n_aliases;
490 char **aliases; /* Aliases */
491 };
492
493 struct machine_entry {
494 struct machine_entry *next;
495
496 /* Machine type: */
497 int arch;
498 int machine_type; /* Old-style type */
499 const char *name; /* Official name */
500 int n_aliases;
501 char **aliases; /* Aliases */
502
503 void (*setup)(struct machine *, struct cpu *);
504 void (*set_default_cpu)(struct machine *);
505 void (*set_default_ram)(struct machine *);
506
507 /* Machine subtypes: */
508 int n_subtypes;
509 struct machine_entry_subtype **subtype;
510 };
511
512 #define MACHINE_SETUP_TYPE(n) void (*n)(struct machine *, struct cpu *)
513 #define MACHINE_SETUP(x) void machine_setup_ ## x(struct machine *machine, \
514 struct cpu *cpu)
515 #define MACHINE_DEFAULT_CPU(x) void machine_default_cpu_ ## x(struct machine *machine)
516 #define MACHINE_DEFAULT_RAM(x) void machine_default_ram_ ## x(struct machine *machine)
517 #define MACHINE_REGISTER(x) void machine_register_ ## x(void)
518 #define MR_DEFAULT(x,name,arch,type) struct machine_entry \
519 *me = machine_entry_new(name,arch,type); \
520 me->setup = machine_setup_ ## x; \
521 me->set_default_cpu = machine_default_cpu_ ## x; \
522 machine_entry_register(me, arch);
523 void automachine_init(void);
524
525
526 /* machine.c: */
527 struct machine *machine_new(char *name, struct emul *emul);
528 void machine_destroy(struct machine *machine);
529 int machine_name_to_type(char *stype, char *ssubtype,
530 int *type, int *subtype, int *arch);
531 void machine_add_tickfunction(struct machine *machine,
532 void (*func)(struct cpu *, void *), void *extra,
533 int clockshift, double hz);
534 void machine_statistics_init(struct machine *, char *fname);
535 void machine_register(char *name, MACHINE_SETUP_TYPE(setup));
536 void dump_mem_string(struct cpu *cpu, uint64_t addr);
537 void store_string(struct cpu *cpu, uint64_t addr, char *s);
538 int store_64bit_word(struct cpu *cpu, uint64_t addr, uint64_t data64);
539 int store_32bit_word(struct cpu *cpu, uint64_t addr, uint64_t data32);
540 int store_16bit_word(struct cpu *cpu, uint64_t addr, uint64_t data16);
541 void store_byte(struct cpu *cpu, uint64_t addr, uint8_t data);
542 void store_64bit_word_in_host(struct cpu *cpu, unsigned char *data,
543 uint64_t data32);
544 void store_32bit_word_in_host(struct cpu *cpu, unsigned char *data,
545 uint64_t data32);
546 void store_16bit_word_in_host(struct cpu *cpu, unsigned char *data,
547 uint16_t data16);
548 uint64_t load_64bit_word(struct cpu *cpu, uint64_t addr);
549 uint32_t load_32bit_word(struct cpu *cpu, uint64_t addr);
550 uint16_t load_16bit_word(struct cpu *cpu, uint64_t addr);
551 void store_buf(struct cpu *cpu, uint64_t addr, char *s, size_t len);
552 void add_environment_string(struct cpu *cpu, char *s, uint64_t *addr);
553 void add_environment_string_dual(struct cpu *cpu,
554 uint64_t *ptrp, uint64_t *addrp, char *s1, char *s2);
555 void store_pointer_and_advance(struct cpu *cpu, uint64_t *addrp,
556 uint64_t data, int flag64);
557 void machine_setup(struct machine *);
558 void machine_memsize_fix(struct machine *);
559 void machine_default_cputype(struct machine *);
560 void machine_dumpinfo(struct machine *);
561 void machine_bus_register(struct machine *, char *busname,
562 void (*debug_dump)(void *), void *extra);
563 int machine_run(struct machine *machine);
564 void machine_list_available_types_and_cpus(void);
565 struct machine_entry *machine_entry_new(const char *name,
566 int arch, int oldstyle_type);
567 void machine_entry_add_alias(struct machine_entry *me, const char *name);
568 void machine_entry_add_subtype(struct machine_entry *me, const char *name,
569 int oldstyle_subtype, ...);
570 void machine_entry_register(struct machine_entry *me, int arch);
571 void machine_init(void);
572
573
574 #endif /* MACHINE_H */

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