/[gxemul]/trunk/src/include/machine.h
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Revision 12 - (hide annotations)
Mon Oct 8 16:18:38 2007 UTC (16 years, 5 months ago) by dpavlin
File MIME type: text/plain
File size: 11702 byte(s)
++ trunk/HISTORY	(local)
$Id: HISTORY,v 1.905 2005/08/16 09:16:24 debug Exp $
20050628	Continuing the work on the ARM translation engine. end_of_page
		works. Experimenting with load/store translation caches
		(virtual -> physical -> host).
20050629	More ARM stuff (memory access translation cache, mostly). This
		might break a lot of stuff elsewhere, probably some MIPS-
		related translation things.
20050630	Many load/stores are now automatically generated and included
		into cpu_arm_instr.c; 1024 functions in total (!).
		Fixes based on feedback from Alec Voropay: only print 8 hex
		digits instead of 16 in some cases when emulating 32-bit
		machines; similar 8 vs 16 digit fix for breakpoint addresses;
		4Kc has 16 TLB entries, not 48; the MIPS config select1
		register is now printed with "reg ,0".
		Also changing many other occurances of 16 vs 8 digit output.
		Adding cache associativity fields to mips_cpu_types.h; updating
		some other cache fields; making the output of
		mips_cpu_dumpinfo() look nicer.
		Generalizing the bintrans stuff for device accesses to also
		work with the new translation system. (This might also break
		some MIPS things.)
		Adding multi-load/store instructions to the ARM disassembler
		and the translator, and some optimizations of various kinds.
20050701	Adding a simple dev_disk (it can read/write sectors from
		disk images).
20050712	Adding dev_ether (a simple ethernet send/receive device).
		Debugger command "ninstrs" for toggling show_nr_of_instructions
		during runtime.
		Removing the framebuffer logo.
20050713	Continuing on dev_ether.
		Adding a dummy cpu_alpha (again).
20050714	More work on cpu_alpha.
20050715	More work on cpu_alpha. Many instructions work, enough to run
		a simple framebuffer fill test (similar to the ARM test).
20050716	More Alpha stuff.
20050717	Minor updates (Alpha stuff).
20050718	Minor updates (Alpha stuff).
20050719	Generalizing some Alpha instructions.
20050720	More Alpha-related updates.
20050721	Continuing on cpu_alpha. Importing rpb.h from NetBSD/alpha.
20050722	Alpha-related updates: userland stuff (Hello World using
		write() compiled statically for FreeBSD/Alpha runs fine), and
		more instructions are now implemented.
20050723	Fixing ldq_u and stq_u.
		Adding more instructions (conditional moves, masks, extracts,
		shifts).
20050724	More FreeBSD/Alpha userland stuff, and adding some more
		instructions (inserts).
20050725	Continuing on the Alpha stuff. (Adding dummy ldt/stt.)
		Adding a -A command line option to turn off alignment checks
		in some cases (for translated code).
		Trying to remove the old bintrans code which updated the pc
		and nr_of_executed_instructions for every instruction.
20050726	Making another attempt att removing the pc/nr of instructions
		code. This time it worked, huge performance increase for
		artificial test code, but performance loss for real-world
		code :-( so I'm scrapping that code for now.
		Tiny performance increase on Alpha (by using ret instead of
		jmp, to play nice with the Alpha's branch prediction) for the
		old MIPS bintrans backend.
20050727	Various minor fixes and cleanups.
20050728	Switching from a 2-level virtual to host/physical translation
		system for ARM emulation, to a 1-level translation.
		Trying to switch from 2-level to 1-level for the MIPS bintrans
		system as well (Alpha only, so far), but there is at least one
		problem: caches and/or how they work with device mappings.
20050730	Doing the 2-level to 1-level conversion for the i386 backend.
		The cache/device bug is still there for R2K/3K :(
		Various other minor updates (Malta etc).
		The mc146818 clock now updates the UIP bit in a way which works
		better with Linux for at least sgimips and Malta emulation.
		Beginning the work on refactoring the dyntrans system.
20050731	Continuing the dyntrans refactoring.
		Fixing a small but serious host alignment bug in memory_rw.
		Adding support for big-endian load/stores to the i386 bintrans
		backend.
		Another minor i386 bintrans backend update: stores from the
		zero register are now one (or two) loads shorter.
		The slt and sltu instructions were incorrectly implemented for
		the i386 backend; only using them for 32-bit mode for now.
20050801	Continuing the dyntrans refactoring.
		Cleanup of the ns16550 serial controller (removing unnecessary
		code).
		Bugfix (memory corruption bug) in dev_gt, and a patch/hack from
		Alec Voropay for Linux/Malta.
20050802	More cleanup/refactoring of the dyntrans subsystem: adding
		phys_page pointers to the lookup tables, for quick jumps
		between translated pages.
		Better fix for the ns16550 device (but still no real FIFO
		functionality).
		Converting cpu_ppc to the new dyntrans system. This means that
		I will have to start from scratch with implementing each
		instruction, and figure out how to implement dual 64/32-bit
		modes etc.
		Removing the URISC CPU family, because it was useless.
20050803	When selecting a machine type, the main type can now be omitted
		if the subtype name is unique. (I.e. -E can be omitted.)
		Fixing a dyntrans/device update bug. (Writes to offset 0 of
		a device could sometimes go unnoticed.)
		Adding an experimental "instruction combination" hack for
		ARM for memset-like byte fill loops.
20050804	Minor progress on cpu_alpha and related things.
		Finally fixing the MIPS dmult/dmultu bugs.
		Fixing some minor TODOs.
20050805	Generalizing the 8259 PIC. It now also works with Cobalt
		and evbmips emulation, in addition to the x86 hack.
		Finally converting the ns16550 device to use devinit.
		Continuing the work on the dyntrans system. Thinking about
		how to add breakpoints.
20050806	More dyntrans updates. Breakpoints seem to work now.
20050807	Minor updates: cpu_alpha and related things; removing
		dev_malta (as it isn't used any more).
		Dyntrans: working on general "show trace tree" support.
		The trace tree stuff now works with both the old MIPS code and
		with newer dyntrans modes. :)
		Continuing on Alpha-related stuff (trying to get *BSD to boot
		a bit further, adding more instructions, etc).
20050808	Adding a dummy IA64 cpu family, and continuing the refactoring
		of the dyntrans system.
		Removing the regression test stuff, because it was more or
		less useless.
		Adding loadlinked/storeconditional type instructions to the
		Alpha emulation. (Needed for Linux/alpha. Not very well tested
		yet.)
20050809	The function call trace tree now prints a per-function nr of
		arguments. (Semi-meaningless, since that data isn't read yet
		from the ELFs; some hardcoded symbols such as memcpy() and
		strlen() work fine, though.)
		More dyntrans refactoring; taking out more of the things that
		are common to all cpu families.
20050810	Working on adding support for "dual mode" for PPC dyntrans
		(i.e. both 64-bit and 32-bit modes).
		(Re)adding some simple PPC instructions.
20050811	Adding a dummy M68K cpu family. The dyntrans system isn't ready
		for variable-length ISAs yet, so it's completely bogus so far.
		Re-adding more PPC instructions.
		Adding a hack to src/file.c which allows OpenBSD/mac68k a.out
		kernels to be loaded.
		Beginning to add PPC loads/stores. So far they only work in
		32-bit mode.
20050812	The configure file option "add_remote" now accepts symbolic
		host names, in addition to numeric IPv4 addresses.
		Re-adding more PPC instructions.
20050814	Continuing to port back more PPC instructions.
		Found and fixed the cache/device write-update bug for 32-bit
		MIPS bintrans. :-)
		Triggered a really weird and annoying bug in Compaq's C
		compiler; ccc sometimes outputs code which loads from an
		address _before_ checking whether the pointer was NULL or not.
		(I'm not sure how to handle this problem.)
20050815	Removing all of the old x86 instruction execution code; adding
		a new (dummy) dyntrans module for x86.
		Taking the first steps to extend the dyntrans system to support
		variable-length instructions.
		Slowly preparing for the next release.
20050816	Adding a dummy SPARC cpu module.
		Minor updates (documentation etc) for the release.

==============  RELEASE 0.3.5  ==============


1 dpavlin 4 #ifndef MACHINE_H
2     #define MACHINE_H
3    
4     /*
5     * Copyright (C) 2005 Anders Gavare. All rights reserved.
6     *
7     * Redistribution and use in source and binary forms, with or without
8     * modification, are permitted provided that the following conditions are met:
9     *
10     * 1. Redistributions of source code must retain the above copyright
11     * notice, this list of conditions and the following disclaimer.
12     * 2. Redistributions in binary form must reproduce the above copyright
13     * notice, this list of conditions and the following disclaimer in the
14     * documentation and/or other materials provided with the distribution.
15     * 3. The name of the author may not be used to endorse or promote products
16     * derived from this software without specific prior written permission.
17     *
18     * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
19     * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20     * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21     * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
22     * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
23     * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
24     * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
25     * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
26     * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
27     * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28     * SUCH DAMAGE.
29     *
30     *
31 dpavlin 12 * $Id: machine.h,v 1.67 2005/08/16 05:37:13 debug Exp $
32 dpavlin 4 */
33    
34     #include <sys/types.h>
35     #include <sys/time.h>
36    
37     #include "symbol.h"
38    
39 dpavlin 6 #include "arcbios.h"
40     #include "machine_x86.h"
41 dpavlin 4
42     #define MAX_BREAKPOINTS 8
43     #define BREAKPOINT_FLAG_R 1
44    
45     #define MAX_TICK_FUNCTIONS 14
46    
47     struct cpu_family;
48     struct diskimage;
49     struct emul;
50     struct fb_window;
51     struct memory;
52    
53     /* Ugly: */
54     struct kn230_csr;
55     struct kn02_csr;
56     struct dec_ioasic_data;
57     struct ps2_data;
58     struct dec5800_data;
59     struct au1x00_ic_data;
60 dpavlin 10 struct malta_data;
61 dpavlin 4 struct vr41xx_data;
62     struct jazz_data;
63     struct crime_data;
64     struct mace_data;
65     struct sgi_ip20_data;
66     struct sgi_ip22_data;
67     struct sgi_ip30_data;
68 dpavlin 12 struct isa_pic_data {
69     struct pic8259_data *pic1;
70     struct pic8259_data *pic2;
71     };
72 dpavlin 4
73 dpavlin 12
74 dpavlin 10 #define MACHINE_NAME_MAXBUF 200
75    
76 dpavlin 4 struct machine {
77     /* Pointer back to the emul struct we are in: */
78     struct emul *emul;
79    
80     /* Name as choosen by the user: */
81     char *name;
82    
83     int arch; /* ARCH_MIPS, ARCH_PPC, .. */
84     int machine_type; /* MACHINE_DEC, .. */
85     int machine_subtype; /* MACHINE_DEC_3MAX_5000, .. */
86    
87     char *machine_name;
88    
89     /* The serial number is mostly used when emulating multiple machines
90     in a network. nr_of_nics is the current nr of network cards, which
91     is useful when emulating multiple cards in one machine: */
92     int serial_nr;
93     int nr_of_nics;
94    
95     struct cpu_family *cpu_family;
96    
97     /*
98     * The "mainbus":
99     *
100     * o) memory
101     * o) devices
102     * o) CPUs
103     */
104    
105     struct memory *memory;
106    
107     int main_console_handle;
108    
109     /* Hardware devices, run every x clock cycles. */
110     int n_tick_entries;
111     int ticks_till_next[MAX_TICK_FUNCTIONS];
112     int ticks_reset_value[MAX_TICK_FUNCTIONS];
113     void (*tick_func[MAX_TICK_FUNCTIONS])(struct cpu *, void *);
114     void *tick_extra[MAX_TICK_FUNCTIONS];
115    
116     void (*md_interrupt)(struct machine *m, struct cpu *cpu,
117     int irq_nr, int assert);
118    
119     char *cpu_name; /* TODO: remove this, there could be several
120     cpus with different names in a machine */
121     int byte_order_override;
122     int bootstrap_cpu;
123     int use_random_bootstrap_cpu;
124     int start_paused;
125     int ncpus;
126     struct cpu **cpus;
127    
128     /* These are used by stuff in cpu.c, mostly: */
129     int64_t ncycles;
130     int64_t ncycles_show;
131     int64_t ncycles_flush;
132 dpavlin 10 int64_t ncycles_since_gettimeofday;
133     struct timeval starttime;
134 dpavlin 4 int a_few_cycles;
135     int a_few_instrs;
136    
137     struct diskimage *first_diskimage;
138    
139     struct symbol_context symbol_context;
140    
141     int random_mem_contents;
142     int physical_ram_in_mb;
143     int memory_offset_in_mb;
144     int prom_emulation;
145     int register_dump;
146 dpavlin 12 int arch_pagesize;
147 dpavlin 4
148     int n_breakpoints;
149     char *breakpoint_string[MAX_BREAKPOINTS];
150     uint64_t breakpoint_addr[MAX_BREAKPOINTS];
151     int breakpoint_flags[MAX_BREAKPOINTS];
152    
153     /* Cache sizes: (1 << x) x=0 for default values */
154     /* TODO: these are _PER CPU_! */
155     int cache_picache;
156     int cache_pdcache;
157     int cache_secondary;
158     int cache_picache_linesize;
159     int cache_pdcache_linesize;
160     int cache_secondary_linesize;
161    
162     int dbe_on_nonexistant_memaccess;
163 dpavlin 12 int dyntrans_alignment_check;
164 dpavlin 4 int bintrans_enable;
165     int old_bintrans_enable;
166     int bintrans_enabled_from_start;
167     int bintrans_size;
168     int instruction_trace;
169     int single_step_on_bad_addr;
170     int show_nr_of_instructions;
171     int show_symbolic_register_names;
172     int64_t max_instructions;
173     int emulated_hz;
174     int max_random_cycles_per_chunk;
175     int speed_tricks;
176     char *userland_emul; /* NULL for no userland emulation */
177     int force_netboot;
178     int slow_serial_interrupts_hack_for_linux;
179     uint64_t file_loaded_end_addr;
180     char *boot_kernel_filename;
181     char *boot_string_argument;
182    
183     int automatic_clock_adjustment;
184     int exit_without_entering_debugger;
185     int show_trace_tree;
186    
187     int n_gfx_cards;
188    
189 dpavlin 6 /* Machine-dependent: (PROM stuff, etc.) */
190     union {
191     struct machine_arcbios arc;
192     struct machine_pc pc;
193     } md;
194 dpavlin 4
195 dpavlin 6 /* Machine-dependent interrupt specific structs: */
196     union {
197     struct kn230_csr *kn230_csr;
198     struct kn02_csr *kn02_csr;
199     struct dec_ioasic_data *dec_ioasic_data;
200     struct ps2_data *ps2_data;
201     struct dec5800_data *dec5800_csr;
202     struct au1x00_ic_data *au1x00_ic_data;
203     struct vr41xx_data *vr41xx_data;
204     struct jazz_data *jazz_data;
205 dpavlin 10 struct malta_data *malta_data;
206 dpavlin 12 struct isa_pic_data isa_pic_data;
207 dpavlin 6 struct sgi_ip20_data *sgi_ip20_data;
208     struct sgi_ip22_data *sgi_ip22_data;
209     struct sgi_ip30_data *sgi_ip30_data;
210     struct {
211     struct crime_data *crime_data;
212     struct mace_data *mace_data;
213     } ip32;
214     } md_int;
215    
216 dpavlin 4 /* X11/framebuffer stuff: */
217     int use_x11;
218     int x11_scaledown;
219     int x11_n_display_names;
220     char **x11_display_names;
221     int x11_current_display_name_nr; /* updated by x11.c */
222    
223     int n_fb_windows;
224     struct fb_window **fb_windows;
225     };
226    
227    
228     /*
229     * Machine emulation types:
230     */
231    
232     #define ARCH_NOARCH 0
233     #define ARCH_MIPS 1
234     #define ARCH_PPC 2
235     #define ARCH_SPARC 3
236 dpavlin 12 #define ARCH_ALPHA 4
237     #define ARCH_X86 5
238     #define ARCH_ARM 6
239     #define ARCH_IA64 7
240     #define ARCH_M68K 8
241 dpavlin 4
242     /* MIPS: */
243     #define MACHINE_BAREMIPS 1000
244     #define MACHINE_TESTMIPS 1001
245     #define MACHINE_DEC 1002
246     #define MACHINE_COBALT 1003
247     #define MACHINE_HPCMIPS 1004
248     #define MACHINE_PS2 1005
249     #define MACHINE_SGI 1006
250     #define MACHINE_ARC 1007
251     #define MACHINE_MESHCUBE 1008
252     #define MACHINE_NETGEAR 1009
253 dpavlin 6 #define MACHINE_SONYNEWS 1010
254 dpavlin 8 #define MACHINE_EVBMIPS 1011
255 dpavlin 10 #define MACHINE_PSP 1012
256 dpavlin 4
257     /* PPC: */
258     #define MACHINE_BAREPPC 2000
259     #define MACHINE_TESTPPC 2001
260     #define MACHINE_WALNUT 2002
261     #define MACHINE_PMPPC 2003
262     #define MACHINE_SANDPOINT 2004
263     #define MACHINE_BEBOX 2005
264     #define MACHINE_PREP 2006
265     #define MACHINE_MACPPC 2007
266     #define MACHINE_DB64360 2008
267    
268     /* SPARC: */
269     #define MACHINE_BARESPARC 3000
270 dpavlin 12 #define MACHINE_TESTSPARC 3001
271     #define MACHINE_ULTRA1 3002
272 dpavlin 4
273     /* Alpha: */
274 dpavlin 12 #define MACHINE_BAREALPHA 4000
275     #define MACHINE_TESTALPHA 4001
276     #define MACHINE_ALPHA 4002
277 dpavlin 4
278     /* X86: */
279 dpavlin 12 #define MACHINE_BAREX86 5000
280     #define MACHINE_X86 5001
281 dpavlin 4
282 dpavlin 6 /* ARM: */
283 dpavlin 12 #define MACHINE_BAREARM 6000
284     #define MACHINE_TESTARM 6001
285 dpavlin 6
286 dpavlin 12 /* IA64: */
287     #define MACHINE_BAREIA64 7000
288     #define MACHINE_TESTIA64 7001
289    
290     /* M68K: */
291     #define MACHINE_BAREM68K 8000
292     #define MACHINE_TESTM68K 8001
293    
294 dpavlin 4 /* Other "pseudo"-machines: */
295     #define MACHINE_NONE 0
296     #define MACHINE_USERLAND 100000
297    
298     /* DEC: */
299     #define MACHINE_DEC_PMAX_3100 1
300     #define MACHINE_DEC_3MAX_5000 2
301     #define MACHINE_DEC_3MIN_5000 3
302     #define MACHINE_DEC_3MAXPLUS_5000 4
303     #define MACHINE_DEC_5800 5
304     #define MACHINE_DEC_5400 6
305     #define MACHINE_DEC_MAXINE_5000 7
306     #define MACHINE_DEC_5500 11
307     #define MACHINE_DEC_MIPSMATE_5100 12
308    
309     #define DEC_PROM_CALLBACK_STRUCT 0xffffffffbfc04000ULL
310     #define DEC_PROM_EMULATION 0xffffffffbfc08000ULL
311     #define DEC_PROM_INITIAL_ARGV (INITIAL_STACK_POINTER + 0x80)
312     #define DEC_PROM_STRINGS 0xffffffffbfc20000ULL
313     #define DEC_PROM_TCINFO 0xffffffffbfc2c000ULL
314     #define DEC_MEMMAP_ADDR 0xffffffffbfc30000ULL
315    
316     /* HPCmips: */
317     #define MACHINE_HPCMIPS_CASIO_BE300 1
318     #define MACHINE_HPCMIPS_CASIO_E105 2
319     #define MACHINE_HPCMIPS_NEC_MOBILEPRO_770 3
320     #define MACHINE_HPCMIPS_NEC_MOBILEPRO_780 4
321     #define MACHINE_HPCMIPS_NEC_MOBILEPRO_800 5
322     #define MACHINE_HPCMIPS_NEC_MOBILEPRO_880 6
323     #define MACHINE_HPCMIPS_AGENDA_VR3 7
324     #define MACHINE_HPCMIPS_IBM_WORKPAD_Z50 8
325    
326     /* Playstation 2: */
327     #define PLAYSTATION2_BDA 0xffffffffa0001000ULL
328     #define PLAYSTATION2_OPTARGS 0xffffffff81fff100ULL
329     #define PLAYSTATION2_SIFBIOS 0xffffffffbfc10000ULL
330    
331     /* SGI and ARC: */
332     #define MACHINE_ARC_NEC_RD94 1
333     #define MACHINE_ARC_JAZZ_PICA 2
334     #define MACHINE_ARC_NEC_R94 3
335     #define MACHINE_ARC_DESKTECH_TYNE 4
336     #define MACHINE_ARC_JAZZ_MAGNUM 5
337     #define MACHINE_ARC_NEC_R98 6
338     #define MACHINE_ARC_JAZZ_M700 7
339     #define MACHINE_ARC_NEC_R96 8
340    
341 dpavlin 8 /* EVBMIPS: */
342     #define MACHINE_EVBMIPS_MALTA 1
343 dpavlin 12 #define MACHINE_EVBMIPS_MALTA_BE 2
344     #define MACHINE_EVBMIPS_PB1000 3
345 dpavlin 8
346 dpavlin 4 /* MacPPC: TODO: Real model names */
347     #define MACHINE_MACPPC_G4 1
348     #define MACHINE_MACPPC_G5 2
349    
350 dpavlin 6 /* X86: */
351     #define MACHINE_X86_GENERIC 1
352     #define MACHINE_X86_XT 2
353 dpavlin 4
354 dpavlin 6
355 dpavlin 4 /*
356     * Problem: kernels seem to be loaded at low addresses in RAM, so
357     * storing environment strings and memory descriptors there is a bad
358     * idea. They are stored at 0xbfc..... instead. The ARC SPB must
359     * be at physical address 0x1000 though.
360     */
361     #define SGI_SPB_ADDR 0xffffffff80001000ULL
362     /* 0xbfc10000 is firmware callback vector stuff */
363     #define ARC_FIRMWARE_VECTORS 0xffffffffbfc80000ULL
364     #define ARC_FIRMWARE_ENTRIES 0xffffffffbfc88000ULL
365     #define ARC_ARGV_START 0xffffffffbfc90000ULL
366     #define ARC_ENV_STRINGS 0xffffffffbfc98000ULL
367     #define ARC_ENV_POINTERS 0xffffffffbfc9d000ULL
368     #define SGI_SYSID_ADDR 0xffffffffbfca1800ULL
369     #define ARC_DSPSTAT_ADDR 0xffffffffbfca1c00ULL
370     #define ARC_MEMDESC_ADDR 0xffffffffbfca1c80ULL
371     #define ARC_CONFIG_DATA_ADDR 0xffffffffbfca2000ULL
372     #define FIRST_ARC_COMPONENT 0xffffffffbfca8000ULL
373     #define ARC_PRIVATE_VECTORS 0xffffffffbfcb0000ULL
374     #define ARC_PRIVATE_ENTRIES 0xffffffffbfcb8000ULL
375    
376    
377     /* machine.c: */
378     struct machine *machine_new(char *name, struct emul *emul);
379     int machine_name_to_type(char *stype, char *ssubtype,
380     int *type, int *subtype, int *arch);
381     void machine_add_tickfunction(struct machine *machine,
382     void (*func)(struct cpu *, void *), void *extra, int clockshift);
383     void dump_mem_string(struct cpu *cpu, uint64_t addr);
384     void store_string(struct cpu *cpu, uint64_t addr, char *s);
385     int store_64bit_word(struct cpu *cpu, uint64_t addr, uint64_t data64);
386     int store_32bit_word(struct cpu *cpu, uint64_t addr, uint64_t data32);
387     int store_16bit_word(struct cpu *cpu, uint64_t addr, uint64_t data16);
388 dpavlin 6 void store_byte(struct cpu *cpu, uint64_t addr, uint8_t data);
389 dpavlin 4 void store_64bit_word_in_host(struct cpu *cpu, unsigned char *data,
390     uint64_t data32);
391     void store_32bit_word_in_host(struct cpu *cpu, unsigned char *data,
392     uint64_t data32);
393     void store_16bit_word_in_host(struct cpu *cpu, unsigned char *data,
394     uint16_t data16);
395     uint32_t load_32bit_word(struct cpu *cpu, uint64_t addr);
396     uint16_t load_16bit_word(struct cpu *cpu, uint64_t addr);
397     void store_buf(struct cpu *cpu, uint64_t addr, char *s, size_t len);
398     void machine_setup(struct machine *);
399     void machine_memsize_fix(struct machine *);
400     void machine_default_cputype(struct machine *);
401     void machine_dumpinfo(struct machine *);
402     void machine_list_available_types_and_cpus(void);
403     void machine_init(void);
404    
405    
406     #endif /* MACHINE_H */

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