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#ifndef INR_H |
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#define INR_H |
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|
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/* |
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* Copyright (C) 2007 Anders Gavare. All rights reserved. |
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* |
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* Redistribution and use in source and binary forms, with or without |
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* modification, are permitted provided that the following conditions are met: |
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* |
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* 1. Redistributions of source code must retain the above copyright |
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* notice, this list of conditions and the following disclaimer. |
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* 2. Redistributions in binary form must reproduce the above copyright |
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* notice, this list of conditions and the following disclaimer in the |
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* documentation and/or other materials provided with the distribution. |
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* 3. The name of the author may not be used to endorse or promote products |
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* derived from this software without specific prior written permission. |
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* |
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND |
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE |
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS |
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) |
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY |
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF |
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* SUCH DAMAGE. |
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* |
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* |
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* $Id: inr.h,v 1.2 2007/03/31 15:11:26 debug Exp $ |
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* |
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* Intermediate Native Representation |
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* |
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* Data structures etc. used during native code generation. |
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*/ |
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|
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#ifndef NATIVE_CODE_GENERATION |
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#error Huh? inr.h should not be included. |
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#endif |
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|
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|
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struct inr_entry { |
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int opcode; |
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size_t arg1; |
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size_t arg2; |
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size_t arg3; |
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}; |
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|
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/* |
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* The way these defines are named works as follows: |
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* |
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* INR_OPCODE_opcodename[_args[..]] |
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* |
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* where args usually is something like this: |
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* |
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* xCR32 32-bit register offset, struct cpu relative |
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* xCR64 64-bit register offset, struct cpu relative |
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* IS16 immediate signed 16-bit |
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* IS32 immediate signed 32-bit |
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* IU16 immediate unsigned 16-bit |
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* IU32 immediate unsigned 32-bit |
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* |
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* Prefixes are: |
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* |
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* S source |
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* D destination |
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*/ |
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|
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#define INR_OPCODE_UNKNOWN 0 |
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|
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/* Misc.: */ |
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#define INR_OPCODE_NOP 1 |
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|
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/* Arithmetic: */ |
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#define INR_OPCODE_XOR_DCR32_SCR32_IS16 2 |
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#define INR_OPCODE_OR_DCR32_SCR32_IS16 3 |
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|
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|
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/* |
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* Max nr of intermediate opcodes in the inr_entries array. The most common |
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* case is that one "basic block" of the emulated machine code is translated, |
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* so this should be large enough to hold a large basic block plus margin. |
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*/ |
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#define INR_MAX_ENTRIES 128 |
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|
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struct inr { |
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struct inr_entry *inr_entries; |
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int nr_inr_entries_used; |
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|
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uint64_t paddr; |
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}; |
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|
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|
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#endif /* INR_H */ |