/[gxemul]/trunk/src/include/if_lereg.h
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Contents of /trunk/src/include/if_lereg.h

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Revision 4 - (show annotations)
Mon Oct 8 16:18:00 2007 UTC (16 years, 6 months ago) by dpavlin
File MIME type: text/plain
File size: 13255 byte(s) 
++ trunk/HISTORY	(local)
$Id: HISTORY,v 1.707 2005/04/27 16:37:33 debug Exp $
20050408	Some minor updates to the wdc. Linux now doesn't complain
		anymore if a disk is non-present.
20050409	Various minor fixes (a bintrans bug, and some other things).
		The wdc seems to work with Playstation2 emulation, but there
		is a _long_ annoying delay when disks are detected.
		Fixing a really important bintrans bug (when devices and RAM
		are mixed within 4KB pages), which was triggered with
		NetBSD/playstation2 kernels.
20050410	Adding a dummy dev_ps2_ether (just so that NetBSD doesn't
		complain as much during bootup).
		Symbols starting with '$' are now ignored.
		Renaming dev_ps2_ohci.c to dev_ohci.c, etc.
20050411	Moving the bintrans-cache-isolation check from cpu_mips.c to
		cpu_mips_coproc.c. (I thought this would give a speedup, but
		it's not noticable.)
		Better playstation2 sbus interrupt code.
		Skip ahead many ticks if the count register is read manually.
		(This increases the speed of delay-loops that simply read
		the count register.)
20050412	Updates to the playstation2 timer/interrupt code.
		Some other minor updates.
20050413	NetBSD/cobalt runs from a disk image :-) including userland;
		updating the documentation on how to install NetBSD/cobalt
		using NetBSD/pmax (!).
		Some minor bintrans updates (no real speed improvement) and
		other minor updates (playstation2 now uses the -o options).
20050414	Adding a dummy x86 (and AMD64) mode.
20050415	Adding some (32-bit and 16-bit) x86 instructions.
		Adding some initial support for non-SCSI, non-IDE floppy
		images. (The x86 mode can boot from these, more or less.)
		Moving the devices/ and include/ directories to src/devices/
		and src/include/, respectively.
20050416	Continuing on the x86 stuff. (Adding pc_bios.c and some simple
		support for software interrupts in 16-bit mode.)
20050417	Ripping out most of the x86 instruction decoding stuff, trying
		to rewrite it in a cleaner way.
		Disabling some of the least working CPU families in the
		configure script (sparc, x86, alpha, hppa), so that they are
		not enabled by default.
20050418	Trying to fix the bug which caused problems when turning on
		and off bintrans interactively, by flushing the bintrans cache
		whenever bintrans is manually (re)enabled.
20050419	Adding the 'lswi' ppc instruction.
		Minor updates to the x86 instruction decoding.
20050420	Renaming x86 register name indices from R_xx to X86_R_xx (this
		makes building on Tru64 nicer).
20050422	Adding a check for duplicate MIPS TLB entries on tlbwr/tlbwi.
20050427	Adding screenshots to guestoses.html.
		Some minor fixes and testing for the next release.

==============  RELEASE 0.3.2  ==============
1 /* gxemul: $Id: if_lereg.h,v 1.4 2005/03/05 12:34:02 debug Exp $ */
2 /* $NetBSD: if_lereg.h,v 1.4 1994/10/26 21:09:08 cgd Exp $ */
3
4 #ifndef IF_LEREG_H
5 #define IF_LEREG_H
6
7 /*-
8 * Copyright (c) 1992, 1993
9 * The Regents of the University of California. All rights reserved.
10 *
11 * This code is derived from software contributed to Berkeley by
12 * Ralph Campbell and Rick Macklem.
13 *
14 * Redistribution and use in source and binary forms, with or without
15 * modification, are permitted provided that the following conditions
16 * are met:
17 * 1. Redistributions of source code must retain the above copyright
18 * notice, this list of conditions and the following disclaimer.
19 * 2. Redistributions in binary form must reproduce the above copyright
20 * notice, this list of conditions and the following disclaimer in the
21 * documentation and/or other materials provided with the distribution.
22 * 3. All advertising materials mentioning features or use of this software
23 * must display the following acknowledgement:
24 * This product includes software developed by the University of
25 * California, Berkeley and its contributors.
26 * 4. Neither the name of the University nor the names of its contributors
27 * may be used to endorse or promote products derived from this software
28 * without specific prior written permission.
29 *
30 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
31 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
32 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
33 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
34 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
35 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
36 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
37 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
38 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
39 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
40 * SUCH DAMAGE.
41 *
42 * @(#)if_lereg.h 8.1 (Berkeley) 6/10/93
43 */
44
45 #define LEMTU 1518
46 #define LEBLEN 1520 /* LEMTU up to a multiple of 16 */
47 #define LEMINSIZE 60 /* should be 64 if mode DTCR is set */
48 #define LERBUF 32
49 #define LERBUFLOG2 5
50 #define LE_RLEN (LERBUFLOG2 << 13)
51 #define LETBUF 8
52 #define LETBUFLOG2 3
53 #define LE_TLEN (LETBUFLOG2 << 13)
54
55 /*
56 * LANCE registers.
57 */
58 struct lereg1 {
59 u_short ler1_rdp; /* data port */
60 short pad0;
61 u_short ler1_rap; /* register select port */
62 short pad1;
63 };
64
65 /*
66 * This structure is overlayed on the network dual-port RAM.
67 * Currently 32 * 1520 receive plus 8 * 1520 transmit buffers plus
68 * buffer descriptor rings.
69 * There are two variants of the structure, one for the Pmax/3min/maxine
70 * with 2 byte pads between entries and one for the 3max and turbochannel
71 * option densely packed.
72 */
73 struct lermd { /* +0x0020 */
74 u_short rmd0;
75 u_short rmd1;
76 short rmd2;
77 u_short rmd3;
78 };
79
80 struct letmd { /* +0x0058 */
81 u_short tmd0;
82 u_short tmd1;
83 short tmd2;
84 u_short tmd3;
85 };
86
87 struct lermdpad { /* +0x0020 */
88 u_short rmd0;
89 short pad0;
90 u_short rmd1;
91 short pad1;
92 short rmd2;
93 short pad2;
94 u_short rmd3;
95 short pad3;
96 };
97
98 struct letmdpad { /* +0x0058 */
99 u_short tmd0;
100 short pad0;
101 u_short tmd1;
102 short pad1;
103 short tmd2;
104 short pad2;
105 u_short tmd3;
106 short pad3;
107 };
108
109 struct lereg2 {
110 /* init block */ /* CHIP address */
111 u_short ler2_mode; /* +0x0000 */
112 u_short ler2_padr0; /* +0x0002 */
113 u_short ler2_padr1; /* +0x0004 */
114 u_short ler2_padr2; /* +0x0006 */
115 u_short ler2_ladrf0; /* +0x0008 */
116 u_short ler2_ladrf1; /* +0x000A */
117 u_short ler2_ladrf2; /* +0x000C */
118 u_short ler2_ladrf3; /* +0x000E */
119 u_short ler2_rdra; /* +0x0010 */
120 u_short ler2_rlen; /* +0x0012 */
121 u_short ler2_tdra; /* +0x0014 */
122 u_short ler2_tlen; /* +0x0016 */
123 short pad0[4]; /* Pad to 16 shorts */
124 /* receive message descriptors */
125 struct lermd ler2_rmd[LERBUF];
126 /* transmit message descriptors */
127 struct letmd ler2_tmd[LETBUF];
128 char ler2_rbuf[LERBUF][LEBLEN]; /* +0x0060 */
129 char ler2_tbuf[LETBUF][LEBLEN]; /* +0x2FD0 */
130 };
131
132 struct lereg2pad {
133 /* init block */ /* CHIP address */
134 u_short ler2_mode; /* +0x0000 */
135 short pad0;
136 u_short ler2_padr0; /* +0x0002 */
137 short pad1;
138 u_short ler2_padr1; /* +0x0004 */
139 short pad2;
140 u_short ler2_padr2; /* +0x0006 */
141 short pad3;
142 u_short ler2_ladrf0; /* +0x0008 */
143 short pad4;
144 u_short ler2_ladrf1; /* +0x000A */
145 short pad5;
146 u_short ler2_ladrf2; /* +0x000C */
147 short pad6;
148 u_short ler2_ladrf3; /* +0x000E */
149 short pad7;
150 u_short ler2_rdra; /* +0x0010 */
151 short pad8;
152 u_short ler2_rlen; /* +0x0012 */
153 short pad9;
154 u_short ler2_tdra; /* +0x0014 */
155 short pad10;
156 u_short ler2_tlen; /* +0x0016 */
157 short pad11[9]; /* Pad to 32 shorts */
158 /* receive message descriptors */
159 struct lermdpad ler2_rmd[LERBUF];
160 /* transmit message descriptors */
161 struct letmdpad ler2_tmd[LETBUF];
162 short ler2_rbuf[LERBUF][LEBLEN]; /* +0x0060 */
163 short ler2_tbuf[LETBUF][LEBLEN]; /* +0x2FD0 */
164 };
165
166 /*
167 * Now for some truly ugly macros to access the structure fields
168 * padded/non-padded at runtime. (For once, a Pascal like record variant
169 * would be nice to have.)
170 */
171 #define LER2_RMDADDR(p, i) \
172 (le->sc_ler2pad ? \
173 (volatile void *)&(((struct lereg2pad *)(p))->ler2_rmd[(i)]) : \
174 (volatile void *)&(((struct lereg2 *)(p))->ler2_rmd[(i)]))
175
176 #define LER2_TMDADDR(p, i) \
177 ((le->sc_ler2pad ? \
178 (volatile void *)&(((struct lereg2pad *)(p))->ler2_tmd[(i)]) : \
179 (volatile void *)&(((struct lereg2 *)(p))->ler2_tmd[(i)])))
180
181 #define LER2_RBUFADDR(p, i) \
182 ((le->sc_ler2pad ? \
183 (volatile void *)(((struct lereg2pad *)(p))->ler2_rbuf[(i)]) : \
184 (volatile void *)(((struct lereg2 *)(p))->ler2_rbuf[(i)])))
185
186 #define LER2_TBUFADDR(p, i) \
187 ((le->sc_ler2pad ? \
188 (volatile void *)(((struct lereg2pad *)(p))->ler2_tbuf[(i)]) : \
189 (volatile void *)(((struct lereg2 *)(p))->ler2_tbuf[(i)])))
190
191 #define LER2_mode(p, v) \
192 (le->sc_ler2pad ? (((volatile struct lereg2pad *)(p))->ler2_mode = (v)) : \
193 (((volatile struct lereg2 *)(p))->ler2_mode = (v)))
194 #define LER2V_mode(p) \
195 (le->sc_ler2pad ? ((volatile struct lereg2pad *)(p))->ler2_mode : \
196 ((volatile struct lereg2 *)(p))->ler2_mode)
197
198 #define LER2_padr0(p, v) \
199 (le->sc_ler2pad ? (((volatile struct lereg2pad *)(p))->ler2_padr0 = (v)) : \
200 (((volatile struct lereg2 *)(p))->ler2_padr0 = (v)))
201 #define LER2V_padr0(p) \
202 (le->sc_ler2pad ? ((volatile struct lereg2pad *)(p))->ler2_padr0 : \
203 ((volatile struct lereg2 *)(p))->ler2_padr0)
204
205 #define LER2_padr1(p, v) \
206 (le->sc_ler2pad ? (((volatile struct lereg2pad *)(p))->ler2_padr1 = (v)) : \
207 (((volatile struct lereg2 *)(p))->ler2_padr1 = (v)))
208 #define LER2V_padr1(p) \
209 (le->sc_ler2pad ? ((volatile struct lereg2pad *)(p))->ler2_padr1 : \
210 ((volatile struct lereg2 *)(p))->ler2_padr1)
211
212 #define LER2_padr2(p, v) \
213 (le->sc_ler2pad ? (((volatile struct lereg2pad *)(p))->ler2_padr2 = (v)) : \
214 (((volatile struct lereg2 *)(p))->ler2_padr2 = (v)))
215 #define LER2V_padr2(p) \
216 (le->sc_ler2pad ? ((volatile struct lereg2pad *)(p))->ler2_padr2 : \
217 ((volatile struct lereg2 *)(p))->ler2_padr2)
218
219 #define LER2_ladrf0(p, v) \
220 (le->sc_ler2pad ? (((volatile struct lereg2pad *)(p))->ler2_ladrf0 = (v)) : \
221 (((volatile struct lereg2 *)(p))->ler2_ladrf0 = (v)))
222 #define LER2V_ladrf0(p) \
223 (le->sc_ler2pad ? ((volatile struct lereg2pad *)(p))->ler2_ladrf0 : \
224 ((volatile struct lereg2 *)(p))->ler2_ladrf0)
225
226 #define LER2_ladrf1(p, v) \
227 (le->sc_ler2pad ? (((volatile struct lereg2pad *)(p))->ler2_ladrf1 = (v)) : \
228 (((volatile struct lereg2 *)(p))->ler2_ladrf1 = (v)))
229 #define LER2V_ladrf1(p) \
230 (le->sc_ler2pad ? ((volatile struct lereg2pad *)(p))->ler2_ladrf1 : \
231 ((volatile struct lereg2 *)(p))->ler2_ladrf1)
232
233 #define LER2_ladrf2(p, v) \
234 (le->sc_ler2pad ? (((volatile struct lereg2pad *)(p))->ler2_ladrf2 = (v)) : \
235 (((volatile struct lereg2 *)(p))->ler2_ladrf2 = (v)))
236 #define LER2V_ladrf2(p) \
237 (le->sc_ler2pad ? ((volatile struct lereg2pad *)(p))->ler2_ladrf2 : \
238 ((volatile struct lereg2 *)(p))->ler2_ladrf2)
239
240 #define LER2_ladrf3(p, v) \
241 (le->sc_ler2pad ? (((volatile struct lereg2pad *)(p))->ler2_ladrf3 = (v)) : \
242 (((volatile struct lereg2 *)(p))->ler2_ladrf3 = (v)))
243 #define LER2V_ladrf3(p) \
244 (le->sc_ler2pad ? ((volatile struct lereg2pad *)(p))->ler2_ladrf3 : \
245 ((volatile struct lereg2 *)(p))->ler2_ladrf3)
246
247 #define LER2_rdra(p, v) \
248 (le->sc_ler2pad ? (((volatile struct lereg2pad *)(p))->ler2_rdra = (v)) : \
249 (((volatile struct lereg2 *)(p))->ler2_rdra = (v)))
250 #define LER2V_rdra(p) \
251 (le->sc_ler2pad ? ((volatile struct lereg2pad *)(p))->ler2_rdra : \
252 ((volatile struct lereg2 *)(p))->ler2_rdra)
253
254 #define LER2_rlen(p, v) \
255 (le->sc_ler2pad ? (((volatile struct lereg2pad *)(p))->ler2_rlen = (v)) : \
256 (((volatile struct lereg2 *)(p))->ler2_rlen = (v)))
257 #define LER2V_rlen(p) \
258 (le->sc_ler2pad ? ((volatile struct lereg2pad *)(p))->ler2_rlen : \
259 ((volatile struct lereg2 *)(p))->ler2_rlen)
260
261 #define LER2_tdra(p, v) \
262 (le->sc_ler2pad ? (((volatile struct lereg2pad *)(p))->ler2_tdra = (v)) : \
263 (((volatile struct lereg2 *)(p))->ler2_tdra = (v)))
264 #define LER2V_tdra(p) \
265 (le->sc_ler2pad ? ((volatile struct lereg2pad *)(p))->ler2_tdra : \
266 ((volatile struct lereg2 *)(p))->ler2_tdra)
267
268 #define LER2_tlen(p, v) \
269 (le->sc_ler2pad ? (((volatile struct lereg2pad *)(p))->ler2_tlen = (v)) : \
270 (((volatile struct lereg2 *)(p))->ler2_tlen = (v)))
271 #define LER2V_tlen(p) \
272 (le->sc_ler2pad ? ((volatile struct lereg2pad *)(p))->ler2_tlen : \
273 ((volatile struct lereg2 *)(p))->ler2_tlen)
274
275 #define LER2_rmd0(p, v) \
276 (le->sc_ler2pad ? (((volatile struct lermdpad *)(p))->rmd0 = (v)) : \
277 ((((volatile struct lermd *)(p))->rmd0 = (v))))
278 #define LER2V_rmd0(p) \
279 (le->sc_ler2pad ? ((volatile struct lermdpad *)(p))->rmd0 : \
280 ((volatile struct lermd *)(p))->rmd0)
281
282 #define LER2_rmd1(p, v) \
283 (le->sc_ler2pad ? (((volatile struct lermdpad *)(p))->rmd1 = (v)) : \
284 (((volatile struct lermd *)(p))->rmd1 = (v)))
285 #define LER2V_rmd1(p) \
286 (le->sc_ler2pad ? ((volatile struct lermdpad *)(p))->rmd1 : \
287 ((volatile struct lermd *)(p))->rmd1)
288
289 #define LER2_rmd2(p, v) \
290 (le->sc_ler2pad ? (((volatile struct lermdpad *)(p))->rmd2 = (v)) : \
291 (((volatile struct lermd *)(p))->rmd2 = (v)))
292 #define LER2V_rmd2(p) \
293 (le->sc_ler2pad ? ((volatile struct lermdpad *)(p))->rmd2 : \
294 ((volatile struct lermd *)(p))->rmd2)
295
296 #define LER2_rmd3(p, v) \
297 (le->sc_ler2pad ? (((volatile struct lermdpad *)(p))->rmd3 = (v)) : \
298 (((volatile struct lermd *)(p))->rmd3 = (v)))
299 #define LER2V_rmd3(p) \
300 (le->sc_ler2pad ? ((volatile struct lermdpad *)(p))->rmd3 : \
301 ((volatile struct lermd *)(p))->rmd3)
302
303 #define LER2_tmd0(p, v) \
304 (le->sc_ler2pad ? (((volatile struct letmdpad *)(p))->tmd0 = (v)) : \
305 (((volatile struct letmd *)(p))->tmd0 = (v)))
306 #define LER2V_tmd0(p) \
307 (le->sc_ler2pad ? ((volatile struct letmdpad *)(p))->tmd0 : \
308 ((volatile struct letmd *)(p))->tmd0)
309
310 #define LER2_tmd1(p, v) \
311 (le->sc_ler2pad ? (((volatile struct letmdpad *)(p))->tmd1 = (v)) : \
312 (((volatile struct letmd *)(p))->tmd1 = (v)))
313 #define LER2V_tmd1(p) \
314 (le->sc_ler2pad ? ((volatile struct letmdpad *)(p))->tmd1 : \
315 ((volatile struct letmd *)(p))->tmd1)
316
317 #define LER2_tmd2(p, v) \
318 (le->sc_ler2pad ? (((volatile struct letmdpad *)(p))->tmd2 = (v)) : \
319 (((volatile struct letmd *)(p))->tmd2 = (v)))
320 #define LER2V_tmd2(p) \
321 (le->sc_ler2pad ? ((volatile struct letmdpad *)(p))->tmd2 : \
322 ((volatile struct letmd *)(p))->tmd2)
323
324 #define LER2_tmd3(p, v) \
325 (le->sc_ler2pad ? (((volatile struct letmdpad *)(p))->tmd3 = (v)) : \
326 (((volatile struct letmd *)(p))->tmd3 = (v)))
327 #define LER2V_tmd3(p) \
328 (le->sc_ler2pad ? ((volatile struct letmdpad *)(p))->tmd3 : \
329 ((volatile struct letmd *)(p))->tmd3)
330
331 /*
332 * Control and status bits -- lereg0
333 */
334 #define LE_IE 0x80 /* interrupt enable */
335 #define LE_IR 0x40 /* interrupt requested */
336 #define LE_LOCK 0x08 /* lock status register */
337 #define LE_ACK 0x04 /* ack of lock */
338 #define LE_JAB 0x02 /* loss of tx clock (???) */
339 #define LE_IPL(x) ((((x) >> 4) & 0x3) + 3)
340
341 /*
342 * Control and status bits -- lereg1
343 */
344 #define LE_CSR0 0
345 #define LE_CSR1 1
346 #define LE_CSR2 2
347 #define LE_CSR3 3
348
349 /* (gxemul: NOTE: These are lereg0, not lereg1!) */
350 #define LE_SERR 0x8000
351 #define LE_BABL 0x4000
352 #define LE_CERR 0x2000
353 #define LE_MISS 0x1000
354 #define LE_MERR 0x0800
355 #define LE_RINT 0x0400
356 #define LE_TINT 0x0200
357 #define LE_IDON 0x0100
358 #define LE_INTR 0x0080
359 #define LE_INEA 0x0040
360 #define LE_RXON 0x0020
361 #define LE_TXON 0x0010
362 #define LE_TDMD 0x0008
363 #define LE_STOP 0x0004
364 #define LE_STRT 0x0002
365 #define LE_INIT 0x0001
366
367 #define LE_BSWP 0x4
368 #define LE_MODE 0x0
369
370 /*
371 * Control and status bits -- lereg2
372 */
373 /* (gxemul: NOTE: These are not lereg, they are tx/rx descriptors) */
374 #define LE_OWN 0x8000
375 #define LE_ERR 0x4000
376 #define LE_STP 0x0200
377 #define LE_ENP 0x0100
378
379 #define LE_FRAM 0x2000
380 #define LE_OFLO 0x1000
381 #define LE_CRC 0x0800
382 #define LE_RBUFF 0x0400
383
384 #define LE_MORE 0x1000
385 #define LE_ONE 0x0800
386 #define LE_DEF 0x0400
387
388 #define LE_TBUFF 0x8000
389 #define LE_UFLO 0x4000
390 #define LE_LCOL 0x1000
391 #define LE_LCAR 0x0800
392 #define LE_RTRY 0x0400
393
394 #endif /* IF_LEREG_H */
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