/[gxemul]/trunk/src/include/devices.h
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Contents of /trunk/src/include/devices.h

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Revision 20 - (show annotations)
Mon Oct 8 16:19:23 2007 UTC (16 years, 6 months ago) by dpavlin
File MIME type: text/plain
File size: 25908 byte(s) 
++ trunk/HISTORY	(local)
$Id: HISTORY,v 1.1055 2005/11/25 22:48:36 debug Exp $
20051031	Adding disassembly support for more ARM instructions (clz,
		smul* etc), and adding a hack to support "new tiny" pages
		for StrongARM.
20051101	Minor documentation updates (NetBSD 2.0.2 -> 2.1, and OpenBSD
		3.7 -> 3.8, and lots of testing).
		Changing from 1-sector PIO mode 0 transfers to 128-sector PIO
		mode 3 (in dev_wdc).
		Various minor ARM dyntrans updates (pc-relative loads from
		within the same page as the instruction are now treated as
		constant "mov").
20051102	Re-enabling instruction combinations (they were accidentally
		disabled).
		Dyntrans TLB entries are now overwritten using a round-robin
		scheme instead of randomly. This increases performance.
		Fixing a typo in file.c (thanks to Chuan-Hua Chang for
		noticing it).
		Experimenting with adding ATAPI support to dev_wdc (to make
		emulated *BSD detect cdroms as cdroms, not harddisks).
20051104	Various minor updates.
20051105	Continuing on the ATAPI emulation. Seems to work well enough
		for a NetBSD/cats installation, but not OpenBSD/cats.
		Various other updates.
20051106	Modifying the -Y command line option to allow scaleup with
		certain graphic controllers (only dev_vga so far), not just
		scaledown.
		Some minor dyntrans cleanups.
20051107	Beginning a cleanup up the PCI subsystem (removing the
		read_register hack, etc).
20051108	Continuing the cleanup; splitting up some pci devices into a
		normal autodev device and some separate pci glue code.
20051109	Continuing on the PCI bus stuff; all old pci_*.c have been
		incorporated into normal devices and/or rewritten as glue code
		only, adding a dummy Intel 82371AB PIIX4 for Malta (not really
		tested yet).
		Minor pckbc fix so that Linux doesn't complain.
		Working on the DEC 21143 NIC (ethernet mac rom stuff mostly).
		Various other minor fixes.
20051110	Some more ARM dyntrans fine-tuning (e.g. some instruction
		combinations (cmps followed by conditional branch within the
		same page) and special cases for DPIs with regform when the
		shifter isn't used).
20051111	ARM dyntrans updates: O(n)->O(1) for just-mark-as-non-
		writable in the generic pc_to_pointers function, and some other
		minor hacks.
		Merging Cobalt and evbmips (Malta) ISA interrupt handling,
		and some minor fixes to allow Linux to accept harddisk irqs.
20051112	Minor device updates (pckbc, dec21143, lpt, ...), most
		importantly fixing the ALI M1543/M5229 so that harddisk irqs
		work with Linux/CATS.
20051113	Some more generalizations of the PCI subsystem.
		Finally took the time to add a hack for SCSI CDROM TOCs; this
		enables OpenBSD to use partition 'a' (as needed by the OpenBSD
		installer), and Windows NT's installer to get a bit further.
		Also fixing dev_wdc to allow Linux to detect ATAPI CDROMs.
		Continuing on the DEC 21143.
20051114	Minor ARM dyntrans tweaks; ARM cmps+branch optimization when
		comparing with 0, and generalizing the xchg instr. comb.
		Adding disassembly of ARM mrrc/mcrr and q{,d}{add,sub}.
20051115	Continuing on various PPC things (BATs, other address trans-
		lation things, various loads/stores, BeBox emulation, etc.).
		Beginning to work on PPC interrupt/exception support.
20051116	Factoring out some code which initializes legacy ISA devices
		from those machines that use them (bus_isa).
		Continuing on PPC interrupt/exception support.
20051117	Minor Malta fixes: RTC year offset = 80, disabling a speed hack
		which caused NetBSD to detect a too fast cpu, and adding a new
		hack to make Linux detect a faster cpu.
		Continuing on the Artesyn PM/PPC emulation mode.
		Adding an Algor emulation skeleton (P4032 and P5064);
		implementing some of the basics.
		Continuing on PPC emulation in general; usage of unimplemented
		SPRs is now easier to track, continuing on memory/exception
		related issues, etc.
20051118	More work on PPC emulation (tgpr0..3, exception handling,
		memory stuff, syscalls, etc.).
20051119	Changing the ARM dyntrans code to mostly use cpu->pc, and not
		necessarily use arm reg 15. Seems to work.
		Various PPC updates; continuing on the PReP emulation mode.
20051120	Adding a workaround/hack to dev_mc146818 to allow NetBSD/prep
		to detect the clock.
20051121	More cleanup of the PCI bus (memory and I/O bases, etc).
		Continuing on various PPC things (decrementer and timebase,
		WDCs on obio (on PReP) use irq 13, not 14/15).
20051122	Continuing on the CPC700 controller (interrupts etc) for PMPPC,
		and on PPC stuff in general.
		Finally! After some bug fixes to the virtual to physical addr
		translation, NetBSD/{prep,pmppc} 2.1 reach userland and are
		stable enough to be interacted with.
		More PCI updates; reverse-endian device access for PowerPC etc.
20051123	Generalizing the IEEE floating point subsystem (moving it out
		from src/cpus/cpu_mips_coproc.c into a new src/float_emul.c).
		Input via slave xterms was sometimes not really working; fixing
		this for ns16550, and a warning message is now displayed if
		multiple non-xterm consoles are active.
		Adding some PPC floating point support, etc.
		Various interrupt related updates (dev_wdc, _ns16550, _8259,
		and the isa32 common code in machine.c).
		NetBSD/prep can now be installed! :-) (Well, with some manual
		commands necessary before running sysinst.) Updating the
		documentation and various other things to reflect this.
20051124	Various minor documentation updates.
		Continuing the work on the DEC 21143 NIC.
20051125	LOTS of work on the 21143. Both OpenBSD and NetBSD work fine
		with it now, except that OpenBSD sometimes gives a time-out
		warning.
		Minor documentation updates.

==============  RELEASE 0.3.7  ==============
1 #ifndef DEVICES_H
2 #define DEVICES_H
3
4 /*
5 * Copyright (C) 2003-2005 Anders Gavare. All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions are met:
9 *
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 * 3. The name of the author may not be used to endorse or promote products
16 * derived from this software without specific prior written permission.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
19 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28 * SUCH DAMAGE.
29 *
30 *
31 * $Id: devices.h,v 1.194 2005/11/22 02:07:40 debug Exp $
32 *
33 * Memory mapped devices.
34 *
35 * TODO: Separate into lots of smaller files? That might speed up a compile,
36 * but I'm not sure that it's a price worth paying.
37 */
38
39 #include <sys/types.h>
40 #include <inttypes.h>
41
42 struct cpu;
43 struct machine;
44 struct memory;
45 struct pci_data;
46
47 /* #ifdef WITH_X11
48 #include <X11/Xlib.h>
49 #endif */
50
51 /* dev_8259.c: */
52 struct pic8259_data {
53 int irq_nr; /* if connected to another 8259 */
54
55 int irq_base;
56 int current_command;
57
58 int init_state;
59
60 int priority_reg;
61 uint8_t irr; /* interrupt request register */
62 uint8_t isr; /* interrupt in-service register */
63 uint8_t ier; /* interrupt enable register */
64 };
65
66 /* dev_dec_ioasic.c: */
67 #define DEV_DEC_IOASIC_LENGTH 0x80100
68 #define N_DEC_IOASIC_REGS (0x1f0 / 0x10)
69 #define MAX_IOASIC_DMA_FUNCTIONS 8
70 struct dec_ioasic_data {
71 uint32_t reg[N_DEC_IOASIC_REGS];
72 int (*(dma_func[MAX_IOASIC_DMA_FUNCTIONS]))(struct cpu *, void *, uint64_t addr, size_t dma_len, int tx);
73 void *dma_func_extra[MAX_IOASIC_DMA_FUNCTIONS];
74 int rackmount_flag;
75 };
76 int dev_dec_ioasic_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
77 struct dec_ioasic_data *dev_dec_ioasic_init(struct cpu *cpu, struct memory *mem, uint64_t baseaddr, int rackmount_flag);
78
79 /* dev_asc.c: */
80 #define DEV_ASC_DEC_LENGTH 0x40000
81 #define DEV_ASC_PICA_LENGTH 0x1000
82 #define DEV_ASC_DEC 1
83 #define DEV_ASC_PICA 2
84 int dev_asc_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
85 void dev_asc_init(struct machine *machine, struct memory *mem, uint64_t baseaddr,
86 int irq_nr, void *turbochannel, int mode,
87 size_t (*dma_controller)(void *dma_controller_data,
88 unsigned char *data, size_t len, int writeflag),
89 void *dma_controller_data);
90
91 /* dev_au1x00.c: */
92 struct au1x00_ic_data {
93 int ic_nr;
94 uint32_t request0_int;
95 uint32_t request1_int;
96 uint32_t config0;
97 uint32_t config1;
98 uint32_t config2;
99 uint32_t source;
100 uint32_t assign_request;
101 uint32_t wakeup;
102 uint32_t mask;
103 };
104
105 int dev_au1x00_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
106 struct au1x00_ic_data *dev_au1x00_init(struct machine *machine, struct memory *mem);
107
108 /* dev_bebox.c: */
109 struct bebox_data {
110 /* The 5 motherboard registers: */
111 uint32_t cpu0_int_mask;
112 uint32_t cpu1_int_mask;
113 uint32_t int_status;
114 uint32_t xpi;
115 uint32_t resets;
116 };
117
118 /* dev_bt431.c: */
119 #define DEV_BT431_LENGTH 0x20
120 #define DEV_BT431_NREGS 0x800 /* ? */
121 int dev_bt431_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
122 struct vfb_data;
123 void dev_bt431_init(struct memory *mem, uint64_t baseaddr, struct vfb_data *vfb_data, int color_fb_flag);
124
125 /* dev_bt455.c: */
126 #define DEV_BT455_LENGTH 0x20
127 int dev_bt455_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
128 struct vfb_data;
129 void dev_bt455_init(struct memory *mem, uint64_t baseaddr, struct vfb_data *vfb_data);
130
131 /* dev_bt459.c: */
132 #define DEV_BT459_LENGTH 0x20
133 #define DEV_BT459_NREGS 0x1000
134 #define BT459_PX 1 /* px[g] */
135 #define BT459_BA 2 /* cfb */
136 #define BT459_BBA 3 /* sfb */
137 int dev_bt459_access(struct cpu *cpu, struct memory *mem,
138 uint64_t relative_addr, unsigned char *data, size_t len,
139 int writeflag, void *);
140 struct vfb_data;
141 void dev_bt459_init(struct machine *machine, struct memory *mem,
142 uint64_t baseaddr, uint64_t baseaddr_irq, struct vfb_data *vfb_data,
143 int color_fb_flag, int irq_nr, int type);
144
145 /* dev_cons.c: */
146 #define DEV_CONS_ADDRESS 0x0000000010000000
147 #define DEV_CONS_LENGTH 0x0000000000000020
148 #define DEV_CONS_PUTGETCHAR 0x0000
149 #define DEV_CONS_HALT 0x0010
150 struct cons_data {
151 int console_handle;
152 int irq_nr;
153 };
154
155 /* dev_colorplanemask.c: */
156 #define DEV_COLORPLANEMASK_LENGTH 0x0000000000000010
157 int dev_colorplanemask_access(struct cpu *cpu, struct memory *mem,
158 uint64_t relative_addr, unsigned char *data, size_t len,
159 int writeflag, void *);
160 void dev_colorplanemask_init(struct memory *mem, uint64_t baseaddr,
161 unsigned char *color_plane_mask);
162
163 /* dev_cpc700.c: */
164 struct cpc700_data {
165 struct pci_data *pci_data;
166 uint32_t sr; /* Status register (interrupt) */
167 uint32_t er; /* Enable register */
168 };
169 struct cpc700_data *dev_cpc700_init(struct machine *, struct memory *);
170
171 /* dev_dc7085.c: */
172 #define DEV_DC7085_LENGTH 0x0000000000000080
173 /* see dc7085.h for more info */
174 void dev_dc7085_tick(struct cpu *cpu, void *);
175 int dev_dc7085_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
176 int dev_dc7085_init(struct machine *machine, struct memory *mem, uint64_t baseaddr, int irq_nr, int use_fb);
177
178 /* dev_dec5800.c: */
179 #define DEV_DEC5800_LENGTH 0x1000 /* ? */
180 struct dec5800_data {
181 uint32_t csr;
182 uint32_t vector_0x50;
183 };
184 int dev_dec5800_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
185 struct dec5800_data *dev_dec5800_init(struct machine *machine, struct memory *mem, uint64_t baseaddr);
186 /* 16 slots, 0x2000 bytes each */
187 #define DEV_DECBI_LENGTH 0x20000
188 int dev_decbi_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
189 void dev_decbi_init(struct memory *mem, uint64_t baseaddr);
190 #define DEV_DECCCA_LENGTH 0x10000 /* ? */
191 #define DEC_DECCCA_BASEADDR 0x19000000 /* ? I just made this up */
192 int dev_deccca_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
193 void dev_deccca_init(struct memory *mem, uint64_t baseaddr);
194 #define DEV_DECXMI_LENGTH 0x800000
195 int dev_decxmi_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
196 void dev_decxmi_init(struct memory *mem, uint64_t baseaddr);
197
198 /* dev_disk.c: */
199 #define DEV_DISK_ADDRESS 0x13000000
200
201 /* dev_eagle.c: */
202 struct pci_data *dev_eagle_init(struct machine *machine, struct memory *mem,
203 int irqbase, int pciirq);
204
205 /* dev_ether.c: */
206 #define DEV_ETHER_ADDRESS 0x14000000
207 #define DEV_ETHER_LENGTH 0x8000
208
209 /* dev_fb.c: */
210 #define DEV_FB_ADDRESS 0x12000000 /* Default for testmips */
211 #define DEV_FB_LENGTH 0x3c0000 /* 3c0000 to not colide with */
212 /* turbochannel rom, */
213 /* otherwise size = 4MB */
214 #define VFB_GENERIC 0
215 #define VFB_HPC 1
216 #define VFB_DEC_VFB01 2
217 #define VFB_DEC_VFB02 3
218 #define VFB_DEC_MAXINE 4
219 #define VFB_PLAYSTATION2 5
220 struct vfb_data {
221 int vfb_type;
222
223 int vfb_scaledown;
224
225 int xsize;
226 int ysize;
227 int bit_depth;
228 int color32k; /* hack for 16-bit HPCmips */
229 int psp_15bit; /* plastation portable hack */
230
231 unsigned char color_plane_mask;
232
233 int bytes_per_line; /* cached */
234
235 int visible_xsize;
236 int visible_ysize;
237
238 size_t framebuffer_size;
239 int x11_xsize, x11_ysize;
240
241 int update_x1, update_y1, update_x2, update_y2;
242
243 /* RGB palette for <= 8 bit modes: (r,g,b bytes for each) */
244 unsigned char rgb_palette[256 * 3];
245
246 /* These should always be in sync: */
247 unsigned char *framebuffer;
248 struct fb_window *fb_window;
249 };
250 #define VFB_MFB_BT455 0x100000
251 #define VFB_MFB_BT431 0x180000
252 #define VFB_MFB_VRAM 0x200000
253 #define VFB_CFB_BT459 0x200000
254 void set_grayscale_palette(struct vfb_data *d, int ncolors);
255 void dev_fb_resize(struct vfb_data *d, int new_xsize, int new_ysize);
256 void dev_fb_setcursor(struct vfb_data *d, int cursor_x, int cursor_y, int on,
257 int cursor_xsize, int cursor_ysize);
258 void framebuffer_blockcopyfill(struct vfb_data *d, int fillflag, int fill_r,
259 int fill_g, int fill_b, int x1, int y1, int x2, int y2,
260 int from_x, int from_y);
261 void dev_fb_tick(struct cpu *, void *);
262 int dev_fb_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr,
263 unsigned char *data, size_t len, int writeflag, void *);
264 struct vfb_data *dev_fb_init(struct machine *machine, struct memory *mem,
265 uint64_t baseaddr, int vfb_type, int visible_xsize, int visible_ysize,
266 int xsize, int ysize, int bit_depth, char *name);
267
268 /* dev_footbridge: */
269 #define N_FOOTBRIDGE_TIMERS 4
270 struct footbridge_data {
271 struct pci_data *pcibus;
272
273 int console_handle;
274
275 int timer_tick_countdown[N_FOOTBRIDGE_TIMERS];
276 uint32_t timer_load[N_FOOTBRIDGE_TIMERS];
277 uint32_t timer_value[N_FOOTBRIDGE_TIMERS];
278 uint32_t timer_control[N_FOOTBRIDGE_TIMERS];
279 int timer_being_read;
280 int timer_poll_mode;
281
282 uint32_t irq_status;
283 uint32_t irq_enable;
284
285 uint32_t fiq_status;
286 uint32_t fiq_enable;
287 };
288
289 /* dev_gt.c: */
290 #define DEV_GT_LENGTH 0x1000
291 int dev_gt_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr,
292 unsigned char *data, size_t len, int writeflag, void *);
293 struct pci_data *dev_gt_init(struct machine *machine, struct memory *mem,
294 uint64_t baseaddr, int irq_nr, int pciirq, int type);
295
296 /* dev_jazz.c: */
297 #define DEV_JAZZ_LENGTH 0x280
298 struct jazz_data {
299 struct cpu *cpu;
300
301 /* Jazz stuff: */
302 uint32_t int_enable_mask;
303 uint32_t int_asserted;
304
305 /* ISA stuff: */
306 uint32_t isa_int_enable_mask;
307 uint32_t isa_int_asserted;
308
309 int interval;
310 int interval_start;
311
312 int jazz_timer_value;
313 int jazz_timer_current;
314
315 uint64_t dma_translation_table_base;
316 uint64_t dma_translation_table_limit;
317
318 uint32_t dma0_mode;
319 uint32_t dma0_enable;
320 uint32_t dma0_count;
321 uint32_t dma0_addr;
322
323 uint32_t dma1_mode;
324 /* same for dma1,2,3 actually (TODO) */
325
326 int led;
327 };
328 size_t dev_jazz_dma_controller(void *dma_controller_data,
329 unsigned char *data, size_t len, int writeflag);
330
331 /* dev_kn01.c: */
332 #define DEV_KN01_CSR_LENGTH 0x0000000000000004
333 int dev_kn01_csr_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
334 void dev_kn01_csr_init(struct memory *mem, uint64_t baseaddr, int color_fb);
335 #define DEV_VDAC_LENGTH 0x20
336 #define DEV_VDAC_MAPWA 0x00
337 #define DEV_VDAC_MAP 0x04
338 #define DEV_VDAC_MASK 0x08
339 #define DEV_VDAC_MAPRA 0x0c
340 #define DEV_VDAC_OVERWA 0x10
341 #define DEV_VDAC_OVER 0x14
342 #define DEV_VDAC_OVERRA 0x1c
343 int dev_vdac_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
344 void dev_vdac_init(struct memory *mem, uint64_t baseaddr, unsigned char *rgb_palette, int color_fb_flag);
345
346 /* dev_kn02.c: */
347 struct kn02_csr {
348 uint8_t csr[sizeof(uint32_t)];
349 uint8_t filler[4096 - sizeof(uint32_t)]; /* for bintrans mapping */
350 };
351 int dev_kn02_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
352 struct kn02_csr *dev_kn02_init(struct cpu *cpu, struct memory *mem,
353 uint64_t baseaddr);
354
355 /* dev_kn220.c: */
356 #define DEV_DEC5500_IOBOARD_LENGTH 0x100000
357 int dev_dec5500_ioboard_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
358 struct dec5500_ioboard_data *dev_dec5500_ioboard_init(struct cpu *cpu, struct memory *mem, uint64_t baseaddr);
359 #define DEV_SGEC_LENGTH 0x1000
360 int dev_sgec_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
361 void dev_sgec_init(struct memory *mem, uint64_t baseaddr, int irq_nr);
362
363 /* dev_kn230.c: */
364 struct kn230_csr {
365 uint32_t csr;
366 };
367
368 /* dev_le.c: */
369 #define DEV_LE_LENGTH 0x1c0200
370 int dev_le_access(struct cpu *cpu, struct memory *mem,
371 uint64_t relative_addr, unsigned char *data, size_t len,
372 int writeflag, void *);
373 void dev_le_init(struct machine *machine, struct memory *mem,
374 uint64_t baseaddr, uint64_t buf_start, uint64_t buf_end,
375 int irq_nr, int len);
376
377 /* dev_m700_fb.c: */
378 #define DEV_M700_FB_LENGTH 0x10000 /* TODO? */
379 int dev_m700_fb_access(struct cpu *cpu, struct memory *mem,
380 uint64_t relative_addr, unsigned char *data, size_t len,
381 int writeflag, void *);
382 void dev_m700_fb_init(struct machine *machine, struct memory *mem,
383 uint64_t baseaddr, uint64_t baseaddr2);
384
385 /* dev_malta.c: */
386 struct malta_data {
387 uint8_t assert_lo;
388 uint8_t assert_hi;
389 uint8_t disable_lo;
390 uint8_t disable_hi;
391 int poll_mode;
392 };
393
394 /* dev_mc146818.c: */
395 #define DEV_MC146818_LENGTH 0x0000000000000100
396 #define MC146818_DEC 0
397 #define MC146818_PC_CMOS 1
398 #define MC146818_ARC_NEC 2
399 #define MC146818_ARC_JAZZ 3
400 #define MC146818_SGI 4
401 #define MC146818_CATS 5
402 #define MC146818_ALGOR 6
403 #define MC146818_PMPPC 7
404 /* see mc146818reg.h for more info */
405 void dev_mc146818_tick(struct cpu *cpu, void *);
406 int dev_mc146818_access(struct cpu *cpu, struct memory *mem,
407 uint64_t relative_addr, unsigned char *data, size_t len,
408 int writeflag, void *);
409 void dev_mc146818_init(struct machine *machine, struct memory *mem,
410 uint64_t baseaddr, int irq_nr, int access_style, int addrdiv);
411
412 /* dev_pckbc.c: */
413 #define DEV_PCKBC_LENGTH 0x10
414 #define PCKBC_8042 0
415 #define PCKBC_8242 1
416 #define PCKBC_JAZZ 3
417 int dev_pckbc_access(struct cpu *cpu, struct memory *mem,
418 uint64_t relative_addr, unsigned char *data, size_t len,
419 int writeflag, void *);
420 int dev_pckbc_init(struct machine *machine, struct memory *mem,
421 uint64_t baseaddr, int type, int keyboard_irqnr, int mouse_irqnr,
422 int in_use, int pc_style_flag);
423
424 /* dev_pmppc.c: */
425 int dev_pmppc_board_access(struct cpu *cpu, struct memory *mem,
426 uint64_t relative_addr, unsigned char *data, size_t len, int writeflag,
427 void *);
428 void dev_pmppc_init(struct memory *mem);
429
430 /* dev_ps2_spd.c: */
431 #define DEV_PS2_SPD_LENGTH 0x800
432 int dev_ps2_spd_access(struct cpu *cpu, struct memory *mem,
433 uint64_t relative_addr, unsigned char *data, size_t len,
434 int writeflag, void *);
435 void dev_ps2_spd_init(struct machine *machine, struct memory *mem,
436 uint64_t baseaddr);
437
438 /* dev_ps2_stuff.c: */
439 #include "ps2_dmacreg.h"
440 #define N_PS2_DMA_CHANNELS 10
441 #define N_PS2_TIMERS 4
442 struct ps2_data {
443 uint32_t timer_count[N_PS2_TIMERS];
444 uint32_t timer_comp[N_PS2_TIMERS];
445 uint32_t timer_mode[N_PS2_TIMERS];
446 uint32_t timer_hold[N_PS2_TIMERS]; /* NOTE: only 0 and 1 are valid */
447
448 uint64_t dmac_reg[DMAC_REGSIZE / 0x10];
449
450 uint64_t other_memory_base[N_PS2_DMA_CHANNELS];
451
452 uint32_t intr;
453 uint32_t imask;
454 uint32_t sbus_smflg;
455 };
456 #define DEV_PS2_STUFF_LENGTH 0x10000
457 int dev_ps2_stuff_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
458 struct ps2_data *dev_ps2_stuff_init(struct machine *machine, struct memory *mem, uint64_t baseaddr);
459
460 /* dev_pmagja.c: */
461 #define DEV_PMAGJA_LENGTH 0x3c0000
462 int dev_pmagja_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
463 void dev_pmagja_init(struct machine *machine, struct memory *mem, uint64_t baseaddr, int irq_nr);
464
465 /* dev_prep.c: */
466 struct prep_data {
467 uint32_t int_status;
468 };
469
470 /* dev_px.c: */
471 struct px_data {
472 struct memory *fb_mem;
473 struct vfb_data *vfb_data;
474 int type;
475 char *px_name;
476 int irq_nr;
477 int bitdepth;
478 int xconfig;
479 int yconfig;
480
481 uint32_t intr;
482 unsigned char sram[128 * 1024];
483 };
484 /* TODO: perhaps these types are wrong? */
485 #define DEV_PX_TYPE_PX 0
486 #define DEV_PX_TYPE_PXG 1
487 #define DEV_PX_TYPE_PXGPLUS 2
488 #define DEV_PX_TYPE_PXGPLUSTURBO 3
489 #define DEV_PX_LENGTH 0x3c0000
490 int dev_px_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr,
491 unsigned char *data, size_t len, int writeflag, void *);
492 void dev_px_init(struct machine *machine, struct memory *mem, uint64_t baseaddr,
493 int px_type, int irq_nr);
494
495 /* dev_ram.c: */
496 #define DEV_RAM_RAM 0
497 #define DEV_RAM_MIRROR 1
498 #define DEV_RAM_MIGHT_POINT_TO_DEVICES 0x10
499 int dev_ram_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr,
500 unsigned char *data, size_t len, int writeflag, void *);
501 void dev_ram_init(struct machine *machine, uint64_t baseaddr, uint64_t length,
502 int mode, uint64_t otheraddr);
503
504 /* dev_scc.c: */
505 #define DEV_SCC_LENGTH 0x1000
506 int dev_scc_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr,
507 unsigned char *data, size_t len, int writeflag, void *);
508 int dev_scc_dma_func(struct cpu *cpu, void *extra, uint64_t addr,
509 size_t dma_len, int tx);
510 void *dev_scc_init(struct machine *machine, struct memory *mem,
511 uint64_t baseaddr, int irq_nr, int use_fb, int scc_nr, int addrmul);
512
513 /* dev_sfb.c: */
514 #define DEV_SFB_LENGTH 0x400000
515 int dev_sfb_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr,
516 unsigned char *data, size_t len, int writeflag, void *);
517 void dev_sfb_init(struct machine *machine, struct memory *mem,
518 uint64_t baseaddr, struct vfb_data *vfb_data);
519
520 /* dev_sgi_gbe.c: */
521 #define DEV_SGI_GBE_LENGTH 0x1000000
522 int dev_sgi_gbe_access(struct cpu *cpu, struct memory *mem,
523 uint64_t relative_addr, unsigned char *data, size_t len, int writeflag,
524 void *);
525 void dev_sgi_gbe_init(struct machine *machine, struct memory *mem,
526 uint64_t baseaddr);
527
528 /* dev_sgi_ip20.c: */
529 #define DEV_SGI_IP20_LENGTH 0x40
530 #define DEV_SGI_IP20_BASE 0x1fb801c0
531 struct sgi_ip20_data {
532 int dummy;
533 };
534 int dev_sgi_ip20_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
535 struct sgi_ip20_data *dev_sgi_ip20_init(struct cpu *cpu, struct memory *mem, uint64_t baseaddr);
536
537 /* dev_sgi_ip22.c: */
538 #define DEV_SGI_IP22_LENGTH 0x100
539 #define DEV_SGI_IP22_IMC_LENGTH 0x100
540 #define DEV_SGI_IP22_UNKNOWN2_LENGTH 0x100
541 #define IP22_IMC_BASE 0x1fa00000
542 #define IP22_UNKNOWN2_BASE 0x1fb94000
543 struct sgi_ip22_data {
544 int guiness_flag;
545 uint32_t reg[DEV_SGI_IP22_LENGTH / 4];
546 uint32_t imc_reg[DEV_SGI_IP22_IMC_LENGTH / 4];
547 uint32_t unknown2_reg[DEV_SGI_IP22_UNKNOWN2_LENGTH / 4];
548 uint32_t unknown_timer;
549 };
550 int dev_sgi_ip22_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
551 struct sgi_ip22_data *dev_sgi_ip22_init(struct machine *machine, struct memory *mem, uint64_t baseaddr, int guiness_flag);
552
553 /* dev_sgi_ip30.c: */
554 #define DEV_SGI_IP30_LENGTH 0x80000
555 struct sgi_ip30_data {
556 /* ip30: */
557 uint64_t imask0; /* 0x10000 */
558 uint64_t reg_0x10018;
559 uint64_t isr; /* 0x10030 */
560 uint64_t reg_0x20000;
561 uint64_t reg_0x30000;
562
563 /* ip30_2: */
564 uint64_t reg_0x0029c;
565
566 /* ip30_3: */
567 uint64_t reg_0x00284;
568
569 /* ip30_4: */
570 uint64_t reg_0x000b0;
571
572 /* ip30_5: */
573 uint64_t reg_0x00000;
574 };
575 int dev_sgi_ip30_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
576 struct sgi_ip30_data *dev_sgi_ip30_init(struct machine *machine, struct memory *mem, uint64_t baseaddr);
577
578 /* dev_sgi_ip32.c: */
579 #define DEV_CRIME_LENGTH 0x0000000000001000
580 struct crime_data {
581 unsigned char reg[DEV_CRIME_LENGTH];
582 int irq_nr;
583 int use_fb;
584 };
585 int dev_crime_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
586 struct crime_data *dev_crime_init(struct machine *machine, struct memory *mem, uint64_t baseaddr, int irq_nr, int use_fb);
587 #define DEV_MACE_LENGTH 0x100
588 struct mace_data {
589 unsigned char reg[DEV_MACE_LENGTH];
590 int irqnr;
591 };
592 int dev_mace_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
593 struct mace_data *dev_mace_init(struct memory *mem, uint64_t baseaddr, int irqnr);
594 #define DEV_MACEPCI_LENGTH 0x1000
595 int dev_macepci_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
596 struct pci_data *dev_macepci_init(struct memory *mem, uint64_t baseaddr, int pciirq);
597 #define DEV_SGI_MEC_LENGTH 0x1000
598 int dev_sgi_mec_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
599 void dev_sgi_mec_init(struct machine *machine, struct memory *mem, uint64_t baseaddr, int irq_nr, unsigned char *macaddr);
600 #define DEV_SGI_UST_LENGTH 0x10000
601 int dev_sgi_ust_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
602 void dev_sgi_ust_init(struct memory *mem, uint64_t baseaddr);
603 #define DEV_SGI_MTE_LENGTH 0x10000
604 int dev_sgi_mte_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
605 void dev_sgi_mte_init(struct memory *mem, uint64_t baseaddr);
606
607 /* dev_sii.c: */
608 #define DEV_SII_LENGTH 0x100
609 void dev_sii_tick(struct cpu *cpu, void *);
610 int dev_sii_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
611 void dev_sii_init(struct machine *machine, struct memory *mem, uint64_t baseaddr, uint64_t buf_start, uint64_t buf_end, int irq_nr);
612
613 /* dev_ssc.c: */
614 #define DEV_SSC_LENGTH 0x1000
615 int dev_ssc_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
616 void dev_ssc_init(struct machine *machine, struct memory *mem, uint64_t baseaddr, int irq_nr, int use_fb, uint32_t *);
617
618 /* dev_turbochannel.c: */
619 #define DEV_TURBOCHANNEL_LEN 0x0470
620 int dev_turbochannel_access(struct cpu *cpu, struct memory *mem,
621 uint64_t relative_addr, unsigned char *data, size_t len,
622 int writeflag, void *);
623 void dev_turbochannel_init(struct machine *machine, struct memory *mem,
624 int slot_nr, uint64_t baseaddr, uint64_t endaddr, char *device_name,
625 int irq);
626
627 /* dev_vga.c: */
628 int dev_vga_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr,
629 unsigned char *data, size_t len, int writeflag, void *);
630 void dev_vga_init(struct machine *machine, struct memory *mem,
631 uint64_t videomem_base, uint64_t control_base, char *name);
632
633 /* dev_vr41xx.c: */
634 #define DEV_VR41XX_LENGTH 0x800 /* TODO? */
635 struct vr41xx_data {
636 int cpumodel;
637
638 int kiu_console_handle;
639 int kiu_offset;
640 int kiu_irq_nr;
641 int kiu_int_assert;
642 int d0;
643 int d1;
644 int d2;
645 int d3;
646 int d4;
647 int d5;
648 int dont_clear_next;
649 int escape_state;
650
651 /* See icureg.h in NetBSD for more info. */
652 uint16_t sysint1;
653 uint16_t msysint1;
654 uint16_t giuint;
655 uint16_t giumask;
656 uint16_t sysint2;
657 uint16_t msysint2;
658 };
659
660 int dev_vr41xx_access(struct cpu *cpu, struct memory *mem,
661 uint64_t relative_addr, unsigned char *data, size_t len,
662 int writeflag, void *);
663 struct vr41xx_data *dev_vr41xx_init(struct machine *machine,
664 struct memory *mem, int cpumodel);
665
666 /* dev_wdsc.c: */
667 #define DEV_WDSC_NREGS 0x100 /* 8-bit register select */
668 #define DEV_WDSC_LENGTH 0x10
669 int dev_wdsc_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
670 void dev_wdsc_init(struct machine *machine, struct memory *mem, uint64_t baseaddr, int controller_nr, int irq_nr);
671
672 /* dev_zs.c: */
673 #define DEV_ZS_LENGTH 0x10
674 int dev_zs_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr,
675 unsigned char *data, size_t len, int writeflag, void *);
676 int dev_zs_init(struct machine *machine, struct memory *mem, uint64_t baseaddr,
677 int irq_nr, int addrmult, char *name);
678
679 /* lk201.c: */
680 struct lk201_data {
681 int use_fb;
682 int console_handle;
683
684 void (*add_to_rx_queue)(void *,int,int);
685 void *add_data;
686
687 unsigned char keyb_buf[8];
688 int keyb_buf_pos;
689
690 int mouse_mode;
691 int mouse_revision; /* 0..15 */
692 int mouse_x, mouse_y, mouse_buttons;
693
694 int old_host_mouse_x;
695 int old_host_mouse_y;
696 int old_host_mouse_stays_put;
697 int mouse_check_interval;
698 int mouse_check_interval_reset;
699 };
700 void lk201_tick(struct lk201_data *);
701 void lk201_tx_data(struct lk201_data *, int port, int idata);
702 void lk201_init(struct lk201_data *d, int use_fb,
703 void (*add_to_rx_queue)(void *,int,int), int console_handle, void *);
704
705
706 #endif /* DEVICES_H */
707
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