/[gxemul]/trunk/src/include/devices.h
This is repository of my old source code which isn't updated any more. Go to git.rot13.org for current projects!
ViewVC logotype

Contents of /trunk/src/include/devices.h

Parent Directory Parent Directory | Revision Log Revision Log


Revision 18 - (show annotations)
Mon Oct 8 16:19:11 2007 UTC (16 years, 6 months ago) by dpavlin
File MIME type: text/plain
File size: 25240 byte(s)
++ trunk/HISTORY	(local)
$Id: HISTORY,v 1.1004 2005/10/27 14:01:10 debug Exp $
20051011        Passing -A as the default boot arg for CATS (works fine with
                OpenBSD/cats).
20051012	Fixing the VGA cursor offset bug, and speeding up framebuffer
		redraws if character cells contain the same thing as during
		the last redraw.
20051013	Adding a slow strd ARM instruction hack.
20051017	Minor updates: Adding a dummy i80321 Verde controller (for
		XScale emulation), fixing the disassembly of the ARM "ldrd"
		instruction, adding "support" for less-than-4KB pages for ARM
		(by not adding them to translation tables).
20051020	Continuing on some HPCarm stuff. A NetBSD/hpcarm kernel prints
		some boot messages on an emulated Jornada 720.
		Making dev_ram work better with dyntrans (speeds up some things
		quite a bit).
20051021	Automatically generating some of the most common ARM load/store
		multiple instructions.
20051022	Better statistics gathering for the ARM load/store multiple.
		Various other dyntrans and device updates.
20051023	Various minor updates.
20051024	Continuing; minor device and dyntrans fine-tuning. Adding the
		first "reasonable" instruction combination hacks for ARM (the
		cores of NetBSD/cats' memset and memcpy).
20051025	Fixing a dyntrans-related bug in dev_vga. Also changing the
		dyntrans low/high access notification to only be updated on
		writes, not reads. Hopefully it will be enough. (dev_vga in
		charcell mode now seems to work correctly with both reads and
		writes.)
		Experimenting with gathering dyntrans statistics (which parts
		of emulated RAM that are actually executed), and adding
		instruction combination hacks for cache cleaning and a part of
		NetBSD's scanc() function.
20051026	Adding a bitmap for ARM emulation which indicates if a page is
		(specifically) user accessible; loads and stores with the t-
		flag set can now use the translation arrays, which results in
		a measurable speedup.
20051027	Dyntrans updates; adding an extra bitmap array for 32-bit
		emulation modes, speeding up the check whether a physical page
		has any code translations or not (O(n) -> O(1)). Doing a
		similar reduction of O(n) to O(1) by avoiding the scan through
		the translation entries on a translation update (32-bit mode
		only).
		Various other minor hacks.
20051029	Quick release, without any testing at all.

==============  RELEASE 0.3.6.2  ==============


1 #ifndef DEVICES_H
2 #define DEVICES_H
3
4 /*
5 * Copyright (C) 2003-2005 Anders Gavare. All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions are met:
9 *
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 * 3. The name of the author may not be used to endorse or promote products
16 * derived from this software without specific prior written permission.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
19 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28 * SUCH DAMAGE.
29 *
30 *
31 * $Id: devices.h,v 1.188 2005/10/26 14:37:06 debug Exp $
32 *
33 * Memory mapped devices.
34 *
35 * TODO: Separate into lots of smaller files? That might speed up a compile,
36 * but I'm not sure that it's a price worth paying.
37 */
38
39 #include <sys/types.h>
40 #include <inttypes.h>
41
42 struct cpu;
43 struct machine;
44 struct memory;
45 struct pci_data;
46
47 /* #ifdef WITH_X11
48 #include <X11/Xlib.h>
49 #endif */
50
51 /* dev_8259.c: */
52 struct pic8259_data {
53 int irq_nr; /* if connected to another 8259 */
54
55 int irq_base;
56 int current_command;
57
58 int init_state;
59
60 int priority_reg;
61 uint8_t irr; /* interrupt request register */
62 uint8_t isr; /* interrupt in-service register */
63 uint8_t ier; /* interrupt enable register */
64 };
65
66 /* dev_dec_ioasic.c: */
67 #define DEV_DEC_IOASIC_LENGTH 0x80100
68 #define N_DEC_IOASIC_REGS (0x1f0 / 0x10)
69 #define MAX_IOASIC_DMA_FUNCTIONS 8
70 struct dec_ioasic_data {
71 uint32_t reg[N_DEC_IOASIC_REGS];
72 int (*(dma_func[MAX_IOASIC_DMA_FUNCTIONS]))(struct cpu *, void *, uint64_t addr, size_t dma_len, int tx);
73 void *dma_func_extra[MAX_IOASIC_DMA_FUNCTIONS];
74 int rackmount_flag;
75 };
76 int dev_dec_ioasic_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
77 struct dec_ioasic_data *dev_dec_ioasic_init(struct cpu *cpu, struct memory *mem, uint64_t baseaddr, int rackmount_flag);
78
79 /* dev_asc.c: */
80 #define DEV_ASC_DEC_LENGTH 0x40000
81 #define DEV_ASC_PICA_LENGTH 0x1000
82 #define DEV_ASC_DEC 1
83 #define DEV_ASC_PICA 2
84 int dev_asc_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
85 void dev_asc_init(struct machine *machine, struct memory *mem, uint64_t baseaddr,
86 int irq_nr, void *turbochannel, int mode,
87 size_t (*dma_controller)(void *dma_controller_data,
88 unsigned char *data, size_t len, int writeflag),
89 void *dma_controller_data);
90
91 /* dev_au1x00.c: */
92 struct au1x00_ic_data {
93 int ic_nr;
94 uint32_t request0_int;
95 uint32_t request1_int;
96 uint32_t config0;
97 uint32_t config1;
98 uint32_t config2;
99 uint32_t source;
100 uint32_t assign_request;
101 uint32_t wakeup;
102 uint32_t mask;
103 };
104
105 int dev_au1x00_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
106 struct au1x00_ic_data *dev_au1x00_init(struct machine *machine, struct memory *mem);
107
108 /* dev_bt431.c: */
109 #define DEV_BT431_LENGTH 0x20
110 #define DEV_BT431_NREGS 0x800 /* ? */
111 int dev_bt431_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
112 struct vfb_data;
113 void dev_bt431_init(struct memory *mem, uint64_t baseaddr, struct vfb_data *vfb_data, int color_fb_flag);
114
115 /* dev_bt455.c: */
116 #define DEV_BT455_LENGTH 0x20
117 int dev_bt455_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
118 struct vfb_data;
119 void dev_bt455_init(struct memory *mem, uint64_t baseaddr, struct vfb_data *vfb_data);
120
121 /* dev_bt459.c: */
122 #define DEV_BT459_LENGTH 0x20
123 #define DEV_BT459_NREGS 0x1000
124 #define BT459_PX 1 /* px[g] */
125 #define BT459_BA 2 /* cfb */
126 #define BT459_BBA 3 /* sfb */
127 int dev_bt459_access(struct cpu *cpu, struct memory *mem,
128 uint64_t relative_addr, unsigned char *data, size_t len,
129 int writeflag, void *);
130 struct vfb_data;
131 void dev_bt459_init(struct machine *machine, struct memory *mem,
132 uint64_t baseaddr, uint64_t baseaddr_irq, struct vfb_data *vfb_data,
133 int color_fb_flag, int irq_nr, int type);
134
135 /* dev_cons.c: */
136 #define DEV_CONS_ADDRESS 0x0000000010000000
137 #define DEV_CONS_LENGTH 0x0000000000000020
138 #define DEV_CONS_PUTGETCHAR 0x0000
139 #define DEV_CONS_HALT 0x0010
140 struct cons_data {
141 int console_handle;
142 int irq_nr;
143 };
144
145 /* dev_colorplanemask.c: */
146 #define DEV_COLORPLANEMASK_LENGTH 0x0000000000000010
147 int dev_colorplanemask_access(struct cpu *cpu, struct memory *mem,
148 uint64_t relative_addr, unsigned char *data, size_t len,
149 int writeflag, void *);
150 void dev_colorplanemask_init(struct memory *mem, uint64_t baseaddr,
151 unsigned char *color_plane_mask);
152
153 /* dev_dc7085.c: */
154 #define DEV_DC7085_LENGTH 0x0000000000000080
155 /* see dc7085.h for more info */
156 void dev_dc7085_tick(struct cpu *cpu, void *);
157 int dev_dc7085_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
158 int dev_dc7085_init(struct machine *machine, struct memory *mem, uint64_t baseaddr, int irq_nr, int use_fb);
159
160 /* dev_dec5800.c: */
161 #define DEV_DEC5800_LENGTH 0x1000 /* ? */
162 struct dec5800_data {
163 uint32_t csr;
164 uint32_t vector_0x50;
165 };
166 int dev_dec5800_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
167 struct dec5800_data *dev_dec5800_init(struct machine *machine, struct memory *mem, uint64_t baseaddr);
168 /* 16 slots, 0x2000 bytes each */
169 #define DEV_DECBI_LENGTH 0x20000
170 int dev_decbi_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
171 void dev_decbi_init(struct memory *mem, uint64_t baseaddr);
172 #define DEV_DECCCA_LENGTH 0x10000 /* ? */
173 #define DEC_DECCCA_BASEADDR 0x19000000 /* ? I just made this up */
174 int dev_deccca_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
175 void dev_deccca_init(struct memory *mem, uint64_t baseaddr);
176 #define DEV_DECXMI_LENGTH 0x800000
177 int dev_decxmi_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
178 void dev_decxmi_init(struct memory *mem, uint64_t baseaddr);
179
180 /* dev_disk.c: */
181 #define DEV_DISK_ADDRESS 0x13000000
182
183 /* dev_ether.c: */
184 #define DEV_ETHER_ADDRESS 0x14000000
185 #define DEV_ETHER_LENGTH 0x8000
186
187 /* dev_fb.c: */
188 #define DEV_FB_ADDRESS 0x12000000 /* Default for testmips */
189 #define DEV_FB_LENGTH 0x3c0000 /* 3c0000 to not colide with */
190 /* turbochannel rom, */
191 /* otherwise size = 4MB */
192 #define VFB_GENERIC 0
193 #define VFB_HPC 1
194 #define VFB_DEC_VFB01 2
195 #define VFB_DEC_VFB02 3
196 #define VFB_DEC_MAXINE 4
197 #define VFB_PLAYSTATION2 5
198 struct vfb_data {
199 int vfb_type;
200
201 int vfb_scaledown;
202
203 int xsize;
204 int ysize;
205 int bit_depth;
206 int color32k; /* hack for 16-bit HPCmips */
207 int psp_15bit; /* plastation portable hack */
208
209 unsigned char color_plane_mask;
210
211 int bytes_per_line; /* cached */
212
213 int visible_xsize;
214 int visible_ysize;
215
216 size_t framebuffer_size;
217 int x11_xsize, x11_ysize;
218
219 int update_x1, update_y1, update_x2, update_y2;
220
221 /* RGB palette for <= 8 bit modes: (r,g,b bytes for each) */
222 unsigned char rgb_palette[256 * 3];
223
224 /* These should always be in sync: */
225 unsigned char *framebuffer;
226 struct fb_window *fb_window;
227 };
228 #define VFB_MFB_BT455 0x100000
229 #define VFB_MFB_BT431 0x180000
230 #define VFB_MFB_VRAM 0x200000
231 #define VFB_CFB_BT459 0x200000
232 void set_grayscale_palette(struct vfb_data *d, int ncolors);
233 void dev_fb_resize(struct vfb_data *d, int new_xsize, int new_ysize);
234 void dev_fb_setcursor(struct vfb_data *d, int cursor_x, int cursor_y, int on,
235 int cursor_xsize, int cursor_ysize);
236 void framebuffer_blockcopyfill(struct vfb_data *d, int fillflag, int fill_r,
237 int fill_g, int fill_b, int x1, int y1, int x2, int y2,
238 int from_x, int from_y);
239 void dev_fb_tick(struct cpu *, void *);
240 int dev_fb_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr,
241 unsigned char *data, size_t len, int writeflag, void *);
242 struct vfb_data *dev_fb_init(struct machine *machine, struct memory *mem,
243 uint64_t baseaddr, int vfb_type, int visible_xsize, int visible_ysize,
244 int xsize, int ysize, int bit_depth, char *name);
245
246 /* dev_footbridge: */
247 #define N_FOOTBRIDGE_TIMERS 4
248 struct footbridge_data {
249 struct pci_data *pcibus;
250
251 int console_handle;
252
253 int timer_tick_countdown[N_FOOTBRIDGE_TIMERS];
254 uint32_t timer_load[N_FOOTBRIDGE_TIMERS];
255 uint32_t timer_value[N_FOOTBRIDGE_TIMERS];
256 uint32_t timer_control[N_FOOTBRIDGE_TIMERS];
257 int timer_being_read;
258 int timer_poll_mode;
259
260 uint32_t irq_status;
261 uint32_t irq_enable;
262
263 uint32_t fiq_status;
264 uint32_t fiq_enable;
265 };
266
267 /* dev_gt.c: */
268 #define DEV_GT_LENGTH 0x1000
269 int dev_gt_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr,
270 unsigned char *data, size_t len, int writeflag, void *);
271 struct pci_data *dev_gt_init(struct machine *machine, struct memory *mem,
272 uint64_t baseaddr, int irq_nr, int pciirq, int type);
273
274 /* dev_jazz.c: */
275 #define DEV_JAZZ_LENGTH 0x280
276 struct jazz_data {
277 struct cpu *cpu;
278
279 /* Jazz stuff: */
280 uint32_t int_enable_mask;
281 uint32_t int_asserted;
282
283 /* ISA stuff: */
284 uint32_t isa_int_enable_mask;
285 uint32_t isa_int_asserted;
286
287 int interval;
288 int interval_start;
289
290 int jazz_timer_value;
291 int jazz_timer_current;
292
293 uint64_t dma_translation_table_base;
294 uint64_t dma_translation_table_limit;
295
296 uint32_t dma0_mode;
297 uint32_t dma0_enable;
298 uint32_t dma0_count;
299 uint32_t dma0_addr;
300
301 uint32_t dma1_mode;
302 /* same for dma1,2,3 actually (TODO) */
303
304 int led;
305 };
306 size_t dev_jazz_dma_controller(void *dma_controller_data,
307 unsigned char *data, size_t len, int writeflag);
308
309 /* dev_kn01.c: */
310 #define DEV_KN01_CSR_LENGTH 0x0000000000000004
311 int dev_kn01_csr_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
312 void dev_kn01_csr_init(struct memory *mem, uint64_t baseaddr, int color_fb);
313 #define DEV_VDAC_LENGTH 0x20
314 #define DEV_VDAC_MAPWA 0x00
315 #define DEV_VDAC_MAP 0x04
316 #define DEV_VDAC_MASK 0x08
317 #define DEV_VDAC_MAPRA 0x0c
318 #define DEV_VDAC_OVERWA 0x10
319 #define DEV_VDAC_OVER 0x14
320 #define DEV_VDAC_OVERRA 0x1c
321 int dev_vdac_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
322 void dev_vdac_init(struct memory *mem, uint64_t baseaddr, unsigned char *rgb_palette, int color_fb_flag);
323
324 /* dev_kn02.c: */
325 struct kn02_csr {
326 uint8_t csr[sizeof(uint32_t)];
327 uint8_t filler[4096 - sizeof(uint32_t)]; /* for bintrans mapping */
328 };
329 int dev_kn02_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
330 struct kn02_csr *dev_kn02_init(struct cpu *cpu, struct memory *mem,
331 uint64_t baseaddr);
332
333 /* dev_kn220.c: */
334 #define DEV_DEC5500_IOBOARD_LENGTH 0x100000
335 int dev_dec5500_ioboard_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
336 struct dec5500_ioboard_data *dev_dec5500_ioboard_init(struct cpu *cpu, struct memory *mem, uint64_t baseaddr);
337 #define DEV_SGEC_LENGTH 0x1000
338 int dev_sgec_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
339 void dev_sgec_init(struct memory *mem, uint64_t baseaddr, int irq_nr);
340
341 /* dev_kn230.c: */
342 struct kn230_csr {
343 uint32_t csr;
344 };
345
346 /* dev_le.c: */
347 #define DEV_LE_LENGTH 0x1c0200
348 int dev_le_access(struct cpu *cpu, struct memory *mem,
349 uint64_t relative_addr, unsigned char *data, size_t len,
350 int writeflag, void *);
351 void dev_le_init(struct machine *machine, struct memory *mem,
352 uint64_t baseaddr, uint64_t buf_start, uint64_t buf_end,
353 int irq_nr, int len);
354
355 /* dev_m700_fb.c: */
356 #define DEV_M700_FB_LENGTH 0x10000 /* TODO? */
357 int dev_m700_fb_access(struct cpu *cpu, struct memory *mem,
358 uint64_t relative_addr, unsigned char *data, size_t len,
359 int writeflag, void *);
360 void dev_m700_fb_init(struct machine *machine, struct memory *mem,
361 uint64_t baseaddr, uint64_t baseaddr2);
362
363 /* dev_malta.c: */
364 struct malta_data {
365 uint8_t assert_lo;
366 uint8_t assert_hi;
367 uint8_t disable_lo;
368 uint8_t disable_hi;
369 int poll_mode;
370 };
371
372 /* dev_mc146818.c: */
373 #define DEV_MC146818_LENGTH 0x0000000000000100
374 #define MC146818_DEC 0
375 #define MC146818_PC_CMOS 1
376 #define MC146818_ARC_NEC 2
377 #define MC146818_ARC_JAZZ 3
378 #define MC146818_SGI 4
379 #define MC146818_CATS 5
380 /* see mc146818reg.h for more info */
381 void dev_mc146818_tick(struct cpu *cpu, void *);
382 int dev_mc146818_access(struct cpu *cpu, struct memory *mem,
383 uint64_t relative_addr, unsigned char *data, size_t len,
384 int writeflag, void *);
385 void dev_mc146818_init(struct machine *machine, struct memory *mem,
386 uint64_t baseaddr, int irq_nr, int access_style, int addrdiv);
387
388 /* dev_pckbc.c: */
389 #define DEV_PCKBC_LENGTH 0x10
390 #define PCKBC_8042 0
391 #define PCKBC_8242 1
392 #define PCKBC_JAZZ 3
393 int dev_pckbc_access(struct cpu *cpu, struct memory *mem,
394 uint64_t relative_addr, unsigned char *data, size_t len,
395 int writeflag, void *);
396 int dev_pckbc_init(struct machine *machine, struct memory *mem,
397 uint64_t baseaddr, int type, int keyboard_irqnr, int mouse_irqnr,
398 int in_use, int pc_style_flag);
399
400 /* dev_pmppc.c: */
401 int dev_pmppc_board_access(struct cpu *cpu, struct memory *mem,
402 uint64_t relative_addr, unsigned char *data, size_t len, int writeflag,
403 void *);
404 void dev_pmppc_init(struct memory *mem);
405
406 /* dev_ps2_spd.c: */
407 #define DEV_PS2_SPD_LENGTH 0x800
408 int dev_ps2_spd_access(struct cpu *cpu, struct memory *mem,
409 uint64_t relative_addr, unsigned char *data, size_t len,
410 int writeflag, void *);
411 void dev_ps2_spd_init(struct machine *machine, struct memory *mem,
412 uint64_t baseaddr);
413
414 /* dev_ps2_stuff.c: */
415 #include "ps2_dmacreg.h"
416 #define N_PS2_DMA_CHANNELS 10
417 #define N_PS2_TIMERS 4
418 struct ps2_data {
419 uint32_t timer_count[N_PS2_TIMERS];
420 uint32_t timer_comp[N_PS2_TIMERS];
421 uint32_t timer_mode[N_PS2_TIMERS];
422 uint32_t timer_hold[N_PS2_TIMERS]; /* NOTE: only 0 and 1 are valid */
423
424 uint64_t dmac_reg[DMAC_REGSIZE / 0x10];
425
426 uint64_t other_memory_base[N_PS2_DMA_CHANNELS];
427
428 uint32_t intr;
429 uint32_t imask;
430 uint32_t sbus_smflg;
431 };
432 #define DEV_PS2_STUFF_LENGTH 0x10000
433 int dev_ps2_stuff_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
434 struct ps2_data *dev_ps2_stuff_init(struct machine *machine, struct memory *mem, uint64_t baseaddr);
435
436 /* dev_pmagja.c: */
437 #define DEV_PMAGJA_LENGTH 0x3c0000
438 int dev_pmagja_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
439 void dev_pmagja_init(struct machine *machine, struct memory *mem, uint64_t baseaddr, int irq_nr);
440
441 /* dev_px.c: */
442 struct px_data {
443 struct memory *fb_mem;
444 struct vfb_data *vfb_data;
445 int type;
446 char *px_name;
447 int irq_nr;
448 int bitdepth;
449 int xconfig;
450 int yconfig;
451
452 uint32_t intr;
453 unsigned char sram[128 * 1024];
454 };
455 /* TODO: perhaps these types are wrong? */
456 #define DEV_PX_TYPE_PX 0
457 #define DEV_PX_TYPE_PXG 1
458 #define DEV_PX_TYPE_PXGPLUS 2
459 #define DEV_PX_TYPE_PXGPLUSTURBO 3
460 #define DEV_PX_LENGTH 0x3c0000
461 int dev_px_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr,
462 unsigned char *data, size_t len, int writeflag, void *);
463 void dev_px_init(struct machine *machine, struct memory *mem, uint64_t baseaddr,
464 int px_type, int irq_nr);
465
466 /* dev_ram.c: */
467 #define DEV_RAM_RAM 0
468 #define DEV_RAM_MIRROR 1
469 #define DEV_RAM_MIGHT_POINT_TO_DEVICES 0x10
470 int dev_ram_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr,
471 unsigned char *data, size_t len, int writeflag, void *);
472 void dev_ram_init(struct machine *machine, uint64_t baseaddr, uint64_t length,
473 int mode, uint64_t otheraddr);
474
475 /* dev_scc.c: */
476 #define DEV_SCC_LENGTH 0x1000
477 int dev_scc_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr,
478 unsigned char *data, size_t len, int writeflag, void *);
479 int dev_scc_dma_func(struct cpu *cpu, void *extra, uint64_t addr,
480 size_t dma_len, int tx);
481 void *dev_scc_init(struct machine *machine, struct memory *mem,
482 uint64_t baseaddr, int irq_nr, int use_fb, int scc_nr, int addrmul);
483
484 /* dev_sfb.c: */
485 #define DEV_SFB_LENGTH 0x400000
486 int dev_sfb_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr,
487 unsigned char *data, size_t len, int writeflag, void *);
488 void dev_sfb_init(struct machine *machine, struct memory *mem,
489 uint64_t baseaddr, struct vfb_data *vfb_data);
490
491 /* dev_sgi_gbe.c: */
492 #define DEV_SGI_GBE_LENGTH 0x1000000
493 int dev_sgi_gbe_access(struct cpu *cpu, struct memory *mem,
494 uint64_t relative_addr, unsigned char *data, size_t len, int writeflag,
495 void *);
496 void dev_sgi_gbe_init(struct machine *machine, struct memory *mem,
497 uint64_t baseaddr);
498
499 /* dev_sgi_ip20.c: */
500 #define DEV_SGI_IP20_LENGTH 0x40
501 #define DEV_SGI_IP20_BASE 0x1fb801c0
502 struct sgi_ip20_data {
503 int dummy;
504 };
505 int dev_sgi_ip20_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
506 struct sgi_ip20_data *dev_sgi_ip20_init(struct cpu *cpu, struct memory *mem, uint64_t baseaddr);
507
508 /* dev_sgi_ip22.c: */
509 #define DEV_SGI_IP22_LENGTH 0x100
510 #define DEV_SGI_IP22_IMC_LENGTH 0x100
511 #define DEV_SGI_IP22_UNKNOWN2_LENGTH 0x100
512 #define IP22_IMC_BASE 0x1fa00000
513 #define IP22_UNKNOWN2_BASE 0x1fb94000
514 struct sgi_ip22_data {
515 int guiness_flag;
516 uint32_t reg[DEV_SGI_IP22_LENGTH / 4];
517 uint32_t imc_reg[DEV_SGI_IP22_IMC_LENGTH / 4];
518 uint32_t unknown2_reg[DEV_SGI_IP22_UNKNOWN2_LENGTH / 4];
519 uint32_t unknown_timer;
520 };
521 int dev_sgi_ip22_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
522 struct sgi_ip22_data *dev_sgi_ip22_init(struct machine *machine, struct memory *mem, uint64_t baseaddr, int guiness_flag);
523
524 /* dev_sgi_ip30.c: */
525 #define DEV_SGI_IP30_LENGTH 0x80000
526 struct sgi_ip30_data {
527 /* ip30: */
528 uint64_t imask0; /* 0x10000 */
529 uint64_t reg_0x10018;
530 uint64_t isr; /* 0x10030 */
531 uint64_t reg_0x20000;
532 uint64_t reg_0x30000;
533
534 /* ip30_2: */
535 uint64_t reg_0x0029c;
536
537 /* ip30_3: */
538 uint64_t reg_0x00284;
539
540 /* ip30_4: */
541 uint64_t reg_0x000b0;
542
543 /* ip30_5: */
544 uint64_t reg_0x00000;
545 };
546 int dev_sgi_ip30_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
547 struct sgi_ip30_data *dev_sgi_ip30_init(struct machine *machine, struct memory *mem, uint64_t baseaddr);
548
549 /* dev_sgi_ip32.c: */
550 #define DEV_CRIME_LENGTH 0x0000000000001000
551 struct crime_data {
552 unsigned char reg[DEV_CRIME_LENGTH];
553 int irq_nr;
554 int use_fb;
555 };
556 int dev_crime_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
557 struct crime_data *dev_crime_init(struct machine *machine, struct memory *mem, uint64_t baseaddr, int irq_nr, int use_fb);
558 #define DEV_MACE_LENGTH 0x100
559 struct mace_data {
560 unsigned char reg[DEV_MACE_LENGTH];
561 int irqnr;
562 };
563 int dev_mace_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
564 struct mace_data *dev_mace_init(struct memory *mem, uint64_t baseaddr, int irqnr);
565 #define DEV_MACEPCI_LENGTH 0x1000
566 int dev_macepci_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
567 struct pci_data *dev_macepci_init(struct memory *mem, uint64_t baseaddr, int pciirq);
568 #define DEV_SGI_MEC_LENGTH 0x1000
569 int dev_sgi_mec_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
570 void dev_sgi_mec_init(struct machine *machine, struct memory *mem, uint64_t baseaddr, int irq_nr, unsigned char *macaddr);
571 #define DEV_SGI_UST_LENGTH 0x10000
572 int dev_sgi_ust_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
573 void dev_sgi_ust_init(struct memory *mem, uint64_t baseaddr);
574 #define DEV_SGI_MTE_LENGTH 0x10000
575 int dev_sgi_mte_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
576 void dev_sgi_mte_init(struct memory *mem, uint64_t baseaddr);
577
578 /* dev_sii.c: */
579 #define DEV_SII_LENGTH 0x100
580 void dev_sii_tick(struct cpu *cpu, void *);
581 int dev_sii_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
582 void dev_sii_init(struct machine *machine, struct memory *mem, uint64_t baseaddr, uint64_t buf_start, uint64_t buf_end, int irq_nr);
583
584 /* dev_ssc.c: */
585 #define DEV_SSC_LENGTH 0x1000
586 int dev_ssc_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
587 void dev_ssc_init(struct machine *machine, struct memory *mem, uint64_t baseaddr, int irq_nr, int use_fb, uint32_t *);
588
589 /* dev_turbochannel.c: */
590 #define DEV_TURBOCHANNEL_LEN 0x0470
591 int dev_turbochannel_access(struct cpu *cpu, struct memory *mem,
592 uint64_t relative_addr, unsigned char *data, size_t len,
593 int writeflag, void *);
594 void dev_turbochannel_init(struct machine *machine, struct memory *mem,
595 int slot_nr, uint64_t baseaddr, uint64_t endaddr, char *device_name,
596 int irq);
597
598 /* dev_vga.c: */
599 int dev_vga_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr,
600 unsigned char *data, size_t len, int writeflag, void *);
601 void dev_vga_init(struct machine *machine, struct memory *mem,
602 uint64_t videomem_base, uint64_t control_base, char *name);
603
604 /* dev_vr41xx.c: */
605 #define DEV_VR41XX_LENGTH 0x800 /* TODO? */
606 struct vr41xx_data {
607 int cpumodel;
608
609 int kiu_console_handle;
610 int kiu_offset;
611 int kiu_irq_nr;
612 int kiu_int_assert;
613 int d0;
614 int d1;
615 int d2;
616 int d3;
617 int d4;
618 int d5;
619 int dont_clear_next;
620 int escape_state;
621
622 /* See icureg.h in NetBSD for more info. */
623 uint16_t sysint1;
624 uint16_t msysint1;
625 uint16_t giuint;
626 uint16_t giumask;
627 uint16_t sysint2;
628 uint16_t msysint2;
629 };
630
631 int dev_vr41xx_access(struct cpu *cpu, struct memory *mem,
632 uint64_t relative_addr, unsigned char *data, size_t len,
633 int writeflag, void *);
634 struct vr41xx_data *dev_vr41xx_init(struct machine *machine,
635 struct memory *mem, int cpumodel);
636
637 /* dev_wdsc.c: */
638 #define DEV_WDSC_NREGS 0x100 /* 8-bit register select */
639 #define DEV_WDSC_LENGTH 0x10
640 int dev_wdsc_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
641 void dev_wdsc_init(struct machine *machine, struct memory *mem, uint64_t baseaddr, int controller_nr, int irq_nr);
642
643 /* dev_zs.c: */
644 #define DEV_ZS_LENGTH 0x10
645 int dev_zs_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr,
646 unsigned char *data, size_t len, int writeflag, void *);
647 int dev_zs_init(struct machine *machine, struct memory *mem, uint64_t baseaddr,
648 int irq_nr, int addrmult, char *name);
649
650 /* lk201.c: */
651 struct lk201_data {
652 int use_fb;
653 int console_handle;
654
655 void (*add_to_rx_queue)(void *,int,int);
656 void *add_data;
657
658 unsigned char keyb_buf[8];
659 int keyb_buf_pos;
660
661 int mouse_mode;
662 int mouse_revision; /* 0..15 */
663 int mouse_x, mouse_y, mouse_buttons;
664
665 int old_host_mouse_x;
666 int old_host_mouse_y;
667 int old_host_mouse_stays_put;
668 int mouse_check_interval;
669 int mouse_check_interval_reset;
670 };
671 void lk201_tick(struct lk201_data *);
672 void lk201_tx_data(struct lk201_data *, int port, int idata);
673 void lk201_init(struct lk201_data *d, int use_fb,
674 void (*add_to_rx_queue)(void *,int,int), int console_handle, void *);
675
676
677 #endif /* DEVICES_H */
678

  ViewVC Help
Powered by ViewVC 1.1.26