/[gxemul]/trunk/src/include/devices.h
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Contents of /trunk/src/include/devices.h

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Revision 14 - (show annotations)
Mon Oct 8 16:18:51 2007 UTC (16 years, 6 months ago) by dpavlin
File MIME type: text/plain
File size: 25105 byte(s) 
++ trunk/HISTORY	(local)
$Id: HISTORY,v 1.982 2005/10/07 22:45:32 debug Exp $
20050816	Some success in decoding the way the SGI O2 PROM draws graphics
		during bootup; lines/rectangles and bitmaps work, enough to
		show the bootlogo etc. :-)
		Adding more PPC instructions, and (dummy) BAT registers.
20050817	Updating the pckbc to support scancode type 3 keyboards
		(required in order to interact with the SGI O2 PROM).
		Adding more PPC instructions.
20050818	Adding more ARM instructions; general register forms.
		Importing armreg.h from NetBSD (ARM cpu ids). Adding a (dummy)
		CATS machine mode (using SA110 as the default CPU).
		Continuing on general dyntrans related stuff.
20050819	Register forms for ARM load/stores. Gaah! The Compaq C Compiler
		bug is triggered for ARM loads as well, not just PPC :-(
		Adding full support for ARM PC-relative load/stores, and load/
		stores where the PC register is the destination register.
		Adding support for ARM a.out binaries.
20050820	Continuing to add more ARM instructions, and correcting some
		bugs. Continuing on CATS emulation.
		More work on the PPC stuff.
20050821	Minor PPC and ARM updates. Adding more machine types.
20050822	All ARM "data processing instructions" are now generated
		automatically.
20050824	Beginning the work on the ARM system control coprocessor.
		Adding support for ARM halfword load/stores, and signed loads.
20050825	Fixing an important bug related to the ARM condition codes.
		OpenBSD/zaurus and NetBSD/netwinder now print some boot
		messages. :)
		Adding a dummy SH (Hitachi SuperH) cpu family.
		Beginning to add some ARM virtual address translation.
		MIPS bugfixes: unaligned PC now cause an ADEL exception (at
		least for non-bintrans execution), and ADEL/ADES (not
		TLBL/TLBS) are used if userland tries to access kernel space.
		(Thanks to Joshua Wise for making me aware of these bugs.)
20050827	More work on the ARM emulation, and various other updates.
20050828	More ARM updates.
		Finally taking the time to work on translation invalidation
		(i.e. invalidating translated code mappings when memory is
		written to). Hopefully this doesn't break anything.
20050829	Moving CPU related files from src/ to a new subdir, src/cpus/.
		Moving PROM emulation stuff from src/ to src/promemul/.
		Better debug instruction trace for ARM loads and stores.
20050830	Various ARM updates (correcting CMP flag calculation, etc).
20050831	PPC instruction updates. (Flag fixes, etc.)
20050901	Various minor PPC and ARM instruction emulation updates.
		Minor OpenFirmware emulation updates.
20050903	Adding support for adding arbitrary ARM coprocessors (with
		the i80321 I/O coprocessor as a first test).
		Various other ARM and PPC updates.
20050904	Adding some SHcompact disassembly routines.
20050907	(Re)adding a dummy HPPA CPU module, and a dummy i960 module.
20050908	Began hacking on some Apple Partition Table support.
20050909	Adding support for loading Mach-O (Darwin PPC) binaries.
20050910	Fixing an ARM bug (Carry flag was incorrectly updated for some
		data processing instructions); OpenBSD/cats and NetBSD/
		netwinder get quite a bit further now.
		Applying a patch to dev_wdc, and a one-liner to dev_pcic, to
		make them work better when emulating new versions of OpenBSD.
		(Thanks to Alexander Yurchenko for the patches.)
		Also doing some other minor updates to dev_wdc. (Some cleanup,
		and finally converting to devinit, etc.)
20050912	IRIX doesn't have u_int64_t by default (noticed by Andreas
		<avr@gnulinux.nl>); configure updated to reflect this.
		Working on ARM register bank switching, CPSR vs SPSR issues,
		and beginning the work on interrupt/exception support.
20050913	Various minor ARM updates (speeding up load/store multiple,
		and fixing a ROR bug in R(); NetBSD/cats now boots as far as
		OpenBSD/cats).
20050917	Adding a dummy Atmel AVR (8-bit) cpu family skeleton.
20050918	Various minor updates.
20050919	Symbols are now loaded from Mach-O executables.
		Continuing the work on adding ARM exception support.
20050920	More work on ARM stuff: OpenBSD/cats and NetBSD/cats reach
		userland! :-)
20050921	Some more progress on ARM interrupt specifics.
20050923	Fixing linesize for VR4121 (patch by Yurchenko). Also fixing
		linesizes/cachesizes for some other VR4xxx.
		Adding a dummy Acer Labs M1543 PCI-ISA bridge (for CATS) and a
		dummy Symphony Labs 83C553 bridge (for Netwinder), usable by 
		dev_footbridge.
20050924	Some PPC progress.
20050925	More PPC progress.
20050926	PPC progress (fixing some bugs etc); Darwin's kernel gets
		slightly further than before.
20050928	Various updates: footbridge/ISA/pciide stuff, and finally
		fixing the VGA text scroll-by-changing-the-base-offset bug.
20050930	Adding a dummy S3 ViRGE pci card for CATS emulation, which
		both NetBSD and OpenBSD detects as VGA.
		Continuing on Footbridge (timers, ISA interrupt stuff).
20051001	Continuing... there are still bugs, probably interrupt-
		related.
20051002	More work on the Footbridge (interrupt stuff).
20051003	Various minor updates. (Trying to find the bug(s).)
20051004	Continuing on the ARM stuff.
20051005	More ARM-related fixes.
20051007	FINALLY! Found and fixed 2 ARM bugs: 1 memory related, and the
		other was because of an error in the ARM manual (load multiple
		with the S-bit set should _NOT_ load usermode registers, as the
		manual says, but it should load saved registers, which may or
		may not happen to be usermode registers).
		NetBSD/cats and OpenBSD/cats seem to install fine now :-)
		except for a minor bug at the end of the OpenBSD/cats install.
		Updating the documentation, preparing for the next release.
20051008	Continuing with release testing and cleanup.
1 #ifndef DEVICES_H
2 #define DEVICES_H
3
4 /*
5 * Copyright (C) 2003-2005 Anders Gavare. All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions are met:
9 *
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 * 3. The name of the author may not be used to endorse or promote products
16 * derived from this software without specific prior written permission.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
19 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28 * SUCH DAMAGE.
29 *
30 *
31 * $Id: devices.h,v 1.184 2005/10/03 01:07:48 debug Exp $
32 *
33 * Memory mapped devices.
34 *
35 * TODO: Separate into lots of smaller files? That might speed up a compile,
36 * but I'm not sure that it's a price worth paying.
37 */
38
39 #include <sys/types.h>
40 #include <inttypes.h>
41
42 struct cpu;
43 struct machine;
44 struct memory;
45 struct pci_data;
46
47 /* #ifdef WITH_X11
48 #include <X11/Xlib.h>
49 #endif */
50
51 /* dev_8259.c: */
52 struct pic8259_data {
53 int irq_nr; /* if connected to another 8259 */
54
55 int irq_base;
56 int current_command;
57
58 int init_state;
59
60 int priority_reg;
61 uint8_t irr; /* interrupt request register */
62 uint8_t isr; /* interrupt in-service register */
63 uint8_t ier; /* interrupt enable register */
64 };
65
66 /* dev_dec_ioasic.c: */
67 #define DEV_DEC_IOASIC_LENGTH 0x80100
68 #define N_DEC_IOASIC_REGS (0x1f0 / 0x10)
69 #define MAX_IOASIC_DMA_FUNCTIONS 8
70 struct dec_ioasic_data {
71 uint32_t reg[N_DEC_IOASIC_REGS];
72 int (*(dma_func[MAX_IOASIC_DMA_FUNCTIONS]))(struct cpu *, void *, uint64_t addr, size_t dma_len, int tx);
73 void *dma_func_extra[MAX_IOASIC_DMA_FUNCTIONS];
74 int rackmount_flag;
75 };
76 int dev_dec_ioasic_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
77 struct dec_ioasic_data *dev_dec_ioasic_init(struct cpu *cpu, struct memory *mem, uint64_t baseaddr, int rackmount_flag);
78
79 /* dev_asc.c: */
80 #define DEV_ASC_DEC_LENGTH 0x40000
81 #define DEV_ASC_PICA_LENGTH 0x1000
82 #define DEV_ASC_DEC 1
83 #define DEV_ASC_PICA 2
84 int dev_asc_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
85 void dev_asc_init(struct machine *machine, struct memory *mem, uint64_t baseaddr,
86 int irq_nr, void *turbochannel, int mode,
87 size_t (*dma_controller)(void *dma_controller_data,
88 unsigned char *data, size_t len, int writeflag),
89 void *dma_controller_data);
90
91 /* dev_au1x00.c: */
92 struct au1x00_ic_data {
93 int ic_nr;
94 uint32_t request0_int;
95 uint32_t request1_int;
96 uint32_t config0;
97 uint32_t config1;
98 uint32_t config2;
99 uint32_t source;
100 uint32_t assign_request;
101 uint32_t wakeup;
102 uint32_t mask;
103 };
104
105 int dev_au1x00_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
106 struct au1x00_ic_data *dev_au1x00_init(struct machine *machine, struct memory *mem);
107
108 /* dev_bt431.c: */
109 #define DEV_BT431_LENGTH 0x20
110 #define DEV_BT431_NREGS 0x800 /* ? */
111 int dev_bt431_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
112 struct vfb_data;
113 void dev_bt431_init(struct memory *mem, uint64_t baseaddr, struct vfb_data *vfb_data, int color_fb_flag);
114
115 /* dev_bt455.c: */
116 #define DEV_BT455_LENGTH 0x20
117 int dev_bt455_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
118 struct vfb_data;
119 void dev_bt455_init(struct memory *mem, uint64_t baseaddr, struct vfb_data *vfb_data);
120
121 /* dev_bt459.c: */
122 #define DEV_BT459_LENGTH 0x20
123 #define DEV_BT459_NREGS 0x1000
124 #define BT459_PX 1 /* px[g] */
125 #define BT459_BA 2 /* cfb */
126 #define BT459_BBA 3 /* sfb */
127 int dev_bt459_access(struct cpu *cpu, struct memory *mem,
128 uint64_t relative_addr, unsigned char *data, size_t len,
129 int writeflag, void *);
130 struct vfb_data;
131 void dev_bt459_init(struct machine *machine, struct memory *mem,
132 uint64_t baseaddr, uint64_t baseaddr_irq, struct vfb_data *vfb_data,
133 int color_fb_flag, int irq_nr, int type);
134
135 /* dev_cons.c: */
136 #define DEV_CONS_ADDRESS 0x0000000010000000
137 #define DEV_CONS_LENGTH 0x0000000000000020
138 #define DEV_CONS_PUTGETCHAR 0x0000
139 #define DEV_CONS_HALT 0x0010
140 struct cons_data {
141 int console_handle;
142 int irq_nr;
143 };
144
145 /* dev_colorplanemask.c: */
146 #define DEV_COLORPLANEMASK_LENGTH 0x0000000000000010
147 int dev_colorplanemask_access(struct cpu *cpu, struct memory *mem,
148 uint64_t relative_addr, unsigned char *data, size_t len,
149 int writeflag, void *);
150 void dev_colorplanemask_init(struct memory *mem, uint64_t baseaddr,
151 unsigned char *color_plane_mask);
152
153 /* dev_dc7085.c: */
154 #define DEV_DC7085_LENGTH 0x0000000000000080
155 /* see dc7085.h for more info */
156 void dev_dc7085_tick(struct cpu *cpu, void *);
157 int dev_dc7085_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
158 int dev_dc7085_init(struct machine *machine, struct memory *mem, uint64_t baseaddr, int irq_nr, int use_fb);
159
160 /* dev_dec5800.c: */
161 #define DEV_DEC5800_LENGTH 0x1000 /* ? */
162 struct dec5800_data {
163 uint32_t csr;
164 uint32_t vector_0x50;
165 };
166 int dev_dec5800_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
167 struct dec5800_data *dev_dec5800_init(struct machine *machine, struct memory *mem, uint64_t baseaddr);
168 /* 16 slots, 0x2000 bytes each */
169 #define DEV_DECBI_LENGTH 0x20000
170 int dev_decbi_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
171 void dev_decbi_init(struct memory *mem, uint64_t baseaddr);
172 #define DEV_DECCCA_LENGTH 0x10000 /* ? */
173 #define DEC_DECCCA_BASEADDR 0x19000000 /* ? I just made this up */
174 int dev_deccca_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
175 void dev_deccca_init(struct memory *mem, uint64_t baseaddr);
176 #define DEV_DECXMI_LENGTH 0x800000
177 int dev_decxmi_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
178 void dev_decxmi_init(struct memory *mem, uint64_t baseaddr);
179
180 /* dev_disk.c: */
181 #define DEV_DISK_ADDRESS 0x13000000
182
183 /* dev_ether.c: */
184 #define DEV_ETHER_ADDRESS 0x14000000
185 #define DEV_ETHER_LENGTH 0x8000
186
187 /* dev_fb.c: */
188 #define DEV_FB_ADDRESS 0x12000000 /* Default for testmips */
189 #define DEV_FB_LENGTH 0x3c0000 /* 3c0000 to not colide with */
190 /* turbochannel rom, */
191 /* otherwise size = 4MB */
192 #define VFB_GENERIC 0
193 #define VFB_HPCMIPS 1
194 #define VFB_DEC_VFB01 2
195 #define VFB_DEC_VFB02 3
196 #define VFB_DEC_MAXINE 4
197 #define VFB_PLAYSTATION2 5
198 struct vfb_data {
199 int vfb_type;
200
201 int vfb_scaledown;
202
203 int xsize;
204 int ysize;
205 int bit_depth;
206 int color32k; /* hack for 16-bit HPCmips */
207 int psp_15bit; /* plastation portable hack */
208
209 unsigned char color_plane_mask;
210
211 int bytes_per_line; /* cached */
212
213 int visible_xsize;
214 int visible_ysize;
215
216 size_t framebuffer_size;
217 int x11_xsize, x11_ysize;
218
219 int update_x1, update_y1, update_x2, update_y2;
220
221 /* RGB palette for <= 8 bit modes: (r,g,b bytes for each) */
222 unsigned char rgb_palette[256 * 3];
223
224 /* These should always be in sync: */
225 unsigned char *framebuffer;
226 struct fb_window *fb_window;
227 };
228 #define VFB_MFB_BT455 0x100000
229 #define VFB_MFB_BT431 0x180000
230 #define VFB_MFB_VRAM 0x200000
231 #define VFB_CFB_BT459 0x200000
232 void set_grayscale_palette(struct vfb_data *d, int ncolors);
233 void dev_fb_resize(struct vfb_data *d, int new_xsize, int new_ysize);
234 void dev_fb_setcursor(struct vfb_data *d, int cursor_x, int cursor_y, int on,
235 int cursor_xsize, int cursor_ysize);
236 void framebuffer_blockcopyfill(struct vfb_data *d, int fillflag, int fill_r,
237 int fill_g, int fill_b, int x1, int y1, int x2, int y2,
238 int from_x, int from_y);
239 void dev_fb_tick(struct cpu *, void *);
240 int dev_fb_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr,
241 unsigned char *data, size_t len, int writeflag, void *);
242 struct vfb_data *dev_fb_init(struct machine *machine, struct memory *mem,
243 uint64_t baseaddr, int vfb_type, int visible_xsize, int visible_ysize,
244 int xsize, int ysize, int bit_depth, char *name);
245
246 /* dev_footbridge: */
247 #define N_FOOTBRIDGE_TIMERS 4
248 struct footbridge_data {
249 struct pci_data *pcibus;
250
251 int console_handle;
252
253 int timer_tick_countdown[N_FOOTBRIDGE_TIMERS];
254 uint32_t timer_load[N_FOOTBRIDGE_TIMERS];
255 uint32_t timer_value[N_FOOTBRIDGE_TIMERS];
256 uint32_t timer_control[N_FOOTBRIDGE_TIMERS];
257
258 uint32_t irq_status;
259 uint32_t irq_enable;
260
261 uint32_t fiq_status;
262 uint32_t fiq_enable;
263 };
264
265 /* dev_gt.c: */
266 #define DEV_GT_LENGTH 0x1000
267 int dev_gt_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr,
268 unsigned char *data, size_t len, int writeflag, void *);
269 struct pci_data *dev_gt_init(struct machine *machine, struct memory *mem,
270 uint64_t baseaddr, int irq_nr, int pciirq, int type);
271
272 /* dev_jazz.c: */
273 #define DEV_JAZZ_LENGTH 0x280
274 struct jazz_data {
275 struct cpu *cpu;
276
277 /* Jazz stuff: */
278 uint32_t int_enable_mask;
279 uint32_t int_asserted;
280
281 /* ISA stuff: */
282 uint32_t isa_int_enable_mask;
283 uint32_t isa_int_asserted;
284
285 int interval;
286 int interval_start;
287
288 int jazz_timer_value;
289 int jazz_timer_current;
290
291 uint64_t dma_translation_table_base;
292 uint64_t dma_translation_table_limit;
293
294 uint32_t dma0_mode;
295 uint32_t dma0_enable;
296 uint32_t dma0_count;
297 uint32_t dma0_addr;
298
299 uint32_t dma1_mode;
300 /* same for dma1,2,3 actually (TODO) */
301
302 int led;
303 };
304 size_t dev_jazz_dma_controller(void *dma_controller_data,
305 unsigned char *data, size_t len, int writeflag);
306
307 /* dev_kn01.c: */
308 #define DEV_KN01_CSR_LENGTH 0x0000000000000004
309 int dev_kn01_csr_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
310 void dev_kn01_csr_init(struct memory *mem, uint64_t baseaddr, int color_fb);
311 #define DEV_VDAC_LENGTH 0x20
312 #define DEV_VDAC_MAPWA 0x00
313 #define DEV_VDAC_MAP 0x04
314 #define DEV_VDAC_MASK 0x08
315 #define DEV_VDAC_MAPRA 0x0c
316 #define DEV_VDAC_OVERWA 0x10
317 #define DEV_VDAC_OVER 0x14
318 #define DEV_VDAC_OVERRA 0x1c
319 int dev_vdac_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
320 void dev_vdac_init(struct memory *mem, uint64_t baseaddr, unsigned char *rgb_palette, int color_fb_flag);
321
322 /* dev_kn02.c: */
323 struct kn02_csr {
324 uint8_t csr[sizeof(uint32_t)];
325 uint8_t filler[4096 - sizeof(uint32_t)]; /* for bintrans mapping */
326 };
327 int dev_kn02_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
328 struct kn02_csr *dev_kn02_init(struct cpu *cpu, struct memory *mem,
329 uint64_t baseaddr);
330
331 /* dev_kn220.c: */
332 #define DEV_DEC5500_IOBOARD_LENGTH 0x100000
333 int dev_dec5500_ioboard_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
334 struct dec5500_ioboard_data *dev_dec5500_ioboard_init(struct cpu *cpu, struct memory *mem, uint64_t baseaddr);
335 #define DEV_SGEC_LENGTH 0x1000
336 int dev_sgec_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
337 void dev_sgec_init(struct memory *mem, uint64_t baseaddr, int irq_nr);
338
339 /* dev_kn230.c: */
340 struct kn230_csr {
341 uint32_t csr;
342 };
343
344 /* dev_le.c: */
345 #define DEV_LE_LENGTH 0x1c0200
346 int dev_le_access(struct cpu *cpu, struct memory *mem,
347 uint64_t relative_addr, unsigned char *data, size_t len,
348 int writeflag, void *);
349 void dev_le_init(struct machine *machine, struct memory *mem,
350 uint64_t baseaddr, uint64_t buf_start, uint64_t buf_end,
351 int irq_nr, int len);
352
353 /* dev_m700_fb.c: */
354 #define DEV_M700_FB_LENGTH 0x10000 /* TODO? */
355 int dev_m700_fb_access(struct cpu *cpu, struct memory *mem,
356 uint64_t relative_addr, unsigned char *data, size_t len,
357 int writeflag, void *);
358 void dev_m700_fb_init(struct machine *machine, struct memory *mem,
359 uint64_t baseaddr, uint64_t baseaddr2);
360
361 /* dev_malta.c: */
362 struct malta_data {
363 uint8_t assert_lo;
364 uint8_t assert_hi;
365 uint8_t disable_lo;
366 uint8_t disable_hi;
367 int poll_mode;
368 };
369
370 /* dev_mc146818.c: */
371 #define DEV_MC146818_LENGTH 0x0000000000000100
372 #define MC146818_DEC 0
373 #define MC146818_PC_CMOS 1
374 #define MC146818_ARC_NEC 2
375 #define MC146818_ARC_JAZZ 3
376 #define MC146818_SGI 4
377 /* see mc146818reg.h for more info */
378 void dev_mc146818_tick(struct cpu *cpu, void *);
379 int dev_mc146818_access(struct cpu *cpu, struct memory *mem,
380 uint64_t relative_addr, unsigned char *data, size_t len,
381 int writeflag, void *);
382 void dev_mc146818_init(struct machine *machine, struct memory *mem,
383 uint64_t baseaddr, int irq_nr, int access_style, int addrdiv);
384
385 /* dev_pckbc.c: */
386 #define DEV_PCKBC_LENGTH 0x10
387 #define PCKBC_8042 0
388 #define PCKBC_8242 1
389 #define PCKBC_JAZZ 3
390 int dev_pckbc_access(struct cpu *cpu, struct memory *mem,
391 uint64_t relative_addr, unsigned char *data, size_t len,
392 int writeflag, void *);
393 int dev_pckbc_init(struct machine *machine, struct memory *mem,
394 uint64_t baseaddr, int type, int keyboard_irqnr, int mouse_irqnr,
395 int in_use, int pc_style_flag);
396
397 /* dev_pmppc.c: */
398 int dev_pmppc_board_access(struct cpu *cpu, struct memory *mem,
399 uint64_t relative_addr, unsigned char *data, size_t len, int writeflag,
400 void *);
401 void dev_pmppc_init(struct memory *mem);
402
403 /* dev_ps2_spd.c: */
404 #define DEV_PS2_SPD_LENGTH 0x800
405 int dev_ps2_spd_access(struct cpu *cpu, struct memory *mem,
406 uint64_t relative_addr, unsigned char *data, size_t len,
407 int writeflag, void *);
408 void dev_ps2_spd_init(struct machine *machine, struct memory *mem,
409 uint64_t baseaddr);
410
411 /* dev_ps2_stuff.c: */
412 #include "ps2_dmacreg.h"
413 #define N_PS2_DMA_CHANNELS 10
414 #define N_PS2_TIMERS 4
415 struct ps2_data {
416 uint32_t timer_count[N_PS2_TIMERS];
417 uint32_t timer_comp[N_PS2_TIMERS];
418 uint32_t timer_mode[N_PS2_TIMERS];
419 uint32_t timer_hold[N_PS2_TIMERS]; /* NOTE: only 0 and 1 are valid */
420
421 uint64_t dmac_reg[DMAC_REGSIZE / 0x10];
422
423 uint64_t other_memory_base[N_PS2_DMA_CHANNELS];
424
425 uint32_t intr;
426 uint32_t imask;
427 uint32_t sbus_smflg;
428 };
429 #define DEV_PS2_STUFF_LENGTH 0x10000
430 int dev_ps2_stuff_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
431 struct ps2_data *dev_ps2_stuff_init(struct machine *machine, struct memory *mem, uint64_t baseaddr);
432
433 /* dev_pmagja.c: */
434 #define DEV_PMAGJA_LENGTH 0x3c0000
435 int dev_pmagja_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
436 void dev_pmagja_init(struct machine *machine, struct memory *mem, uint64_t baseaddr, int irq_nr);
437
438 /* dev_px.c: */
439 struct px_data {
440 struct memory *fb_mem;
441 struct vfb_data *vfb_data;
442 int type;
443 char *px_name;
444 int irq_nr;
445 int bitdepth;
446 int xconfig;
447 int yconfig;
448
449 uint32_t intr;
450 unsigned char sram[128 * 1024];
451 };
452 /* TODO: perhaps these types are wrong? */
453 #define DEV_PX_TYPE_PX 0
454 #define DEV_PX_TYPE_PXG 1
455 #define DEV_PX_TYPE_PXGPLUS 2
456 #define DEV_PX_TYPE_PXGPLUSTURBO 3
457 #define DEV_PX_LENGTH 0x3c0000
458 int dev_px_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
459 void dev_px_init(struct machine *machine, struct memory *mem, uint64_t baseaddr, int px_type, int irq_nr);
460
461 /* dev_ram.c: */
462 #define DEV_RAM_RAM 0
463 #define DEV_RAM_MIRROR 1
464 int dev_ram_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
465 void dev_ram_init(struct memory *mem, uint64_t baseaddr, uint64_t length, int mode, uint64_t otheraddr);
466
467 /* dev_scc.c: */
468 #define DEV_SCC_LENGTH 0x1000
469 int dev_scc_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
470 int dev_scc_dma_func(struct cpu *cpu, void *extra, uint64_t addr, size_t dma_len, int tx);
471 void *dev_scc_init(struct machine *machine, struct memory *mem, uint64_t baseaddr, int irq_nr, int use_fb, int scc_nr, int addrmul);
472
473 /* dev_sfb.c: */
474 #define DEV_SFB_LENGTH 0x400000
475 int dev_sfb_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
476 void dev_sfb_init(struct machine *machine, struct memory *mem, uint64_t baseaddr, struct vfb_data *vfb_data);
477
478 /* dev_sgi_gbe.c: */
479 #define DEV_SGI_GBE_LENGTH 0x1000000
480 int dev_sgi_gbe_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
481 void dev_sgi_gbe_init(struct machine *machine, struct memory *mem, uint64_t baseaddr);
482
483 /* dev_sgi_ip20.c: */
484 #define DEV_SGI_IP20_LENGTH 0x40
485 #define DEV_SGI_IP20_BASE 0x1fb801c0
486 struct sgi_ip20_data {
487 int dummy;
488 };
489 int dev_sgi_ip20_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
490 struct sgi_ip20_data *dev_sgi_ip20_init(struct cpu *cpu, struct memory *mem, uint64_t baseaddr);
491
492 /* dev_sgi_ip22.c: */
493 #define DEV_SGI_IP22_LENGTH 0x100
494 #define DEV_SGI_IP22_IMC_LENGTH 0x100
495 #define DEV_SGI_IP22_UNKNOWN2_LENGTH 0x100
496 #define IP22_IMC_BASE 0x1fa00000
497 #define IP22_UNKNOWN2_BASE 0x1fb94000
498 struct sgi_ip22_data {
499 int guiness_flag;
500 uint32_t reg[DEV_SGI_IP22_LENGTH / 4];
501 uint32_t imc_reg[DEV_SGI_IP22_IMC_LENGTH / 4];
502 uint32_t unknown2_reg[DEV_SGI_IP22_UNKNOWN2_LENGTH / 4];
503 uint32_t unknown_timer;
504 };
505 int dev_sgi_ip22_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
506 struct sgi_ip22_data *dev_sgi_ip22_init(struct machine *machine, struct memory *mem, uint64_t baseaddr, int guiness_flag);
507
508 /* dev_sgi_ip30.c: */
509 #define DEV_SGI_IP30_LENGTH 0x80000
510 struct sgi_ip30_data {
511 /* ip30: */
512 uint64_t imask0; /* 0x10000 */
513 uint64_t reg_0x10018;
514 uint64_t isr; /* 0x10030 */
515 uint64_t reg_0x20000;
516 uint64_t reg_0x30000;
517
518 /* ip30_2: */
519 uint64_t reg_0x0029c;
520
521 /* ip30_3: */
522 uint64_t reg_0x00284;
523
524 /* ip30_4: */
525 uint64_t reg_0x000b0;
526
527 /* ip30_5: */
528 uint64_t reg_0x00000;
529 };
530 int dev_sgi_ip30_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
531 struct sgi_ip30_data *dev_sgi_ip30_init(struct machine *machine, struct memory *mem, uint64_t baseaddr);
532
533 /* dev_sgi_ip32.c: */
534 #define DEV_CRIME_LENGTH 0x0000000000001000
535 struct crime_data {
536 unsigned char reg[DEV_CRIME_LENGTH];
537 int irq_nr;
538 int use_fb;
539 };
540 int dev_crime_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
541 struct crime_data *dev_crime_init(struct machine *machine, struct memory *mem, uint64_t baseaddr, int irq_nr, int use_fb);
542 #define DEV_MACE_LENGTH 0x100
543 struct mace_data {
544 unsigned char reg[DEV_MACE_LENGTH];
545 int irqnr;
546 };
547 int dev_mace_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
548 struct mace_data *dev_mace_init(struct memory *mem, uint64_t baseaddr, int irqnr);
549 #define DEV_MACEPCI_LENGTH 0x1000
550 int dev_macepci_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
551 struct pci_data *dev_macepci_init(struct memory *mem, uint64_t baseaddr, int pciirq);
552 #define DEV_SGI_MEC_LENGTH 0x1000
553 int dev_sgi_mec_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
554 void dev_sgi_mec_init(struct machine *machine, struct memory *mem, uint64_t baseaddr, int irq_nr, unsigned char *macaddr);
555 #define DEV_SGI_UST_LENGTH 0x10000
556 int dev_sgi_ust_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
557 void dev_sgi_ust_init(struct memory *mem, uint64_t baseaddr);
558 #define DEV_SGI_MTE_LENGTH 0x10000
559 int dev_sgi_mte_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
560 void dev_sgi_mte_init(struct memory *mem, uint64_t baseaddr);
561
562 /* dev_sii.c: */
563 #define DEV_SII_LENGTH 0x100
564 void dev_sii_tick(struct cpu *cpu, void *);
565 int dev_sii_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
566 void dev_sii_init(struct machine *machine, struct memory *mem, uint64_t baseaddr, uint64_t buf_start, uint64_t buf_end, int irq_nr);
567
568 /* dev_ssc.c: */
569 #define DEV_SSC_LENGTH 0x1000
570 int dev_ssc_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
571 void dev_ssc_init(struct machine *machine, struct memory *mem, uint64_t baseaddr, int irq_nr, int use_fb, uint32_t *);
572
573 /* dev_turbochannel.c: */
574 #define DEV_TURBOCHANNEL_LEN 0x0470
575 int dev_turbochannel_access(struct cpu *cpu, struct memory *mem,
576 uint64_t relative_addr, unsigned char *data, size_t len,
577 int writeflag, void *);
578 void dev_turbochannel_init(struct machine *machine, struct memory *mem,
579 int slot_nr, uint64_t baseaddr, uint64_t endaddr, char *device_name,
580 int irq);
581
582 /* dev_vga.c: */
583 int dev_vga_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr,
584 unsigned char *data, size_t len, int writeflag, void *);
585 void dev_vga_init(struct machine *machine, struct memory *mem,
586 uint64_t videomem_base, uint64_t control_base, char *name);
587
588 /* dev_vr41xx.c: */
589 #define DEV_VR41XX_LENGTH 0x800 /* TODO? */
590 struct vr41xx_data {
591 int cpumodel;
592
593 int kiu_console_handle;
594 int kiu_offset;
595 int kiu_irq_nr;
596 int kiu_int_assert;
597 int d0;
598 int d1;
599 int d2;
600 int d3;
601 int d4;
602 int d5;
603 int dont_clear_next;
604 int escape_state;
605
606 /* See icureg.h in NetBSD for more info. */
607 uint16_t sysint1;
608 uint16_t msysint1;
609 uint16_t giuint;
610 uint16_t giumask;
611 uint16_t sysint2;
612 uint16_t msysint2;
613 };
614
615 int dev_vr41xx_access(struct cpu *cpu, struct memory *mem,
616 uint64_t relative_addr, unsigned char *data, size_t len,
617 int writeflag, void *);
618 struct vr41xx_data *dev_vr41xx_init(struct machine *machine,
619 struct memory *mem, int cpumodel);
620
621 /* dev_wdsc.c: */
622 #define DEV_WDSC_NREGS 0x100 /* 8-bit register select */
623 #define DEV_WDSC_LENGTH 0x10
624 int dev_wdsc_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
625 void dev_wdsc_init(struct machine *machine, struct memory *mem, uint64_t baseaddr, int controller_nr, int irq_nr);
626
627 /* dev_zs.c: */
628 #define DEV_ZS_LENGTH 0x10
629 int dev_zs_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr,
630 unsigned char *data, size_t len, int writeflag, void *);
631 int dev_zs_init(struct machine *machine, struct memory *mem, uint64_t baseaddr,
632 int irq_nr, int addrmult, char *name);
633
634 /* lk201.c: */
635 struct lk201_data {
636 int use_fb;
637 int console_handle;
638
639 void (*add_to_rx_queue)(void *,int,int);
640 void *add_data;
641
642 unsigned char keyb_buf[8];
643 int keyb_buf_pos;
644
645 int mouse_mode;
646 int mouse_revision; /* 0..15 */
647 int mouse_x, mouse_y, mouse_buttons;
648
649 int old_host_mouse_x;
650 int old_host_mouse_y;
651 int old_host_mouse_stays_put;
652 int mouse_check_interval;
653 int mouse_check_interval_reset;
654 };
655 void lk201_tick(struct lk201_data *);
656 void lk201_tx_data(struct lk201_data *, int port, int idata);
657 void lk201_init(struct lk201_data *d, int use_fb,
658 void (*add_to_rx_queue)(void *,int,int), int console_handle, void *);
659
660
661 #endif /* DEVICES_H */
662
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