/[gxemul]/trunk/src/include/devices.h
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Contents of /trunk/src/include/devices.h

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Revision 12 - (show annotations)
Mon Oct 8 16:18:38 2007 UTC (13 years, 3 months ago) by dpavlin
File MIME type: text/plain
File size: 24967 byte(s)
++ trunk/HISTORY	(local)
$Id: HISTORY,v 1.905 2005/08/16 09:16:24 debug Exp $
20050628	Continuing the work on the ARM translation engine. end_of_page
		works. Experimenting with load/store translation caches
		(virtual -> physical -> host).
20050629	More ARM stuff (memory access translation cache, mostly). This
		might break a lot of stuff elsewhere, probably some MIPS-
		related translation things.
20050630	Many load/stores are now automatically generated and included
		into cpu_arm_instr.c; 1024 functions in total (!).
		Fixes based on feedback from Alec Voropay: only print 8 hex
		digits instead of 16 in some cases when emulating 32-bit
		machines; similar 8 vs 16 digit fix for breakpoint addresses;
		4Kc has 16 TLB entries, not 48; the MIPS config select1
		register is now printed with "reg ,0".
		Also changing many other occurances of 16 vs 8 digit output.
		Adding cache associativity fields to mips_cpu_types.h; updating
		some other cache fields; making the output of
		mips_cpu_dumpinfo() look nicer.
		Generalizing the bintrans stuff for device accesses to also
		work with the new translation system. (This might also break
		some MIPS things.)
		Adding multi-load/store instructions to the ARM disassembler
		and the translator, and some optimizations of various kinds.
20050701	Adding a simple dev_disk (it can read/write sectors from
		disk images).
20050712	Adding dev_ether (a simple ethernet send/receive device).
		Debugger command "ninstrs" for toggling show_nr_of_instructions
		during runtime.
		Removing the framebuffer logo.
20050713	Continuing on dev_ether.
		Adding a dummy cpu_alpha (again).
20050714	More work on cpu_alpha.
20050715	More work on cpu_alpha. Many instructions work, enough to run
		a simple framebuffer fill test (similar to the ARM test).
20050716	More Alpha stuff.
20050717	Minor updates (Alpha stuff).
20050718	Minor updates (Alpha stuff).
20050719	Generalizing some Alpha instructions.
20050720	More Alpha-related updates.
20050721	Continuing on cpu_alpha. Importing rpb.h from NetBSD/alpha.
20050722	Alpha-related updates: userland stuff (Hello World using
		write() compiled statically for FreeBSD/Alpha runs fine), and
		more instructions are now implemented.
20050723	Fixing ldq_u and stq_u.
		Adding more instructions (conditional moves, masks, extracts,
		shifts).
20050724	More FreeBSD/Alpha userland stuff, and adding some more
		instructions (inserts).
20050725	Continuing on the Alpha stuff. (Adding dummy ldt/stt.)
		Adding a -A command line option to turn off alignment checks
		in some cases (for translated code).
		Trying to remove the old bintrans code which updated the pc
		and nr_of_executed_instructions for every instruction.
20050726	Making another attempt att removing the pc/nr of instructions
		code. This time it worked, huge performance increase for
		artificial test code, but performance loss for real-world
		code :-( so I'm scrapping that code for now.
		Tiny performance increase on Alpha (by using ret instead of
		jmp, to play nice with the Alpha's branch prediction) for the
		old MIPS bintrans backend.
20050727	Various minor fixes and cleanups.
20050728	Switching from a 2-level virtual to host/physical translation
		system for ARM emulation, to a 1-level translation.
		Trying to switch from 2-level to 1-level for the MIPS bintrans
		system as well (Alpha only, so far), but there is at least one
		problem: caches and/or how they work with device mappings.
20050730	Doing the 2-level to 1-level conversion for the i386 backend.
		The cache/device bug is still there for R2K/3K :(
		Various other minor updates (Malta etc).
		The mc146818 clock now updates the UIP bit in a way which works
		better with Linux for at least sgimips and Malta emulation.
		Beginning the work on refactoring the dyntrans system.
20050731	Continuing the dyntrans refactoring.
		Fixing a small but serious host alignment bug in memory_rw.
		Adding support for big-endian load/stores to the i386 bintrans
		backend.
		Another minor i386 bintrans backend update: stores from the
		zero register are now one (or two) loads shorter.
		The slt and sltu instructions were incorrectly implemented for
		the i386 backend; only using them for 32-bit mode for now.
20050801	Continuing the dyntrans refactoring.
		Cleanup of the ns16550 serial controller (removing unnecessary
		code).
		Bugfix (memory corruption bug) in dev_gt, and a patch/hack from
		Alec Voropay for Linux/Malta.
20050802	More cleanup/refactoring of the dyntrans subsystem: adding
		phys_page pointers to the lookup tables, for quick jumps
		between translated pages.
		Better fix for the ns16550 device (but still no real FIFO
		functionality).
		Converting cpu_ppc to the new dyntrans system. This means that
		I will have to start from scratch with implementing each
		instruction, and figure out how to implement dual 64/32-bit
		modes etc.
		Removing the URISC CPU family, because it was useless.
20050803	When selecting a machine type, the main type can now be omitted
		if the subtype name is unique. (I.e. -E can be omitted.)
		Fixing a dyntrans/device update bug. (Writes to offset 0 of
		a device could sometimes go unnoticed.)
		Adding an experimental "instruction combination" hack for
		ARM for memset-like byte fill loops.
20050804	Minor progress on cpu_alpha and related things.
		Finally fixing the MIPS dmult/dmultu bugs.
		Fixing some minor TODOs.
20050805	Generalizing the 8259 PIC. It now also works with Cobalt
		and evbmips emulation, in addition to the x86 hack.
		Finally converting the ns16550 device to use devinit.
		Continuing the work on the dyntrans system. Thinking about
		how to add breakpoints.
20050806	More dyntrans updates. Breakpoints seem to work now.
20050807	Minor updates: cpu_alpha and related things; removing
		dev_malta (as it isn't used any more).
		Dyntrans: working on general "show trace tree" support.
		The trace tree stuff now works with both the old MIPS code and
		with newer dyntrans modes. :)
		Continuing on Alpha-related stuff (trying to get *BSD to boot
		a bit further, adding more instructions, etc).
20050808	Adding a dummy IA64 cpu family, and continuing the refactoring
		of the dyntrans system.
		Removing the regression test stuff, because it was more or
		less useless.
		Adding loadlinked/storeconditional type instructions to the
		Alpha emulation. (Needed for Linux/alpha. Not very well tested
		yet.)
20050809	The function call trace tree now prints a per-function nr of
		arguments. (Semi-meaningless, since that data isn't read yet
		from the ELFs; some hardcoded symbols such as memcpy() and
		strlen() work fine, though.)
		More dyntrans refactoring; taking out more of the things that
		are common to all cpu families.
20050810	Working on adding support for "dual mode" for PPC dyntrans
		(i.e. both 64-bit and 32-bit modes).
		(Re)adding some simple PPC instructions.
20050811	Adding a dummy M68K cpu family. The dyntrans system isn't ready
		for variable-length ISAs yet, so it's completely bogus so far.
		Re-adding more PPC instructions.
		Adding a hack to src/file.c which allows OpenBSD/mac68k a.out
		kernels to be loaded.
		Beginning to add PPC loads/stores. So far they only work in
		32-bit mode.
20050812	The configure file option "add_remote" now accepts symbolic
		host names, in addition to numeric IPv4 addresses.
		Re-adding more PPC instructions.
20050814	Continuing to port back more PPC instructions.
		Found and fixed the cache/device write-update bug for 32-bit
		MIPS bintrans. :-)
		Triggered a really weird and annoying bug in Compaq's C
		compiler; ccc sometimes outputs code which loads from an
		address _before_ checking whether the pointer was NULL or not.
		(I'm not sure how to handle this problem.)
20050815	Removing all of the old x86 instruction execution code; adding
		a new (dummy) dyntrans module for x86.
		Taking the first steps to extend the dyntrans system to support
		variable-length instructions.
		Slowly preparing for the next release.
20050816	Adding a dummy SPARC cpu module.
		Minor updates (documentation etc) for the release.

==============  RELEASE 0.3.5  ==============


1 #ifndef DEVICES_H
2 #define DEVICES_H
3
4 /*
5 * Copyright (C) 2003-2005 Anders Gavare. All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions are met:
9 *
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 * 3. The name of the author may not be used to endorse or promote products
16 * derived from this software without specific prior written permission.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
19 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28 * SUCH DAMAGE.
29 *
30 *
31 * $Id: devices.h,v 1.176 2005/08/05 09:11:49 debug Exp $
32 *
33 * Memory mapped devices.
34 *
35 * TODO: Separate into lots of smaller files? That might speed up a compile,
36 * but I'm not sure that it's a price worth paying.
37 */
38
39 #include <sys/types.h>
40 #include <inttypes.h>
41
42 struct cpu;
43 struct machine;
44 struct memory;
45 struct pci_data;
46
47 /* #ifdef WITH_X11
48 #include <X11/Xlib.h>
49 #endif */
50
51 /* dev_8259.c: */
52 struct pic8259_data {
53 int irq_nr; /* if connected to another 8259 */
54
55 int irq_base;
56 int current_command;
57
58 int init_state;
59
60 int priority_reg;
61 uint8_t irr; /* interrupt request register */
62 uint8_t isr; /* interrupt in-service register */
63 uint8_t ier; /* interrupt enable register */
64 };
65
66 /* dev_dec_ioasic.c: */
67 #define DEV_DEC_IOASIC_LENGTH 0x80100
68 #define N_DEC_IOASIC_REGS (0x1f0 / 0x10)
69 #define MAX_IOASIC_DMA_FUNCTIONS 8
70 struct dec_ioasic_data {
71 uint32_t reg[N_DEC_IOASIC_REGS];
72 int (*(dma_func[MAX_IOASIC_DMA_FUNCTIONS]))(struct cpu *, void *, uint64_t addr, size_t dma_len, int tx);
73 void *dma_func_extra[MAX_IOASIC_DMA_FUNCTIONS];
74 int rackmount_flag;
75 };
76 int dev_dec_ioasic_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
77 struct dec_ioasic_data *dev_dec_ioasic_init(struct cpu *cpu, struct memory *mem, uint64_t baseaddr, int rackmount_flag);
78
79 /* dev_asc.c: */
80 #define DEV_ASC_DEC_LENGTH 0x40000
81 #define DEV_ASC_PICA_LENGTH 0x1000
82 #define DEV_ASC_DEC 1
83 #define DEV_ASC_PICA 2
84 int dev_asc_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
85 void dev_asc_init(struct machine *machine, struct memory *mem, uint64_t baseaddr,
86 int irq_nr, void *turbochannel, int mode,
87 size_t (*dma_controller)(void *dma_controller_data,
88 unsigned char *data, size_t len, int writeflag),
89 void *dma_controller_data);
90
91 /* dev_au1x00.c: */
92 struct au1x00_ic_data {
93 int ic_nr;
94 uint32_t request0_int;
95 uint32_t request1_int;
96 uint32_t config0;
97 uint32_t config1;
98 uint32_t config2;
99 uint32_t source;
100 uint32_t assign_request;
101 uint32_t wakeup;
102 uint32_t mask;
103 };
104
105 int dev_au1x00_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
106 struct au1x00_ic_data *dev_au1x00_init(struct machine *machine, struct memory *mem);
107
108 /* dev_bt431.c: */
109 #define DEV_BT431_LENGTH 0x20
110 #define DEV_BT431_NREGS 0x800 /* ? */
111 int dev_bt431_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
112 struct vfb_data;
113 void dev_bt431_init(struct memory *mem, uint64_t baseaddr, struct vfb_data *vfb_data, int color_fb_flag);
114
115 /* dev_bt455.c: */
116 #define DEV_BT455_LENGTH 0x20
117 int dev_bt455_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
118 struct vfb_data;
119 void dev_bt455_init(struct memory *mem, uint64_t baseaddr, struct vfb_data *vfb_data);
120
121 /* dev_bt459.c: */
122 #define DEV_BT459_LENGTH 0x20
123 #define DEV_BT459_NREGS 0x1000
124 #define BT459_PX 1 /* px[g] */
125 #define BT459_BA 2 /* cfb */
126 #define BT459_BBA 3 /* sfb */
127 int dev_bt459_access(struct cpu *cpu, struct memory *mem,
128 uint64_t relative_addr, unsigned char *data, size_t len,
129 int writeflag, void *);
130 struct vfb_data;
131 void dev_bt459_init(struct machine *machine, struct memory *mem,
132 uint64_t baseaddr, uint64_t baseaddr_irq, struct vfb_data *vfb_data,
133 int color_fb_flag, int irq_nr, int type);
134
135 /* dev_cons.c: */
136 #define DEV_CONS_ADDRESS 0x0000000010000000
137 #define DEV_CONS_LENGTH 0x0000000000000020
138 #define DEV_CONS_PUTGETCHAR 0x0000
139 #define DEV_CONS_HALT 0x0010
140 struct cons_data {
141 int console_handle;
142 int irq_nr;
143 };
144
145 /* dev_colorplanemask.c: */
146 #define DEV_COLORPLANEMASK_LENGTH 0x0000000000000010
147 int dev_colorplanemask_access(struct cpu *cpu, struct memory *mem,
148 uint64_t relative_addr, unsigned char *data, size_t len,
149 int writeflag, void *);
150 void dev_colorplanemask_init(struct memory *mem, uint64_t baseaddr,
151 unsigned char *color_plane_mask);
152
153 /* dev_dc7085.c: */
154 #define DEV_DC7085_LENGTH 0x0000000000000080
155 /* see dc7085.h for more info */
156 void dev_dc7085_tick(struct cpu *cpu, void *);
157 int dev_dc7085_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
158 int dev_dc7085_init(struct machine *machine, struct memory *mem, uint64_t baseaddr, int irq_nr, int use_fb);
159
160 /* dev_dec5800.c: */
161 #define DEV_DEC5800_LENGTH 0x1000 /* ? */
162 struct dec5800_data {
163 uint32_t csr;
164 uint32_t vector_0x50;
165 };
166 int dev_dec5800_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
167 struct dec5800_data *dev_dec5800_init(struct machine *machine, struct memory *mem, uint64_t baseaddr);
168 /* 16 slots, 0x2000 bytes each */
169 #define DEV_DECBI_LENGTH 0x20000
170 int dev_decbi_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
171 void dev_decbi_init(struct memory *mem, uint64_t baseaddr);
172 #define DEV_DECCCA_LENGTH 0x10000 /* ? */
173 #define DEC_DECCCA_BASEADDR 0x19000000 /* ? I just made this up */
174 int dev_deccca_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
175 void dev_deccca_init(struct memory *mem, uint64_t baseaddr);
176 #define DEV_DECXMI_LENGTH 0x800000
177 int dev_decxmi_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
178 void dev_decxmi_init(struct memory *mem, uint64_t baseaddr);
179
180 /* dev_disk.c: */
181 #define DEV_DISK_ADDRESS 0x13000000
182
183 /* dev_ether.c: */
184 #define DEV_ETHER_ADDRESS 0x14000000
185 #define DEV_ETHER_LENGTH 0x8000
186
187 /* dev_fb.c: */
188 #define DEV_FB_ADDRESS 0x12000000 /* Default for testmips */
189 #define DEV_FB_LENGTH 0x3c0000 /* 3c0000 to not colide with */
190 /* turbochannel rom, */
191 /* otherwise size = 4MB */
192 #define VFB_GENERIC 0
193 #define VFB_HPCMIPS 1
194 #define VFB_DEC_VFB01 2
195 #define VFB_DEC_VFB02 3
196 #define VFB_DEC_MAXINE 4
197 #define VFB_PLAYSTATION2 5
198 struct vfb_data {
199 int vfb_type;
200
201 int vfb_scaledown;
202
203 int xsize;
204 int ysize;
205 int bit_depth;
206 int color32k; /* hack for 16-bit HPCmips */
207 int psp_15bit; /* plastation portable hack */
208
209 unsigned char color_plane_mask;
210
211 int bytes_per_line; /* cached */
212
213 int visible_xsize;
214 int visible_ysize;
215
216 size_t framebuffer_size;
217 int x11_xsize, x11_ysize;
218
219 int update_x1, update_y1, update_x2, update_y2;
220
221 /* RGB palette for <= 8 bit modes: (r,g,b bytes for each) */
222 unsigned char rgb_palette[256 * 3];
223
224 /* These should always be in sync: */
225 unsigned char *framebuffer;
226 struct fb_window *fb_window;
227 };
228 #define VFB_MFB_BT455 0x100000
229 #define VFB_MFB_BT431 0x180000
230 #define VFB_MFB_VRAM 0x200000
231 #define VFB_CFB_BT459 0x200000
232 void set_grayscale_palette(struct vfb_data *d, int ncolors);
233 void dev_fb_resize(struct vfb_data *d, int new_xsize, int new_ysize);
234 void dev_fb_setcursor(struct vfb_data *d, int cursor_x, int cursor_y, int on,
235 int cursor_xsize, int cursor_ysize);
236 void framebuffer_blockcopyfill(struct vfb_data *d, int fillflag, int fill_r,
237 int fill_g, int fill_b, int x1, int y1, int x2, int y2,
238 int from_x, int from_y);
239 void dev_fb_tick(struct cpu *, void *);
240 int dev_fb_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr,
241 unsigned char *data, size_t len, int writeflag, void *);
242 struct vfb_data *dev_fb_init(struct machine *machine, struct memory *mem,
243 uint64_t baseaddr, int vfb_type, int visible_xsize, int visible_ysize,
244 int xsize, int ysize, int bit_depth, char *name);
245
246 /* dev_gt.c: */
247 #define DEV_GT_LENGTH 0x1000
248 int dev_gt_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr,
249 unsigned char *data, size_t len, int writeflag, void *);
250 struct pci_data *dev_gt_init(struct machine *machine, struct memory *mem,
251 uint64_t baseaddr, int irq_nr, int pciirq, int type);
252
253 /* dev_jazz.c: */
254 #define DEV_JAZZ_LENGTH 0x280
255 struct jazz_data {
256 struct cpu *cpu;
257
258 /* Jazz stuff: */
259 uint32_t int_enable_mask;
260 uint32_t int_asserted;
261
262 /* ISA stuff: */
263 uint32_t isa_int_enable_mask;
264 uint32_t isa_int_asserted;
265
266 int interval;
267 int interval_start;
268
269 int jazz_timer_value;
270 int jazz_timer_current;
271
272 uint64_t dma_translation_table_base;
273 uint64_t dma_translation_table_limit;
274
275 uint32_t dma0_mode;
276 uint32_t dma0_enable;
277 uint32_t dma0_count;
278 uint32_t dma0_addr;
279
280 uint32_t dma1_mode;
281 /* same for dma1,2,3 actually (TODO) */
282
283 int led;
284 };
285 size_t dev_jazz_dma_controller(void *dma_controller_data,
286 unsigned char *data, size_t len, int writeflag);
287
288 /* dev_kn01.c: */
289 #define DEV_KN01_CSR_LENGTH 0x0000000000000004
290 int dev_kn01_csr_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
291 void dev_kn01_csr_init(struct memory *mem, uint64_t baseaddr, int color_fb);
292 #define DEV_VDAC_LENGTH 0x20
293 #define DEV_VDAC_MAPWA 0x00
294 #define DEV_VDAC_MAP 0x04
295 #define DEV_VDAC_MASK 0x08
296 #define DEV_VDAC_MAPRA 0x0c
297 #define DEV_VDAC_OVERWA 0x10
298 #define DEV_VDAC_OVER 0x14
299 #define DEV_VDAC_OVERRA 0x1c
300 int dev_vdac_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
301 void dev_vdac_init(struct memory *mem, uint64_t baseaddr, unsigned char *rgb_palette, int color_fb_flag);
302
303 /* dev_kn02.c: */
304 struct kn02_csr {
305 uint8_t csr[sizeof(uint32_t)];
306 uint8_t filler[4096 - sizeof(uint32_t)]; /* for bintrans mapping */
307 };
308 int dev_kn02_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
309 struct kn02_csr *dev_kn02_init(struct cpu *cpu, struct memory *mem,
310 uint64_t baseaddr);
311
312 /* dev_kn220.c: */
313 #define DEV_DEC5500_IOBOARD_LENGTH 0x100000
314 int dev_dec5500_ioboard_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
315 struct dec5500_ioboard_data *dev_dec5500_ioboard_init(struct cpu *cpu, struct memory *mem, uint64_t baseaddr);
316 #define DEV_SGEC_LENGTH 0x1000
317 int dev_sgec_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
318 void dev_sgec_init(struct memory *mem, uint64_t baseaddr, int irq_nr);
319
320 /* dev_kn230.c: */
321 struct kn230_csr {
322 uint32_t csr;
323 };
324
325 /* dev_le.c: */
326 #define DEV_LE_LENGTH 0x1c0200
327 int dev_le_access(struct cpu *cpu, struct memory *mem,
328 uint64_t relative_addr, unsigned char *data, size_t len,
329 int writeflag, void *);
330 void dev_le_init(struct machine *machine, struct memory *mem,
331 uint64_t baseaddr, uint64_t buf_start, uint64_t buf_end,
332 int irq_nr, int len);
333
334 /* dev_m700_fb.c: */
335 #define DEV_M700_FB_LENGTH 0x10000 /* TODO? */
336 int dev_m700_fb_access(struct cpu *cpu, struct memory *mem,
337 uint64_t relative_addr, unsigned char *data, size_t len,
338 int writeflag, void *);
339 void dev_m700_fb_init(struct machine *machine, struct memory *mem,
340 uint64_t baseaddr, uint64_t baseaddr2);
341
342 /* dev_malta.c: */
343 struct malta_data {
344 uint8_t assert_lo;
345 uint8_t assert_hi;
346 uint8_t disable_lo;
347 uint8_t disable_hi;
348 int poll_mode;
349 };
350
351 /* dev_mc146818.c: */
352 #define DEV_MC146818_LENGTH 0x0000000000000100
353 #define MC146818_DEC 0
354 #define MC146818_PC_CMOS 1
355 #define MC146818_ARC_NEC 2
356 #define MC146818_ARC_JAZZ 3
357 #define MC146818_SGI 4
358 /* see mc146818reg.h for more info */
359 void dev_mc146818_tick(struct cpu *cpu, void *);
360 int dev_mc146818_access(struct cpu *cpu, struct memory *mem,
361 uint64_t relative_addr, unsigned char *data, size_t len,
362 int writeflag, void *);
363 void dev_mc146818_init(struct machine *machine, struct memory *mem,
364 uint64_t baseaddr, int irq_nr, int access_style, int addrdiv);
365
366 /* dev_pckbc.c: */
367 #define DEV_PCKBC_LENGTH 0x10
368 #define PCKBC_8042 0
369 #define PCKBC_8242 1
370 #define PCKBC_JAZZ 3
371 int dev_pckbc_access(struct cpu *cpu, struct memory *mem,
372 uint64_t relative_addr, unsigned char *data, size_t len,
373 int writeflag, void *);
374 int dev_pckbc_init(struct machine *machine, struct memory *mem,
375 uint64_t baseaddr, int type, int keyboard_irqnr, int mouse_irqnr,
376 int in_use, int pc_style_flag);
377
378 /* dev_pmppc.c: */
379 int dev_pmppc_board_access(struct cpu *cpu, struct memory *mem,
380 uint64_t relative_addr, unsigned char *data, size_t len, int writeflag,
381 void *);
382 void dev_pmppc_init(struct memory *mem);
383
384 /* dev_ps2_spd.c: */
385 #define DEV_PS2_SPD_LENGTH 0x800
386 int dev_ps2_spd_access(struct cpu *cpu, struct memory *mem,
387 uint64_t relative_addr, unsigned char *data, size_t len,
388 int writeflag, void *);
389 void dev_ps2_spd_init(struct machine *machine, struct memory *mem,
390 uint64_t baseaddr);
391
392 /* dev_ps2_stuff.c: */
393 #include "ps2_dmacreg.h"
394 #define N_PS2_DMA_CHANNELS 10
395 #define N_PS2_TIMERS 4
396 struct ps2_data {
397 uint32_t timer_count[N_PS2_TIMERS];
398 uint32_t timer_comp[N_PS2_TIMERS];
399 uint32_t timer_mode[N_PS2_TIMERS];
400 uint32_t timer_hold[N_PS2_TIMERS]; /* NOTE: only 0 and 1 are valid */
401
402 uint64_t dmac_reg[DMAC_REGSIZE / 0x10];
403
404 uint64_t other_memory_base[N_PS2_DMA_CHANNELS];
405
406 uint32_t intr;
407 uint32_t imask;
408 uint32_t sbus_smflg;
409 };
410 #define DEV_PS2_STUFF_LENGTH 0x10000
411 int dev_ps2_stuff_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
412 struct ps2_data *dev_ps2_stuff_init(struct machine *machine, struct memory *mem, uint64_t baseaddr);
413
414 /* dev_pmagja.c: */
415 #define DEV_PMAGJA_LENGTH 0x3c0000
416 int dev_pmagja_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
417 void dev_pmagja_init(struct machine *machine, struct memory *mem, uint64_t baseaddr, int irq_nr);
418
419 /* dev_px.c: */
420 struct px_data {
421 struct memory *fb_mem;
422 struct vfb_data *vfb_data;
423 int type;
424 char *px_name;
425 int irq_nr;
426 int bitdepth;
427 int xconfig;
428 int yconfig;
429
430 uint32_t intr;
431 unsigned char sram[128 * 1024];
432 };
433 /* TODO: perhaps these types are wrong? */
434 #define DEV_PX_TYPE_PX 0
435 #define DEV_PX_TYPE_PXG 1
436 #define DEV_PX_TYPE_PXGPLUS 2
437 #define DEV_PX_TYPE_PXGPLUSTURBO 3
438 #define DEV_PX_LENGTH 0x3c0000
439 int dev_px_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
440 void dev_px_init(struct machine *machine, struct memory *mem, uint64_t baseaddr, int px_type, int irq_nr);
441
442 /* dev_ram.c: */
443 #define DEV_RAM_RAM 0
444 #define DEV_RAM_MIRROR 1
445 int dev_ram_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
446 void dev_ram_init(struct memory *mem, uint64_t baseaddr, uint64_t length, int mode, uint64_t otheraddr);
447
448 /* dev_scc.c: */
449 #define DEV_SCC_LENGTH 0x1000
450 int dev_scc_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
451 int dev_scc_dma_func(struct cpu *cpu, void *extra, uint64_t addr, size_t dma_len, int tx);
452 void *dev_scc_init(struct machine *machine, struct memory *mem, uint64_t baseaddr, int irq_nr, int use_fb, int scc_nr, int addrmul);
453
454 /* dev_sfb.c: */
455 #define DEV_SFB_LENGTH 0x400000
456 int dev_sfb_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
457 void dev_sfb_init(struct machine *machine, struct memory *mem, uint64_t baseaddr, struct vfb_data *vfb_data);
458
459 /* dev_sgi_gbe.c: */
460 #define DEV_SGI_GBE_LENGTH 0x1000000
461 int dev_sgi_gbe_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
462 void dev_sgi_gbe_init(struct machine *machine, struct memory *mem, uint64_t baseaddr);
463
464 /* dev_sgi_ip20.c: */
465 #define DEV_SGI_IP20_LENGTH 0x40
466 #define DEV_SGI_IP20_BASE 0x1fb801c0
467 struct sgi_ip20_data {
468 int dummy;
469 };
470 int dev_sgi_ip20_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
471 struct sgi_ip20_data *dev_sgi_ip20_init(struct cpu *cpu, struct memory *mem, uint64_t baseaddr);
472
473 /* dev_sgi_ip22.c: */
474 #define DEV_SGI_IP22_LENGTH 0x100
475 #define DEV_SGI_IP22_IMC_LENGTH 0x100
476 #define DEV_SGI_IP22_UNKNOWN2_LENGTH 0x100
477 #define IP22_IMC_BASE 0x1fa00000
478 #define IP22_UNKNOWN2_BASE 0x1fb94000
479 struct sgi_ip22_data {
480 int guiness_flag;
481 uint32_t reg[DEV_SGI_IP22_LENGTH / 4];
482 uint32_t imc_reg[DEV_SGI_IP22_IMC_LENGTH / 4];
483 uint32_t unknown2_reg[DEV_SGI_IP22_UNKNOWN2_LENGTH / 4];
484 uint32_t unknown_timer;
485 };
486 int dev_sgi_ip22_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
487 struct sgi_ip22_data *dev_sgi_ip22_init(struct machine *machine, struct memory *mem, uint64_t baseaddr, int guiness_flag);
488
489 /* dev_sgi_ip30.c: */
490 #define DEV_SGI_IP30_LENGTH 0x80000
491 struct sgi_ip30_data {
492 /* ip30: */
493 uint64_t imask0; /* 0x10000 */
494 uint64_t reg_0x10018;
495 uint64_t isr; /* 0x10030 */
496 uint64_t reg_0x20000;
497 uint64_t reg_0x30000;
498
499 /* ip30_2: */
500 uint64_t reg_0x0029c;
501
502 /* ip30_3: */
503 uint64_t reg_0x00284;
504
505 /* ip30_4: */
506 uint64_t reg_0x000b0;
507
508 /* ip30_5: */
509 uint64_t reg_0x00000;
510 };
511 int dev_sgi_ip30_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
512 struct sgi_ip30_data *dev_sgi_ip30_init(struct machine *machine, struct memory *mem, uint64_t baseaddr);
513
514 /* dev_sgi_ip32.c: */
515 #define DEV_CRIME_LENGTH 0x0000000000001000
516 struct crime_data {
517 unsigned char reg[DEV_CRIME_LENGTH];
518 int irq_nr;
519 int use_fb;
520 };
521 int dev_crime_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
522 struct crime_data *dev_crime_init(struct machine *machine, struct memory *mem, uint64_t baseaddr, int irq_nr, int use_fb);
523 #define DEV_MACE_LENGTH 0x100
524 struct mace_data {
525 unsigned char reg[DEV_MACE_LENGTH];
526 int irqnr;
527 };
528 int dev_mace_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
529 struct mace_data *dev_mace_init(struct memory *mem, uint64_t baseaddr, int irqnr);
530 #define DEV_MACEPCI_LENGTH 0x1000
531 int dev_macepci_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
532 struct pci_data *dev_macepci_init(struct memory *mem, uint64_t baseaddr, int pciirq);
533 #define DEV_SGI_MEC_LENGTH 0x1000
534 int dev_sgi_mec_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
535 void dev_sgi_mec_init(struct machine *machine, struct memory *mem, uint64_t baseaddr, int irq_nr, unsigned char *macaddr);
536 #define DEV_SGI_UST_LENGTH 0x10000
537 int dev_sgi_ust_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
538 void dev_sgi_ust_init(struct memory *mem, uint64_t baseaddr);
539 #define DEV_SGI_MTE_LENGTH 0x10000
540 int dev_sgi_mte_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
541 void dev_sgi_mte_init(struct memory *mem, uint64_t baseaddr);
542
543 /* dev_sii.c: */
544 #define DEV_SII_LENGTH 0x100
545 void dev_sii_tick(struct cpu *cpu, void *);
546 int dev_sii_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
547 void dev_sii_init(struct machine *machine, struct memory *mem, uint64_t baseaddr, uint64_t buf_start, uint64_t buf_end, int irq_nr);
548
549 /* dev_ssc.c: */
550 #define DEV_SSC_LENGTH 0x1000
551 int dev_ssc_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
552 void dev_ssc_init(struct machine *machine, struct memory *mem, uint64_t baseaddr, int irq_nr, int use_fb, uint32_t *);
553
554 /* dev_turbochannel.c: */
555 #define DEV_TURBOCHANNEL_LEN 0x0470
556 int dev_turbochannel_access(struct cpu *cpu, struct memory *mem,
557 uint64_t relative_addr, unsigned char *data, size_t len,
558 int writeflag, void *);
559 void dev_turbochannel_init(struct machine *machine, struct memory *mem,
560 int slot_nr, uint64_t baseaddr, uint64_t endaddr, char *device_name,
561 int irq);
562
563 /* dev_vga.c: */
564 int dev_vga_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr,
565 unsigned char *data, size_t len, int writeflag, void *);
566 void dev_vga_init(struct machine *machine, struct memory *mem,
567 uint64_t videomem_base, uint64_t control_base, char *name);
568
569 /* dev_vr41xx.c: */
570 #define DEV_VR41XX_LENGTH 0x800 /* TODO? */
571 struct vr41xx_data {
572 int cpumodel;
573
574 int kiu_console_handle;
575 int kiu_offset;
576 int kiu_irq_nr;
577 int kiu_int_assert;
578 int d0;
579 int d1;
580 int d2;
581 int d3;
582 int d4;
583 int d5;
584 int dont_clear_next;
585 int escape_state;
586
587 /* See icureg.h in NetBSD for more info. */
588 uint16_t sysint1;
589 uint16_t msysint1;
590 uint16_t giuint;
591 uint16_t giumask;
592 uint16_t sysint2;
593 uint16_t msysint2;
594 };
595
596 int dev_vr41xx_access(struct cpu *cpu, struct memory *mem,
597 uint64_t relative_addr, unsigned char *data, size_t len,
598 int writeflag, void *);
599 struct vr41xx_data *dev_vr41xx_init(struct machine *machine,
600 struct memory *mem, int cpumodel);
601
602 /* dev_wdc.c: */
603 #define DEV_WDC_LENGTH 0x8
604 int dev_wdc_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
605 void dev_wdc_init(struct machine *machine, struct memory *mem, uint64_t baseaddr, int irq_nr, int base_drive);
606
607 /* dev_wdsc.c: */
608 #define DEV_WDSC_NREGS 0x100 /* 8-bit register select */
609 #define DEV_WDSC_LENGTH 0x10
610 int dev_wdsc_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
611 void dev_wdsc_init(struct machine *machine, struct memory *mem, uint64_t baseaddr, int controller_nr, int irq_nr);
612
613 /* dev_zs.c: */
614 #define DEV_ZS_LENGTH 0x10
615 int dev_zs_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr,
616 unsigned char *data, size_t len, int writeflag, void *);
617 int dev_zs_init(struct machine *machine, struct memory *mem, uint64_t baseaddr,
618 int irq_nr, int addrmult, char *name);
619
620 /* lk201.c: */
621 struct lk201_data {
622 int use_fb;
623 int console_handle;
624
625 void (*add_to_rx_queue)(void *,int,int);
626 void *add_data;
627
628 unsigned char keyb_buf[8];
629 int keyb_buf_pos;
630
631 int mouse_mode;
632 int mouse_revision; /* 0..15 */
633 int mouse_x, mouse_y, mouse_buttons;
634
635 int old_host_mouse_x;
636 int old_host_mouse_y;
637 int old_host_mouse_stays_put;
638 int mouse_check_interval;
639 int mouse_check_interval_reset;
640 };
641 void lk201_tick(struct lk201_data *);
642 void lk201_tx_data(struct lk201_data *, int port, int idata);
643 void lk201_init(struct lk201_data *d, int use_fb,
644 void (*add_to_rx_queue)(void *,int,int), int console_handle, void *);
645
646
647 #endif /* DEVICES_H */
648

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