28 |
* SUCH DAMAGE. |
* SUCH DAMAGE. |
29 |
* |
* |
30 |
* |
* |
31 |
* $Id: devices.h,v 1.184 2005/10/03 01:07:48 debug Exp $ |
* $Id: devices.h,v 1.207 2006/02/18 17:55:25 debug Exp $ |
32 |
* |
* |
33 |
* Memory mapped devices. |
* Memory mapped devices. |
34 |
* |
* |
76 |
int dev_dec_ioasic_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *); |
int dev_dec_ioasic_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *); |
77 |
struct dec_ioasic_data *dev_dec_ioasic_init(struct cpu *cpu, struct memory *mem, uint64_t baseaddr, int rackmount_flag); |
struct dec_ioasic_data *dev_dec_ioasic_init(struct cpu *cpu, struct memory *mem, uint64_t baseaddr, int rackmount_flag); |
78 |
|
|
79 |
|
/* dev_algor.c: */ |
80 |
|
struct algor_data { |
81 |
|
uint64_t base_addr; |
82 |
|
}; |
83 |
|
|
84 |
/* dev_asc.c: */ |
/* dev_asc.c: */ |
85 |
#define DEV_ASC_DEC_LENGTH 0x40000 |
#define DEV_ASC_DEC_LENGTH 0x40000 |
86 |
#define DEV_ASC_PICA_LENGTH 0x1000 |
#define DEV_ASC_PICA_LENGTH 0x1000 |
110 |
int dev_au1x00_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *); |
int dev_au1x00_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *); |
111 |
struct au1x00_ic_data *dev_au1x00_init(struct machine *machine, struct memory *mem); |
struct au1x00_ic_data *dev_au1x00_init(struct machine *machine, struct memory *mem); |
112 |
|
|
113 |
|
/* dev_bebox.c: */ |
114 |
|
struct bebox_data { |
115 |
|
/* The 5 motherboard registers: */ |
116 |
|
uint32_t cpu0_int_mask; |
117 |
|
uint32_t cpu1_int_mask; |
118 |
|
uint32_t int_status; |
119 |
|
uint32_t xpi; |
120 |
|
uint32_t resets; |
121 |
|
}; |
122 |
|
|
123 |
/* dev_bt431.c: */ |
/* dev_bt431.c: */ |
124 |
#define DEV_BT431_LENGTH 0x20 |
#define DEV_BT431_LENGTH 0x20 |
125 |
#define DEV_BT431_NREGS 0x800 /* ? */ |
#define DEV_BT431_NREGS 0x800 /* ? */ |
155 |
struct cons_data { |
struct cons_data { |
156 |
int console_handle; |
int console_handle; |
157 |
int irq_nr; |
int irq_nr; |
158 |
|
int in_use; |
159 |
}; |
}; |
160 |
|
|
161 |
/* dev_colorplanemask.c: */ |
/* dev_colorplanemask.c: */ |
166 |
void dev_colorplanemask_init(struct memory *mem, uint64_t baseaddr, |
void dev_colorplanemask_init(struct memory *mem, uint64_t baseaddr, |
167 |
unsigned char *color_plane_mask); |
unsigned char *color_plane_mask); |
168 |
|
|
169 |
|
/* dev_cpc700.c: */ |
170 |
|
struct cpc700_data { |
171 |
|
struct pci_data *pci_data; |
172 |
|
uint32_t sr; /* Status register (interrupt) */ |
173 |
|
uint32_t er; /* Enable register */ |
174 |
|
}; |
175 |
|
struct cpc700_data *dev_cpc700_init(struct machine *, struct memory *); |
176 |
|
|
177 |
/* dev_dc7085.c: */ |
/* dev_dc7085.c: */ |
178 |
#define DEV_DC7085_LENGTH 0x0000000000000080 |
#define DEV_DC7085_LENGTH 0x0000000000000080 |
179 |
/* see dc7085.h for more info */ |
/* see dc7085.h for more info */ |
204 |
/* dev_disk.c: */ |
/* dev_disk.c: */ |
205 |
#define DEV_DISK_ADDRESS 0x13000000 |
#define DEV_DISK_ADDRESS 0x13000000 |
206 |
|
|
207 |
|
/* dev_eagle.c: */ |
208 |
|
struct pci_data *dev_eagle_init(struct machine *machine, struct memory *mem, |
209 |
|
int irqbase, int pciirq); |
210 |
|
|
211 |
/* dev_ether.c: */ |
/* dev_ether.c: */ |
212 |
#define DEV_ETHER_ADDRESS 0x14000000 |
#define DEV_ETHER_ADDRESS 0x14000000 |
213 |
#define DEV_ETHER_LENGTH 0x8000 |
#define DEV_ETHER_LENGTH 0x8000 |
217 |
#define DEV_FB_LENGTH 0x3c0000 /* 3c0000 to not colide with */ |
#define DEV_FB_LENGTH 0x3c0000 /* 3c0000 to not colide with */ |
218 |
/* turbochannel rom, */ |
/* turbochannel rom, */ |
219 |
/* otherwise size = 4MB */ |
/* otherwise size = 4MB */ |
220 |
|
/* Type: */ |
221 |
#define VFB_GENERIC 0 |
#define VFB_GENERIC 0 |
222 |
#define VFB_HPCMIPS 1 |
#define VFB_HPC 1 |
223 |
#define VFB_DEC_VFB01 2 |
#define VFB_DEC_VFB01 2 |
224 |
#define VFB_DEC_VFB02 3 |
#define VFB_DEC_VFB02 3 |
225 |
#define VFB_DEC_MAXINE 4 |
#define VFB_DEC_MAXINE 4 |
226 |
#define VFB_PLAYSTATION2 5 |
#define VFB_PLAYSTATION2 5 |
227 |
|
/* Extra flags: */ |
228 |
|
#define VFB_REVERSE_START 0x10000 |
229 |
struct vfb_data { |
struct vfb_data { |
230 |
int vfb_type; |
int vfb_type; |
231 |
|
|
252 |
/* RGB palette for <= 8 bit modes: (r,g,b bytes for each) */ |
/* RGB palette for <= 8 bit modes: (r,g,b bytes for each) */ |
253 |
unsigned char rgb_palette[256 * 3]; |
unsigned char rgb_palette[256 * 3]; |
254 |
|
|
255 |
|
void (*redraw_func)(struct vfb_data *, int, int); |
256 |
|
|
257 |
/* These should always be in sync: */ |
/* These should always be in sync: */ |
258 |
unsigned char *framebuffer; |
unsigned char *framebuffer; |
259 |
struct fb_window *fb_window; |
struct fb_window *fb_window; |
287 |
uint32_t timer_load[N_FOOTBRIDGE_TIMERS]; |
uint32_t timer_load[N_FOOTBRIDGE_TIMERS]; |
288 |
uint32_t timer_value[N_FOOTBRIDGE_TIMERS]; |
uint32_t timer_value[N_FOOTBRIDGE_TIMERS]; |
289 |
uint32_t timer_control[N_FOOTBRIDGE_TIMERS]; |
uint32_t timer_control[N_FOOTBRIDGE_TIMERS]; |
290 |
|
int timer_being_read; |
291 |
|
int timer_poll_mode; |
292 |
|
|
293 |
uint32_t irq_status; |
uint32_t irq_status; |
294 |
uint32_t irq_enable; |
uint32_t irq_enable; |
297 |
uint32_t fiq_enable; |
uint32_t fiq_enable; |
298 |
}; |
}; |
299 |
|
|
300 |
|
/* dev_gc.c: */ |
301 |
|
struct gc_data { |
302 |
|
int reassert_irq; |
303 |
|
uint32_t status_hi; |
304 |
|
uint32_t status_lo; |
305 |
|
uint32_t enable_hi; |
306 |
|
uint32_t enable_lo; |
307 |
|
}; |
308 |
|
struct gc_data *dev_gc_init(struct machine *, struct memory *, uint64_t addr, |
309 |
|
int reassert_irq); |
310 |
|
|
311 |
/* dev_gt.c: */ |
/* dev_gt.c: */ |
312 |
#define DEV_GT_LENGTH 0x1000 |
#define DEV_GT_LENGTH 0x1000 |
313 |
int dev_gt_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, |
int dev_gt_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, |
315 |
struct pci_data *dev_gt_init(struct machine *machine, struct memory *mem, |
struct pci_data *dev_gt_init(struct machine *machine, struct memory *mem, |
316 |
uint64_t baseaddr, int irq_nr, int pciirq, int type); |
uint64_t baseaddr, int irq_nr, int pciirq, int type); |
317 |
|
|
318 |
|
/* dev_i80321.c: */ |
319 |
|
struct i80321_data { |
320 |
|
/* Interrupt Controller */ |
321 |
|
int reassert_irq; |
322 |
|
uint32_t status; |
323 |
|
uint32_t enable; |
324 |
|
|
325 |
|
uint32_t pci_addr; |
326 |
|
struct pci_data *pci_bus; |
327 |
|
|
328 |
|
/* Memory Controller: */ |
329 |
|
uint32_t mcu_reg[0x100 / sizeof(uint32_t)]; |
330 |
|
}; |
331 |
|
|
332 |
/* dev_jazz.c: */ |
/* dev_jazz.c: */ |
333 |
#define DEV_JAZZ_LENGTH 0x280 |
#define DEV_JAZZ_LENGTH 0x280 |
334 |
struct jazz_data { |
struct jazz_data { |
434 |
#define MC146818_ARC_NEC 2 |
#define MC146818_ARC_NEC 2 |
435 |
#define MC146818_ARC_JAZZ 3 |
#define MC146818_ARC_JAZZ 3 |
436 |
#define MC146818_SGI 4 |
#define MC146818_SGI 4 |
437 |
|
#define MC146818_CATS 5 |
438 |
|
#define MC146818_ALGOR 6 |
439 |
|
#define MC146818_PMPPC 7 |
440 |
/* see mc146818reg.h for more info */ |
/* see mc146818reg.h for more info */ |
441 |
void dev_mc146818_tick(struct cpu *cpu, void *); |
void dev_mc146818_tick(struct cpu *cpu, void *); |
442 |
int dev_mc146818_access(struct cpu *cpu, struct memory *mem, |
int dev_mc146818_access(struct cpu *cpu, struct memory *mem, |
498 |
int dev_pmagja_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *); |
int dev_pmagja_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *); |
499 |
void dev_pmagja_init(struct machine *machine, struct memory *mem, uint64_t baseaddr, int irq_nr); |
void dev_pmagja_init(struct machine *machine, struct memory *mem, uint64_t baseaddr, int irq_nr); |
500 |
|
|
501 |
|
/* dev_prep.c: */ |
502 |
|
struct prep_data { |
503 |
|
uint32_t int_status; |
504 |
|
}; |
505 |
|
|
506 |
/* dev_px.c: */ |
/* dev_px.c: */ |
507 |
struct px_data { |
struct px_data { |
508 |
struct memory *fb_mem; |
struct memory *fb_mem; |
523 |
#define DEV_PX_TYPE_PXGPLUS 2 |
#define DEV_PX_TYPE_PXGPLUS 2 |
524 |
#define DEV_PX_TYPE_PXGPLUSTURBO 3 |
#define DEV_PX_TYPE_PXGPLUSTURBO 3 |
525 |
#define DEV_PX_LENGTH 0x3c0000 |
#define DEV_PX_LENGTH 0x3c0000 |
526 |
int dev_px_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *); |
int dev_px_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, |
527 |
void dev_px_init(struct machine *machine, struct memory *mem, uint64_t baseaddr, int px_type, int irq_nr); |
unsigned char *data, size_t len, int writeflag, void *); |
528 |
|
void dev_px_init(struct machine *machine, struct memory *mem, uint64_t baseaddr, |
529 |
|
int px_type, int irq_nr); |
530 |
|
|
531 |
/* dev_ram.c: */ |
/* dev_ram.c: */ |
532 |
#define DEV_RAM_RAM 0 |
#define DEV_RAM_RAM 0 |
533 |
#define DEV_RAM_MIRROR 1 |
#define DEV_RAM_MIRROR 1 |
534 |
int dev_ram_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *); |
#define DEV_RAM_MIGHT_POINT_TO_DEVICES 0x10 |
535 |
void dev_ram_init(struct memory *mem, uint64_t baseaddr, uint64_t length, int mode, uint64_t otheraddr); |
int dev_ram_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, |
536 |
|
unsigned char *data, size_t len, int writeflag, void *); |
537 |
|
void dev_ram_init(struct machine *machine, uint64_t baseaddr, uint64_t length, |
538 |
|
int mode, uint64_t otheraddr); |
539 |
|
|
540 |
/* dev_scc.c: */ |
/* dev_scc.c: */ |
541 |
#define DEV_SCC_LENGTH 0x1000 |
#define DEV_SCC_LENGTH 0x1000 |
542 |
int dev_scc_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *); |
int dev_scc_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, |
543 |
int dev_scc_dma_func(struct cpu *cpu, void *extra, uint64_t addr, size_t dma_len, int tx); |
unsigned char *data, size_t len, int writeflag, void *); |
544 |
void *dev_scc_init(struct machine *machine, struct memory *mem, uint64_t baseaddr, int irq_nr, int use_fb, int scc_nr, int addrmul); |
int dev_scc_dma_func(struct cpu *cpu, void *extra, uint64_t addr, |
545 |
|
size_t dma_len, int tx); |
546 |
|
void *dev_scc_init(struct machine *machine, struct memory *mem, |
547 |
|
uint64_t baseaddr, int irq_nr, int use_fb, int scc_nr, int addrmul); |
548 |
|
|
549 |
/* dev_sfb.c: */ |
/* dev_sfb.c: */ |
550 |
#define DEV_SFB_LENGTH 0x400000 |
#define DEV_SFB_LENGTH 0x400000 |
551 |
int dev_sfb_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *); |
int dev_sfb_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, |
552 |
void dev_sfb_init(struct machine *machine, struct memory *mem, uint64_t baseaddr, struct vfb_data *vfb_data); |
unsigned char *data, size_t len, int writeflag, void *); |
553 |
|
void dev_sfb_init(struct machine *machine, struct memory *mem, |
554 |
|
uint64_t baseaddr, struct vfb_data *vfb_data); |
555 |
|
|
556 |
/* dev_sgi_gbe.c: */ |
/* dev_sgi_gbe.c: */ |
557 |
#define DEV_SGI_GBE_LENGTH 0x1000000 |
#define DEV_SGI_GBE_LENGTH 0x1000000 |
558 |
int dev_sgi_gbe_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *); |
int dev_sgi_gbe_access(struct cpu *cpu, struct memory *mem, |
559 |
void dev_sgi_gbe_init(struct machine *machine, struct memory *mem, uint64_t baseaddr); |
uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, |
560 |
|
void *); |
561 |
|
void dev_sgi_gbe_init(struct machine *machine, struct memory *mem, |
562 |
|
uint64_t baseaddr); |
563 |
|
|
564 |
/* dev_sgi_ip20.c: */ |
/* dev_sgi_ip20.c: */ |
565 |
#define DEV_SGI_IP20_LENGTH 0x40 |
#define DEV_SGI_IP20_LENGTH 0x40 |
629 |
struct mace_data *dev_mace_init(struct memory *mem, uint64_t baseaddr, int irqnr); |
struct mace_data *dev_mace_init(struct memory *mem, uint64_t baseaddr, int irqnr); |
630 |
#define DEV_MACEPCI_LENGTH 0x1000 |
#define DEV_MACEPCI_LENGTH 0x1000 |
631 |
int dev_macepci_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *); |
int dev_macepci_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *); |
632 |
struct pci_data *dev_macepci_init(struct memory *mem, uint64_t baseaddr, int pciirq); |
struct pci_data *dev_macepci_init(struct machine *machine, struct memory *mem, uint64_t baseaddr, int pciirq); |
633 |
#define DEV_SGI_MEC_LENGTH 0x1000 |
#define DEV_SGI_MEC_LENGTH 0x1000 |
634 |
int dev_sgi_mec_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *); |
int dev_sgi_mec_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *); |
635 |
void dev_sgi_mec_init(struct machine *machine, struct memory *mem, uint64_t baseaddr, int irq_nr, unsigned char *macaddr); |
void dev_sgi_mec_init(struct machine *machine, struct memory *mem, uint64_t baseaddr, int irq_nr, unsigned char *macaddr); |
660 |
int slot_nr, uint64_t baseaddr, uint64_t endaddr, char *device_name, |
int slot_nr, uint64_t baseaddr, uint64_t endaddr, char *device_name, |
661 |
int irq); |
int irq); |
662 |
|
|
663 |
|
/* dev_uninorth.c: */ |
664 |
|
struct pci_data *dev_uninorth_init(struct machine *machine, struct memory *mem, |
665 |
|
uint64_t addr, int irqbase, int pciirq); |
666 |
|
|
667 |
|
/* dev_v3.c: */ |
668 |
|
struct v3_data { |
669 |
|
struct pci_data *pci_data; |
670 |
|
uint16_t lb_map0; |
671 |
|
}; |
672 |
|
struct v3_data *dev_v3_init(struct machine *, struct memory *); |
673 |
|
|
674 |
/* dev_vga.c: */ |
/* dev_vga.c: */ |
675 |
int dev_vga_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, |
int dev_vga_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, |
676 |
unsigned char *data, size_t len, int writeflag, void *); |
unsigned char *data, size_t len, int writeflag, void *); |
683 |
int cpumodel; |
int cpumodel; |
684 |
|
|
685 |
int kiu_console_handle; |
int kiu_console_handle; |
686 |
int kiu_offset; |
uint32_t kiu_offset; |
687 |
int kiu_irq_nr; |
int kiu_irq_nr; |
688 |
int kiu_int_assert; |
int kiu_int_assert; |
689 |
int d0; |
int d0; |
716 |
int dev_wdsc_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *); |
int dev_wdsc_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *); |
717 |
void dev_wdsc_init(struct machine *machine, struct memory *mem, uint64_t baseaddr, int controller_nr, int irq_nr); |
void dev_wdsc_init(struct machine *machine, struct memory *mem, uint64_t baseaddr, int controller_nr, int irq_nr); |
718 |
|
|
|
/* dev_zs.c: */ |
|
|
#define DEV_ZS_LENGTH 0x10 |
|
|
int dev_zs_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, |
|
|
unsigned char *data, size_t len, int writeflag, void *); |
|
|
int dev_zs_init(struct machine *machine, struct memory *mem, uint64_t baseaddr, |
|
|
int irq_nr, int addrmult, char *name); |
|
|
|
|
719 |
/* lk201.c: */ |
/* lk201.c: */ |
720 |
struct lk201_data { |
struct lk201_data { |
721 |
int use_fb; |
int use_fb; |