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#define DEVICES_H |
#define DEVICES_H |
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/* |
/* |
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* Copyright (C) 2003-2006 Anders Gavare. All rights reserved. |
* Copyright (C) 2003-2007 Anders Gavare. All rights reserved. |
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* |
* |
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* Redistribution and use in source and binary forms, with or without |
* Redistribution and use in source and binary forms, with or without |
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* modification, are permitted provided that the following conditions are met: |
* modification, are permitted provided that the following conditions are met: |
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* SUCH DAMAGE. |
* SUCH DAMAGE. |
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* |
* |
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* |
* |
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* $Id: devices.h,v 1.218 2006/10/02 09:26:53 debug Exp $ |
* $Id: devices.h,v 1.241 2007/02/10 14:21:10 debug Exp $ |
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* |
* |
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* Memory mapped devices. |
* Memory mapped devices. |
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* |
* |
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* TODO: Separate into lots of smaller files? That might speed up a compile, |
* NOTE: Many of these devices are legacy devices, that are here for one |
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* but I'm not sure that it's a price worth paying. |
* of these two reasons: |
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* |
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* A) Devices introduced before the DEVINIT system had to |
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* be declared somewhere. |
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* |
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* B) The way interrupt controllers and such were implemented |
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* up until release 0.4.3 requires that several parts of |
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* the program access internal fields of interrupt |
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* controllers' structs. |
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* |
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* Both A and B need to be solved. |
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*/ |
*/ |
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#include <sys/types.h> |
#include <sys/types.h> |
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#include <inttypes.h> |
#include <inttypes.h> |
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#include "interrupt.h" |
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struct cpu; |
struct cpu; |
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struct machine; |
struct machine; |
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struct memory; |
struct memory; |
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/* dev_8259.c: */ |
/* dev_8259.c: */ |
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struct pic8259_data { |
struct pic8259_data { |
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int irq_nr; /* if connected to another 8259 */ |
struct interrupt irq; |
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int irq_base; |
int irq_base; |
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int current_command; |
int current_command; |
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int dev_dec_ioasic_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *); |
int dev_dec_ioasic_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *); |
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struct dec_ioasic_data *dev_dec_ioasic_init(struct cpu *cpu, struct memory *mem, uint64_t baseaddr, int rackmount_flag); |
struct dec_ioasic_data *dev_dec_ioasic_init(struct cpu *cpu, struct memory *mem, uint64_t baseaddr, int rackmount_flag); |
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/* dev_algor.c: */ |
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struct algor_data { |
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uint64_t base_addr; |
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}; |
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/* dev_asc.c: */ |
/* dev_asc.c: */ |
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#define DEV_ASC_DEC_LENGTH 0x40000 |
#define DEV_ASC_DEC_LENGTH 0x40000 |
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#define DEV_ASC_PICA_LENGTH 0x1000 |
#define DEV_ASC_PICA_LENGTH 0x1000 |
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#define DEV_ASC_PICA 2 |
#define DEV_ASC_PICA 2 |
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int dev_asc_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *); |
int dev_asc_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *); |
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void dev_asc_init(struct machine *machine, struct memory *mem, uint64_t baseaddr, |
void dev_asc_init(struct machine *machine, struct memory *mem, uint64_t baseaddr, |
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int irq_nr, void *turbochannel, int mode, |
char *irq_path, void *turbochannel, int mode, |
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size_t (*dma_controller)(void *dma_controller_data, |
size_t (*dma_controller)(void *dma_controller_data, |
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unsigned char *data, size_t len, int writeflag), |
unsigned char *data, size_t len, int writeflag), |
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void *dma_controller_data); |
void *dma_controller_data); |
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/* dev_au1x00.c: */ |
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struct au1x00_ic_data { |
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int ic_nr; |
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uint32_t request0_int; |
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uint32_t request1_int; |
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uint32_t config0; |
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uint32_t config1; |
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uint32_t config2; |
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uint32_t source; |
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uint32_t assign_request; |
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uint32_t wakeup; |
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uint32_t mask; |
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}; |
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int dev_au1x00_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *); |
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struct au1x00_ic_data *dev_au1x00_init(struct machine *machine, struct memory *mem); |
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/* dev_bebox.c: */ |
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struct bebox_data { |
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/* The 5 motherboard registers: */ |
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uint32_t cpu0_int_mask; |
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uint32_t cpu1_int_mask; |
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uint32_t int_status; |
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uint32_t xpi; |
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uint32_t resets; |
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}; |
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/* dev_bt431.c: */ |
/* dev_bt431.c: */ |
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#define DEV_BT431_LENGTH 0x20 |
#define DEV_BT431_LENGTH 0x20 |
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#define DEV_BT431_NREGS 0x800 /* ? */ |
#define DEV_BT431_NREGS 0x800 /* ? */ |
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int dev_bt431_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *); |
int dev_bt431_access(struct cpu *cpu, struct memory *mem, |
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uint64_t relative_addr, unsigned char *data, size_t len, |
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int writeflag, void *); |
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struct vfb_data; |
struct vfb_data; |
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void dev_bt431_init(struct memory *mem, uint64_t baseaddr, struct vfb_data *vfb_data, int color_fb_flag); |
void dev_bt431_init(struct memory *mem, uint64_t baseaddr, |
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struct vfb_data *vfb_data, int color_fb_flag); |
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/* dev_bt455.c: */ |
/* dev_bt455.c: */ |
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#define DEV_BT455_LENGTH 0x20 |
#define DEV_BT455_LENGTH 0x20 |
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int dev_bt455_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *); |
int dev_bt455_access(struct cpu *cpu, struct memory *mem, |
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uint64_t relative_addr, unsigned char *data, size_t len, |
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int writeflag, void *); |
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struct vfb_data; |
struct vfb_data; |
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void dev_bt455_init(struct memory *mem, uint64_t baseaddr, struct vfb_data *vfb_data); |
void dev_bt455_init(struct memory *mem, uint64_t baseaddr, |
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struct vfb_data *vfb_data); |
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/* dev_bt459.c: */ |
/* dev_bt459.c: */ |
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#define DEV_BT459_LENGTH 0x20 |
#define DEV_BT459_LENGTH 0x20 |
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struct vfb_data; |
struct vfb_data; |
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void dev_bt459_init(struct machine *machine, struct memory *mem, |
void dev_bt459_init(struct machine *machine, struct memory *mem, |
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uint64_t baseaddr, uint64_t baseaddr_irq, struct vfb_data *vfb_data, |
uint64_t baseaddr, uint64_t baseaddr_irq, struct vfb_data *vfb_data, |
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int color_fb_flag, int irq_nr, int type); |
int color_fb_flag, char *irq_path, int type); |
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/* dev_cons.c: */ |
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struct cons_data { |
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int console_handle; |
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int irq_nr; |
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int in_use; |
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}; |
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/* dev_colorplanemask.c: */ |
/* dev_colorplanemask.c: */ |
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#define DEV_COLORPLANEMASK_LENGTH 0x0000000000000010 |
#define DEV_COLORPLANEMASK_LENGTH 0x0000000000000010 |
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void dev_colorplanemask_init(struct memory *mem, uint64_t baseaddr, |
void dev_colorplanemask_init(struct memory *mem, uint64_t baseaddr, |
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unsigned char *color_plane_mask); |
unsigned char *color_plane_mask); |
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/* dev_cpc700.c: */ |
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struct cpc700_data { |
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struct pci_data *pci_data; |
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uint32_t sr; /* Status register (interrupt) */ |
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uint32_t er; /* Enable register */ |
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}; |
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struct cpc700_data *dev_cpc700_init(struct machine *, struct memory *); |
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/* dev_dc7085.c: */ |
/* dev_dc7085.c: */ |
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#define DEV_DC7085_LENGTH 0x0000000000000080 |
#define DEV_DC7085_LENGTH 0x0000000000000080 |
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/* see dc7085.h for more info */ |
/* see dc7085.h for more info */ |
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void dev_dc7085_tick(struct cpu *cpu, void *); |
void dev_dc7085_tick(struct cpu *cpu, void *); |
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int dev_dc7085_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *); |
int dev_dc7085_access(struct cpu *cpu, struct memory *mem, |
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int dev_dc7085_init(struct machine *machine, struct memory *mem, uint64_t baseaddr, int irq_nr, int use_fb); |
uint64_t relative_addr, unsigned char *data, size_t len, |
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int writeflag, void *); |
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int dev_dc7085_init(struct machine *machine, struct memory *mem, |
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uint64_t baseaddr, char *irq_path, int use_fb); |
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/* dev_dec5800.c: */ |
/* dev_dec5800.c: */ |
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#define DEV_DEC5800_LENGTH 0x1000 /* ? */ |
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struct dec5800_data { |
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uint32_t csr; |
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uint32_t vector_0x50; |
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}; |
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int dev_dec5800_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *); |
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struct dec5800_data *dev_dec5800_init(struct machine *machine, struct memory *mem, uint64_t baseaddr); |
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/* 16 slots, 0x2000 bytes each */ |
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#define DEV_DECBI_LENGTH 0x20000 |
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int dev_decbi_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *); |
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void dev_decbi_init(struct memory *mem, uint64_t baseaddr); |
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#define DEV_DECCCA_LENGTH 0x10000 /* ? */ |
#define DEV_DECCCA_LENGTH 0x10000 /* ? */ |
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#define DEC_DECCCA_BASEADDR 0x19000000 /* ? I just made this up */ |
#define DEC_DECCCA_BASEADDR 0x19000000 /* ? I just made this up */ |
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int dev_deccca_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *); |
int dev_deccca_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *); |
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int dev_decxmi_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *); |
int dev_decxmi_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *); |
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void dev_decxmi_init(struct memory *mem, uint64_t baseaddr); |
void dev_decxmi_init(struct memory *mem, uint64_t baseaddr); |
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/* dev_eagle.c: */ |
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struct pci_data *dev_eagle_init(struct machine *machine, struct memory *mem, |
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int irqbase, int pciirq); |
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/* dev_fb.c: */ |
/* dev_fb.c: */ |
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#define DEV_FB_LENGTH 0x3c0000 /* 3c0000 to not colide with */ |
#define DEV_FB_LENGTH 0x3c0000 /* 3c0000 to not colide with */ |
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/* turbochannel rom, */ |
/* turbochannel rom, */ |
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uint64_t baseaddr, int vfb_type, int visible_xsize, int visible_ysize, |
uint64_t baseaddr, int vfb_type, int visible_xsize, int visible_ysize, |
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int xsize, int ysize, int bit_depth, char *name); |
int xsize, int ysize, int bit_depth, char *name); |
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/* dev_footbridge: */ |
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#define N_FOOTBRIDGE_TIMERS 4 |
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struct footbridge_data { |
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struct pci_data *pcibus; |
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int console_handle; |
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int timer_tick_countdown[N_FOOTBRIDGE_TIMERS]; |
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uint32_t timer_load[N_FOOTBRIDGE_TIMERS]; |
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uint32_t timer_value[N_FOOTBRIDGE_TIMERS]; |
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uint32_t timer_control[N_FOOTBRIDGE_TIMERS]; |
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struct timer *timer[N_FOOTBRIDGE_TIMERS]; |
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int pending_timer_interrupts[N_FOOTBRIDGE_TIMERS]; |
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uint32_t irq_status; |
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uint32_t irq_enable; |
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uint32_t fiq_status; |
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uint32_t fiq_enable; |
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}; |
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/* dev_gc.c: */ |
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struct gc_data { |
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int reassert_irq; |
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uint32_t status_hi; |
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uint32_t status_lo; |
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uint32_t enable_hi; |
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uint32_t enable_lo; |
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}; |
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struct gc_data *dev_gc_init(struct machine *, struct memory *, uint64_t addr, |
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int reassert_irq); |
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/* dev_gt.c: */ |
/* dev_gt.c: */ |
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#define DEV_GT_LENGTH 0x1000 |
#define DEV_GT_LENGTH 0x1000 |
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int dev_gt_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, |
int dev_gt_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, |
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unsigned char *data, size_t len, int writeflag, void *); |
unsigned char *data, size_t len, int writeflag, void *); |
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struct pci_data *dev_gt_init(struct machine *machine, struct memory *mem, |
struct pci_data *dev_gt_init(struct machine *machine, struct memory *mem, |
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uint64_t baseaddr, int irq_nr, int pciirq, int type); |
uint64_t baseaddr, char *timer_irq_path, char *isa_irq_path, int type); |
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/* dev_i80321.c: */ |
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struct i80321_data { |
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/* Interrupt Controller */ |
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int reassert_irq; |
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uint32_t status; |
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uint32_t enable; |
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uint32_t pci_addr; |
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struct pci_data *pci_bus; |
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/* Memory Controller: */ |
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uint32_t mcu_reg[0x100 / sizeof(uint32_t)]; |
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}; |
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/* dev_jazz.c: */ |
/* dev_jazz.c: */ |
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#define DEV_JAZZ_LENGTH 0x280 |
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struct jazz_data { |
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struct cpu *cpu; |
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/* Jazz stuff: */ |
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uint32_t int_enable_mask; |
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uint32_t int_asserted; |
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/* ISA stuff: */ |
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uint32_t isa_int_enable_mask; |
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uint32_t isa_int_asserted; |
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int interval; |
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int interval_start; |
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int jazz_timer_value; |
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int jazz_timer_current; |
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uint64_t dma_translation_table_base; |
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uint64_t dma_translation_table_limit; |
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uint32_t dma0_mode; |
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uint32_t dma0_enable; |
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uint32_t dma0_count; |
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uint32_t dma0_addr; |
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uint32_t dma1_mode; |
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/* same for dma1,2,3 actually (TODO) */ |
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int led; |
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}; |
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size_t dev_jazz_dma_controller(void *dma_controller_data, |
size_t dev_jazz_dma_controller(void *dma_controller_data, |
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unsigned char *data, size_t len, int writeflag); |
unsigned char *data, size_t len, int writeflag); |
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/* dev_kn01.c: */ |
/* dev_kn01.c: */ |
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#define DEV_KN01_CSR_LENGTH 0x0000000000000004 |
#define DEV_KN01_LENGTH 4 |
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int dev_kn01_csr_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *); |
int dev_kn01_access(struct cpu *cpu, struct memory *mem, |
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void dev_kn01_csr_init(struct memory *mem, uint64_t baseaddr, int color_fb); |
uint64_t relative_addr, unsigned char *data, size_t len, |
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int writeflag, void *); |
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void dev_kn01_init(struct memory *mem, uint64_t baseaddr, int color_fb); |
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#define DEV_VDAC_LENGTH 0x20 |
#define DEV_VDAC_LENGTH 0x20 |
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#define DEV_VDAC_MAPWA 0x00 |
#define DEV_VDAC_MAPWA 0x00 |
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#define DEV_VDAC_MAP 0x04 |
#define DEV_VDAC_MAP 0x04 |
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#define DEV_VDAC_OVERWA 0x10 |
#define DEV_VDAC_OVERWA 0x10 |
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#define DEV_VDAC_OVER 0x14 |
#define DEV_VDAC_OVER 0x14 |
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#define DEV_VDAC_OVERRA 0x1c |
#define DEV_VDAC_OVERRA 0x1c |
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int dev_vdac_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *); |
int dev_vdac_access(struct cpu *cpu, struct memory *mem, |
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void dev_vdac_init(struct memory *mem, uint64_t baseaddr, unsigned char *rgb_palette, int color_fb_flag); |
uint64_t relative_addr, unsigned char *data, size_t len, |
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int writeflag, void *); |
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/* dev_kn02.c: */ |
void dev_vdac_init(struct memory *mem, uint64_t baseaddr, |
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struct kn02_csr { |
unsigned char *rgb_palette, int color_fb_flag); |
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uint8_t csr[sizeof(uint32_t)]; |
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uint8_t filler[4096 - sizeof(uint32_t)]; /* for dyntrans mapping */ |
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}; |
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int dev_kn02_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *); |
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struct kn02_csr *dev_kn02_init(struct cpu *cpu, struct memory *mem, |
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uint64_t baseaddr); |
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/* dev_kn220.c: */ |
/* dev_kn220.c: */ |
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#define DEV_DEC5500_IOBOARD_LENGTH 0x100000 |
#define DEV_DEC5500_IOBOARD_LENGTH 0x100000 |
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int dev_sgec_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *); |
int dev_sgec_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *); |
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void dev_sgec_init(struct memory *mem, uint64_t baseaddr, int irq_nr); |
void dev_sgec_init(struct memory *mem, uint64_t baseaddr, int irq_nr); |
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/* dev_kn230.c: */ |
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struct kn230_csr { |
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uint32_t csr; |
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}; |
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/* dev_le.c: */ |
/* dev_le.c: */ |
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#define DEV_LE_LENGTH 0x1c0200 |
#define DEV_LE_LENGTH 0x1c0200 |
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int dev_le_access(struct cpu *cpu, struct memory *mem, |
int dev_le_access(struct cpu *cpu, struct memory *mem, |
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int writeflag, void *); |
int writeflag, void *); |
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void dev_le_init(struct machine *machine, struct memory *mem, |
void dev_le_init(struct machine *machine, struct memory *mem, |
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uint64_t baseaddr, uint64_t buf_start, uint64_t buf_end, |
uint64_t baseaddr, uint64_t buf_start, uint64_t buf_end, |
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int irq_nr, int len); |
char *irq_path, int len); |
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/* dev_m700_fb.c: */ |
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#define DEV_M700_FB_LENGTH 0x10000 /* TODO? */ |
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int dev_m700_fb_access(struct cpu *cpu, struct memory *mem, |
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uint64_t relative_addr, unsigned char *data, size_t len, |
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int writeflag, void *); |
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void dev_m700_fb_init(struct machine *machine, struct memory *mem, |
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uint64_t baseaddr, uint64_t baseaddr2); |
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/* dev_malta.c: */ |
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struct malta_data { |
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uint8_t assert_lo; |
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uint8_t assert_hi; |
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uint8_t disable_lo; |
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uint8_t disable_hi; |
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int poll_mode; |
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}; |
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/* dev_mc146818.c: */ |
/* dev_mc146818.c: */ |
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#define DEV_MC146818_LENGTH 0x0000000000000100 |
#define DEV_MC146818_LENGTH 0x0000000000000100 |
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uint64_t relative_addr, unsigned char *data, size_t len, |
uint64_t relative_addr, unsigned char *data, size_t len, |
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int writeflag, void *); |
int writeflag, void *); |
294 |
void dev_mc146818_init(struct machine *machine, struct memory *mem, |
void dev_mc146818_init(struct machine *machine, struct memory *mem, |
295 |
uint64_t baseaddr, int irq_nr, int access_style, int addrdiv); |
uint64_t baseaddr, char *irq_path, int access_style, int addrdiv); |
296 |
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297 |
/* dev_pckbc.c: */ |
/* dev_pckbc.c: */ |
298 |
#define DEV_PCKBC_LENGTH 0x10 |
#define DEV_PCKBC_LENGTH 0x10 |
303 |
uint64_t relative_addr, unsigned char *data, size_t len, |
uint64_t relative_addr, unsigned char *data, size_t len, |
304 |
int writeflag, void *); |
int writeflag, void *); |
305 |
int dev_pckbc_init(struct machine *machine, struct memory *mem, |
int dev_pckbc_init(struct machine *machine, struct memory *mem, |
306 |
uint64_t baseaddr, int type, int keyboard_irqnr, int mouse_irqnr, |
uint64_t baseaddr, int type, char *keyboard_irqpath, |
307 |
int in_use, int pc_style_flag); |
char *mouse_irqpath, int in_use, int pc_style_flag); |
|
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|
/* dev_pmppc.c: */ |
|
|
int dev_pmppc_board_access(struct cpu *cpu, struct memory *mem, |
|
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uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, |
|
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void *); |
|
|
void dev_pmppc_init(struct memory *mem); |
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|
/* dev_ps2_spd.c: */ |
|
|
#define DEV_PS2_SPD_LENGTH 0x800 |
|
|
int dev_ps2_spd_access(struct cpu *cpu, struct memory *mem, |
|
|
uint64_t relative_addr, unsigned char *data, size_t len, |
|
|
int writeflag, void *); |
|
|
void dev_ps2_spd_init(struct machine *machine, struct memory *mem, |
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uint64_t baseaddr); |
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|
/* dev_ps2_stuff.c: */ |
|
|
#include "ps2_dmacreg.h" |
|
|
#define N_PS2_DMA_CHANNELS 10 |
|
|
#define N_PS2_TIMERS 4 |
|
|
struct ps2_data { |
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uint32_t timer_count[N_PS2_TIMERS]; |
|
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uint32_t timer_comp[N_PS2_TIMERS]; |
|
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uint32_t timer_mode[N_PS2_TIMERS]; |
|
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uint32_t timer_hold[N_PS2_TIMERS]; /* NOTE: only 0 and 1 are valid */ |
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uint64_t dmac_reg[DMAC_REGSIZE / 0x10]; |
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uint64_t other_memory_base[N_PS2_DMA_CHANNELS]; |
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uint32_t intr; |
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uint32_t imask; |
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uint32_t sbus_smflg; |
|
|
}; |
|
|
#define DEV_PS2_STUFF_LENGTH 0x10000 |
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|
int dev_ps2_stuff_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *); |
|
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struct ps2_data *dev_ps2_stuff_init(struct machine *machine, struct memory *mem, uint64_t baseaddr); |
|
308 |
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309 |
/* dev_pmagja.c: */ |
/* dev_pmagja.c: */ |
310 |
#define DEV_PMAGJA_LENGTH 0x3c0000 |
#define DEV_PMAGJA_LENGTH 0x3c0000 |
311 |
int dev_pmagja_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *); |
int dev_pmagja_access(struct cpu *cpu, struct memory *mem, |
312 |
void dev_pmagja_init(struct machine *machine, struct memory *mem, uint64_t baseaddr, int irq_nr); |
uint64_t relative_addr, unsigned char *data, size_t len, |
313 |
|
int writeflag, void *); |
314 |
/* dev_prep.c: */ |
void dev_pmagja_init(struct machine *machine, struct memory *mem, |
315 |
struct prep_data { |
uint64_t baseaddr, char *irq_path); |
|
uint32_t int_status; |
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}; |
|
316 |
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317 |
/* dev_px.c: */ |
/* dev_px.c: */ |
318 |
struct px_data { |
struct px_data { |
319 |
struct memory *fb_mem; |
struct memory *fb_mem; |
320 |
struct vfb_data *vfb_data; |
struct vfb_data *vfb_data; |
321 |
int type; |
int type; |
322 |
char *px_name; |
char *px_name; |
323 |
int irq_nr; |
struct interrupt irq; |
324 |
int bitdepth; |
int bitdepth; |
325 |
int xconfig; |
int xconfig; |
326 |
int yconfig; |
int yconfig; |
327 |
|
|
328 |
uint32_t intr; |
uint32_t intr; |
329 |
unsigned char sram[128 * 1024]; |
unsigned char sram[128 * 1024]; |
330 |
}; |
}; |
331 |
/* TODO: perhaps these types are wrong? */ |
/* TODO: perhaps these types are wrong? */ |
332 |
#define DEV_PX_TYPE_PX 0 |
#define DEV_PX_TYPE_PX 0 |
336 |
#define DEV_PX_LENGTH 0x3c0000 |
#define DEV_PX_LENGTH 0x3c0000 |
337 |
int dev_px_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, |
int dev_px_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, |
338 |
unsigned char *data, size_t len, int writeflag, void *); |
unsigned char *data, size_t len, int writeflag, void *); |
339 |
void dev_px_init(struct machine *machine, struct memory *mem, uint64_t baseaddr, |
void dev_px_init(struct machine *machine, struct memory *mem, |
340 |
int px_type, int irq_nr); |
uint64_t baseaddr, int px_type, char *irq_path); |
341 |
|
|
342 |
/* dev_ram.c: */ |
/* dev_ram.c: */ |
343 |
#define DEV_RAM_RAM 0 |
#define DEV_RAM_RAM 0 |
397 |
int dev_sgi_ip22_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *); |
int dev_sgi_ip22_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *); |
398 |
struct sgi_ip22_data *dev_sgi_ip22_init(struct machine *machine, struct memory *mem, uint64_t baseaddr, int guiness_flag); |
struct sgi_ip22_data *dev_sgi_ip22_init(struct machine *machine, struct memory *mem, uint64_t baseaddr, int guiness_flag); |
399 |
|
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/* dev_sgi_ip30.c: */ |
|
|
#define DEV_SGI_IP30_LENGTH 0x80000 |
|
|
struct sgi_ip30_data { |
|
|
/* ip30: */ |
|
|
uint64_t imask0; /* 0x10000 */ |
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uint64_t reg_0x10018; |
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uint64_t isr; /* 0x10030 */ |
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|
uint64_t reg_0x20000; |
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|
uint64_t reg_0x30000; |
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|
|
|
/* ip30_2: */ |
|
|
uint64_t reg_0x0029c; |
|
|
|
|
|
/* ip30_3: */ |
|
|
uint64_t reg_0x00284; |
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|
|
|
/* ip30_4: */ |
|
|
uint64_t reg_0x000b0; |
|
|
|
|
|
/* ip30_5: */ |
|
|
uint64_t reg_0x00000; |
|
|
}; |
|
|
int dev_sgi_ip30_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *); |
|
|
struct sgi_ip30_data *dev_sgi_ip30_init(struct machine *machine, struct memory *mem, uint64_t baseaddr); |
|
|
|
|
400 |
/* dev_sgi_ip32.c: */ |
/* dev_sgi_ip32.c: */ |
401 |
#define DEV_CRIME_LENGTH 0x0000000000001000 |
void dev_crime_init(struct machine *machine, struct memory *mem, |
402 |
struct crime_data { |
uint64_t baseaddr, char *irq_path, int use_fb); |
|
unsigned char reg[DEV_CRIME_LENGTH]; |
|
|
int irq_nr; |
|
|
int use_fb; |
|
|
}; |
|
|
int dev_crime_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *); |
|
|
struct crime_data *dev_crime_init(struct machine *machine, struct memory *mem, uint64_t baseaddr, int irq_nr, int use_fb); |
|
|
#define DEV_MACE_LENGTH 0x100 |
|
|
struct mace_data { |
|
|
unsigned char reg[DEV_MACE_LENGTH]; |
|
|
int irqnr; |
|
|
}; |
|
|
int dev_mace_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *); |
|
|
struct mace_data *dev_mace_init(struct memory *mem, uint64_t baseaddr, int irqnr); |
|
403 |
#define DEV_MACEPCI_LENGTH 0x1000 |
#define DEV_MACEPCI_LENGTH 0x1000 |
404 |
int dev_macepci_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *); |
int dev_macepci_access(struct cpu *cpu, struct memory *mem, |
405 |
struct pci_data *dev_macepci_init(struct machine *machine, struct memory *mem, uint64_t baseaddr, int pciirq); |
uint64_t relative_addr, unsigned char *data, size_t len, |
406 |
|
int writeflag, void *); |
407 |
|
struct pci_data *dev_macepci_init(struct machine *machine, struct memory *mem, |
408 |
|
uint64_t baseaddr, char *irq_path); |
409 |
#define DEV_SGI_MEC_LENGTH 0x1000 |
#define DEV_SGI_MEC_LENGTH 0x1000 |
410 |
int dev_sgi_mec_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *); |
int dev_sgi_mec_access(struct cpu *cpu, struct memory *mem, |
411 |
void dev_sgi_mec_init(struct machine *machine, struct memory *mem, uint64_t baseaddr, int irq_nr, unsigned char *macaddr); |
uint64_t relative_addr, unsigned char *data, size_t len, |
412 |
|
int writeflag, void *); |
413 |
|
void dev_sgi_mec_init(struct machine *machine, struct memory *mem, |
414 |
|
uint64_t baseaddr, char *irq_path, unsigned char *macaddr); |
415 |
#define DEV_SGI_UST_LENGTH 0x10000 |
#define DEV_SGI_UST_LENGTH 0x10000 |
416 |
int dev_sgi_ust_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *); |
int dev_sgi_ust_access(struct cpu *cpu, struct memory *mem, |
417 |
|
uint64_t relative_addr, unsigned char *data, size_t len, |
418 |
|
int writeflag, void *); |
419 |
void dev_sgi_ust_init(struct memory *mem, uint64_t baseaddr); |
void dev_sgi_ust_init(struct memory *mem, uint64_t baseaddr); |
420 |
#define DEV_SGI_MTE_LENGTH 0x10000 |
#define DEV_SGI_MTE_LENGTH 0x10000 |
421 |
int dev_sgi_mte_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *); |
int dev_sgi_mte_access(struct cpu *cpu, struct memory *mem, |
422 |
|
uint64_t relative_addr, unsigned char *data, size_t len, |
423 |
|
int writeflag, void *); |
424 |
void dev_sgi_mte_init(struct memory *mem, uint64_t baseaddr); |
void dev_sgi_mte_init(struct memory *mem, uint64_t baseaddr); |
425 |
|
|
426 |
/* dev_sii.c: */ |
/* dev_sii.c: */ |
427 |
#define DEV_SII_LENGTH 0x100 |
#define DEV_SII_LENGTH 0x100 |
428 |
void dev_sii_tick(struct cpu *cpu, void *); |
void dev_sii_tick(struct cpu *cpu, void *); |
429 |
int dev_sii_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *); |
int dev_sii_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, |
430 |
void dev_sii_init(struct machine *machine, struct memory *mem, uint64_t baseaddr, uint64_t buf_start, uint64_t buf_end, int irq_nr); |
unsigned char *data, size_t len, int writeflag, void *); |
431 |
|
void dev_sii_init(struct machine *machine, struct memory *mem, |
432 |
|
uint64_t baseaddr, uint64_t buf_start, uint64_t buf_end, |
433 |
|
char *irq_path); |
434 |
|
|
435 |
/* dev_ssc.c: */ |
/* dev_ssc.c: */ |
436 |
#define DEV_SSC_LENGTH 0x1000 |
#define DEV_SSC_LENGTH 0x1000 |
437 |
int dev_ssc_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *); |
int dev_ssc_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, |
438 |
void dev_ssc_init(struct machine *machine, struct memory *mem, uint64_t baseaddr, int irq_nr, int use_fb, uint32_t *); |
unsigned char *data, size_t len, int writeflag, void *); |
439 |
|
void dev_ssc_init(struct machine *machine, struct memory *mem, |
440 |
|
uint64_t baseaddr, char *irq_path, int use_fb); |
441 |
|
|
442 |
/* dev_turbochannel.c: */ |
/* dev_turbochannel.c: */ |
443 |
#define DEV_TURBOCHANNEL_LEN 0x0470 |
#define DEV_TURBOCHANNEL_LEN 0x0470 |
446 |
int writeflag, void *); |
int writeflag, void *); |
447 |
void dev_turbochannel_init(struct machine *machine, struct memory *mem, |
void dev_turbochannel_init(struct machine *machine, struct memory *mem, |
448 |
int slot_nr, uint64_t baseaddr, uint64_t endaddr, char *device_name, |
int slot_nr, uint64_t baseaddr, uint64_t endaddr, char *device_name, |
449 |
int irq); |
char *irq_path); |
450 |
|
|
451 |
/* dev_uninorth.c: */ |
/* dev_uninorth.c: */ |
452 |
struct pci_data *dev_uninorth_init(struct machine *machine, struct memory *mem, |
struct pci_data *dev_uninorth_init(struct machine *machine, struct memory *mem, |
453 |
uint64_t addr, int irqbase, int pciirq); |
uint64_t addr, int irqbase, int pciirq); |
454 |
|
|
|
/* dev_v3.c: */ |
|
|
struct v3_data { |
|
|
struct pci_data *pci_data; |
|
|
uint16_t lb_map0; |
|
|
}; |
|
|
struct v3_data *dev_v3_init(struct machine *, struct memory *); |
|
|
|
|
455 |
/* dev_vga.c: */ |
/* dev_vga.c: */ |
456 |
int dev_vga_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, |
int dev_vga_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, |
457 |
unsigned char *data, size_t len, int writeflag, void *); |
unsigned char *data, size_t len, int writeflag, void *); |
459 |
uint64_t videomem_base, uint64_t control_base, char *name); |
uint64_t videomem_base, uint64_t control_base, char *name); |
460 |
|
|
461 |
/* dev_vr41xx.c: */ |
/* dev_vr41xx.c: */ |
|
#define DEV_VR41XX_LENGTH 0x800 /* TODO? */ |
|
|
struct vr41xx_data { |
|
|
int cpumodel; |
|
|
|
|
|
int kiu_console_handle; |
|
|
uint32_t kiu_offset; |
|
|
int kiu_irq_nr; |
|
|
int kiu_int_assert; |
|
|
int d0; |
|
|
int d1; |
|
|
int d2; |
|
|
int d3; |
|
|
int d4; |
|
|
int d5; |
|
|
int dont_clear_next; |
|
|
int escape_state; |
|
|
|
|
|
int pending_timer_interrupts; |
|
|
struct timer *timer; |
|
|
|
|
|
/* See icureg.h in NetBSD for more info. */ |
|
|
uint16_t sysint1; |
|
|
uint16_t msysint1; |
|
|
uint16_t giuint; |
|
|
uint16_t giumask; |
|
|
uint16_t sysint2; |
|
|
uint16_t msysint2; |
|
|
}; |
|
|
|
|
|
int dev_vr41xx_access(struct cpu *cpu, struct memory *mem, |
|
|
uint64_t relative_addr, unsigned char *data, size_t len, |
|
|
int writeflag, void *); |
|
462 |
struct vr41xx_data *dev_vr41xx_init(struct machine *machine, |
struct vr41xx_data *dev_vr41xx_init(struct machine *machine, |
463 |
struct memory *mem, int cpumodel); |
struct memory *mem, int cpumodel); |
464 |
|
|