28 |
* SUCH DAMAGE. |
* SUCH DAMAGE. |
29 |
* |
* |
30 |
* |
* |
31 |
* $Id: devices.h,v 1.176 2005/08/05 09:11:49 debug Exp $ |
* $Id: devices.h,v 1.194 2005/11/22 02:07:40 debug Exp $ |
32 |
* |
* |
33 |
* Memory mapped devices. |
* Memory mapped devices. |
34 |
* |
* |
105 |
int dev_au1x00_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *); |
int dev_au1x00_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *); |
106 |
struct au1x00_ic_data *dev_au1x00_init(struct machine *machine, struct memory *mem); |
struct au1x00_ic_data *dev_au1x00_init(struct machine *machine, struct memory *mem); |
107 |
|
|
108 |
|
/* dev_bebox.c: */ |
109 |
|
struct bebox_data { |
110 |
|
/* The 5 motherboard registers: */ |
111 |
|
uint32_t cpu0_int_mask; |
112 |
|
uint32_t cpu1_int_mask; |
113 |
|
uint32_t int_status; |
114 |
|
uint32_t xpi; |
115 |
|
uint32_t resets; |
116 |
|
}; |
117 |
|
|
118 |
/* dev_bt431.c: */ |
/* dev_bt431.c: */ |
119 |
#define DEV_BT431_LENGTH 0x20 |
#define DEV_BT431_LENGTH 0x20 |
120 |
#define DEV_BT431_NREGS 0x800 /* ? */ |
#define DEV_BT431_NREGS 0x800 /* ? */ |
160 |
void dev_colorplanemask_init(struct memory *mem, uint64_t baseaddr, |
void dev_colorplanemask_init(struct memory *mem, uint64_t baseaddr, |
161 |
unsigned char *color_plane_mask); |
unsigned char *color_plane_mask); |
162 |
|
|
163 |
|
/* dev_cpc700.c: */ |
164 |
|
struct cpc700_data { |
165 |
|
struct pci_data *pci_data; |
166 |
|
uint32_t sr; /* Status register (interrupt) */ |
167 |
|
uint32_t er; /* Enable register */ |
168 |
|
}; |
169 |
|
struct cpc700_data *dev_cpc700_init(struct machine *, struct memory *); |
170 |
|
|
171 |
/* dev_dc7085.c: */ |
/* dev_dc7085.c: */ |
172 |
#define DEV_DC7085_LENGTH 0x0000000000000080 |
#define DEV_DC7085_LENGTH 0x0000000000000080 |
173 |
/* see dc7085.h for more info */ |
/* see dc7085.h for more info */ |
198 |
/* dev_disk.c: */ |
/* dev_disk.c: */ |
199 |
#define DEV_DISK_ADDRESS 0x13000000 |
#define DEV_DISK_ADDRESS 0x13000000 |
200 |
|
|
201 |
|
/* dev_eagle.c: */ |
202 |
|
struct pci_data *dev_eagle_init(struct machine *machine, struct memory *mem, |
203 |
|
int irqbase, int pciirq); |
204 |
|
|
205 |
/* dev_ether.c: */ |
/* dev_ether.c: */ |
206 |
#define DEV_ETHER_ADDRESS 0x14000000 |
#define DEV_ETHER_ADDRESS 0x14000000 |
207 |
#define DEV_ETHER_LENGTH 0x8000 |
#define DEV_ETHER_LENGTH 0x8000 |
212 |
/* turbochannel rom, */ |
/* turbochannel rom, */ |
213 |
/* otherwise size = 4MB */ |
/* otherwise size = 4MB */ |
214 |
#define VFB_GENERIC 0 |
#define VFB_GENERIC 0 |
215 |
#define VFB_HPCMIPS 1 |
#define VFB_HPC 1 |
216 |
#define VFB_DEC_VFB01 2 |
#define VFB_DEC_VFB01 2 |
217 |
#define VFB_DEC_VFB02 3 |
#define VFB_DEC_VFB02 3 |
218 |
#define VFB_DEC_MAXINE 4 |
#define VFB_DEC_MAXINE 4 |
265 |
uint64_t baseaddr, int vfb_type, int visible_xsize, int visible_ysize, |
uint64_t baseaddr, int vfb_type, int visible_xsize, int visible_ysize, |
266 |
int xsize, int ysize, int bit_depth, char *name); |
int xsize, int ysize, int bit_depth, char *name); |
267 |
|
|
268 |
|
/* dev_footbridge: */ |
269 |
|
#define N_FOOTBRIDGE_TIMERS 4 |
270 |
|
struct footbridge_data { |
271 |
|
struct pci_data *pcibus; |
272 |
|
|
273 |
|
int console_handle; |
274 |
|
|
275 |
|
int timer_tick_countdown[N_FOOTBRIDGE_TIMERS]; |
276 |
|
uint32_t timer_load[N_FOOTBRIDGE_TIMERS]; |
277 |
|
uint32_t timer_value[N_FOOTBRIDGE_TIMERS]; |
278 |
|
uint32_t timer_control[N_FOOTBRIDGE_TIMERS]; |
279 |
|
int timer_being_read; |
280 |
|
int timer_poll_mode; |
281 |
|
|
282 |
|
uint32_t irq_status; |
283 |
|
uint32_t irq_enable; |
284 |
|
|
285 |
|
uint32_t fiq_status; |
286 |
|
uint32_t fiq_enable; |
287 |
|
}; |
288 |
|
|
289 |
/* dev_gt.c: */ |
/* dev_gt.c: */ |
290 |
#define DEV_GT_LENGTH 0x1000 |
#define DEV_GT_LENGTH 0x1000 |
291 |
int dev_gt_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, |
int dev_gt_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, |
398 |
#define MC146818_ARC_NEC 2 |
#define MC146818_ARC_NEC 2 |
399 |
#define MC146818_ARC_JAZZ 3 |
#define MC146818_ARC_JAZZ 3 |
400 |
#define MC146818_SGI 4 |
#define MC146818_SGI 4 |
401 |
|
#define MC146818_CATS 5 |
402 |
|
#define MC146818_ALGOR 6 |
403 |
|
#define MC146818_PMPPC 7 |
404 |
/* see mc146818reg.h for more info */ |
/* see mc146818reg.h for more info */ |
405 |
void dev_mc146818_tick(struct cpu *cpu, void *); |
void dev_mc146818_tick(struct cpu *cpu, void *); |
406 |
int dev_mc146818_access(struct cpu *cpu, struct memory *mem, |
int dev_mc146818_access(struct cpu *cpu, struct memory *mem, |
462 |
int dev_pmagja_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *); |
int dev_pmagja_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *); |
463 |
void dev_pmagja_init(struct machine *machine, struct memory *mem, uint64_t baseaddr, int irq_nr); |
void dev_pmagja_init(struct machine *machine, struct memory *mem, uint64_t baseaddr, int irq_nr); |
464 |
|
|
465 |
|
/* dev_prep.c: */ |
466 |
|
struct prep_data { |
467 |
|
uint32_t int_status; |
468 |
|
}; |
469 |
|
|
470 |
/* dev_px.c: */ |
/* dev_px.c: */ |
471 |
struct px_data { |
struct px_data { |
472 |
struct memory *fb_mem; |
struct memory *fb_mem; |
487 |
#define DEV_PX_TYPE_PXGPLUS 2 |
#define DEV_PX_TYPE_PXGPLUS 2 |
488 |
#define DEV_PX_TYPE_PXGPLUSTURBO 3 |
#define DEV_PX_TYPE_PXGPLUSTURBO 3 |
489 |
#define DEV_PX_LENGTH 0x3c0000 |
#define DEV_PX_LENGTH 0x3c0000 |
490 |
int dev_px_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *); |
int dev_px_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, |
491 |
void dev_px_init(struct machine *machine, struct memory *mem, uint64_t baseaddr, int px_type, int irq_nr); |
unsigned char *data, size_t len, int writeflag, void *); |
492 |
|
void dev_px_init(struct machine *machine, struct memory *mem, uint64_t baseaddr, |
493 |
|
int px_type, int irq_nr); |
494 |
|
|
495 |
/* dev_ram.c: */ |
/* dev_ram.c: */ |
496 |
#define DEV_RAM_RAM 0 |
#define DEV_RAM_RAM 0 |
497 |
#define DEV_RAM_MIRROR 1 |
#define DEV_RAM_MIRROR 1 |
498 |
int dev_ram_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *); |
#define DEV_RAM_MIGHT_POINT_TO_DEVICES 0x10 |
499 |
void dev_ram_init(struct memory *mem, uint64_t baseaddr, uint64_t length, int mode, uint64_t otheraddr); |
int dev_ram_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, |
500 |
|
unsigned char *data, size_t len, int writeflag, void *); |
501 |
|
void dev_ram_init(struct machine *machine, uint64_t baseaddr, uint64_t length, |
502 |
|
int mode, uint64_t otheraddr); |
503 |
|
|
504 |
/* dev_scc.c: */ |
/* dev_scc.c: */ |
505 |
#define DEV_SCC_LENGTH 0x1000 |
#define DEV_SCC_LENGTH 0x1000 |
506 |
int dev_scc_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *); |
int dev_scc_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, |
507 |
int dev_scc_dma_func(struct cpu *cpu, void *extra, uint64_t addr, size_t dma_len, int tx); |
unsigned char *data, size_t len, int writeflag, void *); |
508 |
void *dev_scc_init(struct machine *machine, struct memory *mem, uint64_t baseaddr, int irq_nr, int use_fb, int scc_nr, int addrmul); |
int dev_scc_dma_func(struct cpu *cpu, void *extra, uint64_t addr, |
509 |
|
size_t dma_len, int tx); |
510 |
|
void *dev_scc_init(struct machine *machine, struct memory *mem, |
511 |
|
uint64_t baseaddr, int irq_nr, int use_fb, int scc_nr, int addrmul); |
512 |
|
|
513 |
/* dev_sfb.c: */ |
/* dev_sfb.c: */ |
514 |
#define DEV_SFB_LENGTH 0x400000 |
#define DEV_SFB_LENGTH 0x400000 |
515 |
int dev_sfb_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *); |
int dev_sfb_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, |
516 |
void dev_sfb_init(struct machine *machine, struct memory *mem, uint64_t baseaddr, struct vfb_data *vfb_data); |
unsigned char *data, size_t len, int writeflag, void *); |
517 |
|
void dev_sfb_init(struct machine *machine, struct memory *mem, |
518 |
|
uint64_t baseaddr, struct vfb_data *vfb_data); |
519 |
|
|
520 |
/* dev_sgi_gbe.c: */ |
/* dev_sgi_gbe.c: */ |
521 |
#define DEV_SGI_GBE_LENGTH 0x1000000 |
#define DEV_SGI_GBE_LENGTH 0x1000000 |
522 |
int dev_sgi_gbe_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *); |
int dev_sgi_gbe_access(struct cpu *cpu, struct memory *mem, |
523 |
void dev_sgi_gbe_init(struct machine *machine, struct memory *mem, uint64_t baseaddr); |
uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, |
524 |
|
void *); |
525 |
|
void dev_sgi_gbe_init(struct machine *machine, struct memory *mem, |
526 |
|
uint64_t baseaddr); |
527 |
|
|
528 |
/* dev_sgi_ip20.c: */ |
/* dev_sgi_ip20.c: */ |
529 |
#define DEV_SGI_IP20_LENGTH 0x40 |
#define DEV_SGI_IP20_LENGTH 0x40 |
663 |
struct vr41xx_data *dev_vr41xx_init(struct machine *machine, |
struct vr41xx_data *dev_vr41xx_init(struct machine *machine, |
664 |
struct memory *mem, int cpumodel); |
struct memory *mem, int cpumodel); |
665 |
|
|
|
/* dev_wdc.c: */ |
|
|
#define DEV_WDC_LENGTH 0x8 |
|
|
int dev_wdc_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *); |
|
|
void dev_wdc_init(struct machine *machine, struct memory *mem, uint64_t baseaddr, int irq_nr, int base_drive); |
|
|
|
|
666 |
/* dev_wdsc.c: */ |
/* dev_wdsc.c: */ |
667 |
#define DEV_WDSC_NREGS 0x100 /* 8-bit register select */ |
#define DEV_WDSC_NREGS 0x100 /* 8-bit register select */ |
668 |
#define DEV_WDSC_LENGTH 0x10 |
#define DEV_WDSC_LENGTH 0x10 |