/[gxemul]/trunk/src/include/devices.h
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Revision 28 - (hide annotations)
Mon Oct 8 16:20:26 2007 UTC (13 years, 3 months ago) by dpavlin
File MIME type: text/plain
File size: 26304 byte(s)
++ trunk/HISTORY	(local)
$Id: HISTORY,v 1.1298 2006/07/22 11:27:46 debug Exp $
20060626	Continuing on SPARC emulation (beginning on the 'save'
		instruction, register windows, etc).
20060629	Planning statistics gathering (new -s command line option),
		and renaming speed_tricks to allow_instruction_combinations.
20060630	Some minor manual page updates.
		Various cleanups.
		Implementing the -s command line option.
20060701	FINALLY found the bug which prevented Linux and Ultrix from
		running without the ugly hack in the R2000/R3000 cache isol
		code; it was the phystranslation hint array which was buggy.
		Removing the phystranslation hint code completely, for now.
20060702	Minor dyntrans cleanups; invalidation of physpages now only
		invalidate those parts of a page that have actually been
		translated. (32 parts per page.)
		Some MIPS non-R3000 speed fixes.
		Experimenting with MIPS instruction combination for some
		addiu+bne+sw loops, and sw+sw+sw.
		Adding support (again) for larger-than-4KB pages in MIPS tlbw*.
		Continuing on SPARC emulation: adding load/store instructions.
20060704	Fixing a virtual vs physical page shift bug in the new tlbw*
		implementation. Problem noticed by Jakub Jermar. (Many thanks.)
		Moving rfe and eret to cpu_mips_instr.c, since that is the
		only place that uses them nowadays.
20060705	Removing the BSD license from the "testmachine" include files,
		placing them in the public domain instead; this enables the
		testmachine stuff to be used from projects which are
		incompatible with the BSD license for some reason.
20060707	Adding instruction combinations for the R2000/R3000 L1
		I-cache invalidation code used by NetBSD/pmax 3.0, lui+addiu,
		various branches followed by addiu or nop, and jr ra followed
		by addiu. The time it takes to perform a full NetBSD/pmax R3000
		install on the laptop has dropped from 573 seconds to 539. :-)
20060708	Adding a framebuffer controller device (dev_fbctrl), which so
		far can be used to change the fb resolution during runtime, but
		in the future will also be useful for accelerated block fill/
		copy, and possibly also simplified character output.
		Adding an instruction combination for NetBSD/pmax' strlen.
20060709	Minor fixes: reading raw files in src/file.c wasn't memblock
		aligned, removing buggy multi_sw MIPS instruction combination,
		etc.
20060711	Adding a machine_qemu.c, which contains a "qemu_mips" machine.
		(It mimics QEMU's MIPS machine mode, so that a test kernel
		made for QEMU_MIPS also can run in GXemul... at least to some
		extent.)  Adding a short section about how to run this mode to
		doc/guestoses.html.
20060714	Misc. minor code cleanups.
20060715	Applying a patch which adds getchar() to promemul/yamon.c
		(from Oleksandr Tymoshenko).
		Adding yamon.h from NetBSD, and rewriting yamon.c to use it
		(instead of ugly hardcoded numbers) + some cleanup.
20060716	Found and fixed the bug which broke single-stepping of 64-bit
		programs between 0.4.0 and 0.4.0.1 (caused by too quick
		refactoring and no testing). Hopefully this fix will not
		break too many other things.
20060718	Continuing on the 8253 PIT; it now works with Linux/QEMU_MIPS.
		Re-adding the sw+sw+sw instr comb (the problem was that I had
		ignored endian issues); however, it doesn't seem to give any
		big performance gain.
20060720	Adding a dummy Transputer mode (T414, T800 etc) skeleton (only
		the 'j' and 'ldc' instructions are implemented so far). :-}
20060721	Adding gtreg.h from NetBSD, updating dev_gt.c to use it, plus
		misc. other updates to get Linux 2.6 for evbmips/malta working
		(thanks to Alec Voropay for the details).
		FINALLY found and fixed the bug which made tlbw* for non-R3000
		buggy; it was a reference count problem in the dyntrans core.
20060722	Testing stuff; things seem stable enough for a new release.

==============  RELEASE 0.4.1  ==============


1 dpavlin 4 #ifndef DEVICES_H
2     #define DEVICES_H
3    
4     /*
5 dpavlin 24 * Copyright (C) 2003-2006 Anders Gavare. All rights reserved.
6 dpavlin 4 *
7     * Redistribution and use in source and binary forms, with or without
8     * modification, are permitted provided that the following conditions are met:
9     *
10     * 1. Redistributions of source code must retain the above copyright
11     * notice, this list of conditions and the following disclaimer.
12     * 2. Redistributions in binary form must reproduce the above copyright
13     * notice, this list of conditions and the following disclaimer in the
14     * documentation and/or other materials provided with the distribution.
15     * 3. The name of the author may not be used to endorse or promote products
16     * derived from this software without specific prior written permission.
17     *
18     * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
19     * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20     * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21     * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
22     * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
23     * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
24     * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
25     * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
26     * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
27     * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28     * SUCH DAMAGE.
29     *
30     *
31 dpavlin 28 * $Id: devices.h,v 1.213 2006/07/08 12:30:03 debug Exp $
32 dpavlin 4 *
33     * Memory mapped devices.
34     *
35     * TODO: Separate into lots of smaller files? That might speed up a compile,
36     * but I'm not sure that it's a price worth paying.
37     */
38    
39     #include <sys/types.h>
40     #include <inttypes.h>
41    
42     struct cpu;
43     struct machine;
44     struct memory;
45     struct pci_data;
46    
47     /* #ifdef WITH_X11
48     #include <X11/Xlib.h>
49     #endif */
50    
51 dpavlin 6 /* dev_8259.c: */
52     struct pic8259_data {
53     int irq_nr; /* if connected to another 8259 */
54 dpavlin 4
55 dpavlin 6 int irq_base;
56     int current_command;
57    
58     int init_state;
59    
60     int priority_reg;
61     uint8_t irr; /* interrupt request register */
62     uint8_t isr; /* interrupt in-service register */
63     uint8_t ier; /* interrupt enable register */
64     };
65    
66 dpavlin 4 /* dev_dec_ioasic.c: */
67     #define DEV_DEC_IOASIC_LENGTH 0x80100
68     #define N_DEC_IOASIC_REGS (0x1f0 / 0x10)
69     #define MAX_IOASIC_DMA_FUNCTIONS 8
70     struct dec_ioasic_data {
71     uint32_t reg[N_DEC_IOASIC_REGS];
72     int (*(dma_func[MAX_IOASIC_DMA_FUNCTIONS]))(struct cpu *, void *, uint64_t addr, size_t dma_len, int tx);
73     void *dma_func_extra[MAX_IOASIC_DMA_FUNCTIONS];
74     int rackmount_flag;
75     };
76     int dev_dec_ioasic_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
77     struct dec_ioasic_data *dev_dec_ioasic_init(struct cpu *cpu, struct memory *mem, uint64_t baseaddr, int rackmount_flag);
78    
79 dpavlin 22 /* dev_algor.c: */
80     struct algor_data {
81     uint64_t base_addr;
82     };
83    
84 dpavlin 4 /* dev_asc.c: */
85     #define DEV_ASC_DEC_LENGTH 0x40000
86     #define DEV_ASC_PICA_LENGTH 0x1000
87     #define DEV_ASC_DEC 1
88     #define DEV_ASC_PICA 2
89     int dev_asc_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
90     void dev_asc_init(struct machine *machine, struct memory *mem, uint64_t baseaddr,
91     int irq_nr, void *turbochannel, int mode,
92     size_t (*dma_controller)(void *dma_controller_data,
93     unsigned char *data, size_t len, int writeflag),
94     void *dma_controller_data);
95    
96     /* dev_au1x00.c: */
97     struct au1x00_ic_data {
98     int ic_nr;
99     uint32_t request0_int;
100     uint32_t request1_int;
101     uint32_t config0;
102     uint32_t config1;
103     uint32_t config2;
104     uint32_t source;
105     uint32_t assign_request;
106     uint32_t wakeup;
107     uint32_t mask;
108     };
109    
110     int dev_au1x00_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
111     struct au1x00_ic_data *dev_au1x00_init(struct machine *machine, struct memory *mem);
112    
113 dpavlin 20 /* dev_bebox.c: */
114     struct bebox_data {
115     /* The 5 motherboard registers: */
116     uint32_t cpu0_int_mask;
117     uint32_t cpu1_int_mask;
118     uint32_t int_status;
119     uint32_t xpi;
120     uint32_t resets;
121     };
122    
123 dpavlin 4 /* dev_bt431.c: */
124     #define DEV_BT431_LENGTH 0x20
125     #define DEV_BT431_NREGS 0x800 /* ? */
126     int dev_bt431_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
127     struct vfb_data;
128     void dev_bt431_init(struct memory *mem, uint64_t baseaddr, struct vfb_data *vfb_data, int color_fb_flag);
129    
130     /* dev_bt455.c: */
131     #define DEV_BT455_LENGTH 0x20
132     int dev_bt455_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
133     struct vfb_data;
134     void dev_bt455_init(struct memory *mem, uint64_t baseaddr, struct vfb_data *vfb_data);
135    
136     /* dev_bt459.c: */
137     #define DEV_BT459_LENGTH 0x20
138     #define DEV_BT459_NREGS 0x1000
139     #define BT459_PX 1 /* px[g] */
140     #define BT459_BA 2 /* cfb */
141     #define BT459_BBA 3 /* sfb */
142     int dev_bt459_access(struct cpu *cpu, struct memory *mem,
143     uint64_t relative_addr, unsigned char *data, size_t len,
144     int writeflag, void *);
145     struct vfb_data;
146     void dev_bt459_init(struct machine *machine, struct memory *mem,
147     uint64_t baseaddr, uint64_t baseaddr_irq, struct vfb_data *vfb_data,
148     int color_fb_flag, int irq_nr, int type);
149    
150     /* dev_cons.c: */
151 dpavlin 12 struct cons_data {
152     int console_handle;
153     int irq_nr;
154 dpavlin 22 int in_use;
155 dpavlin 12 };
156 dpavlin 4
157     /* dev_colorplanemask.c: */
158     #define DEV_COLORPLANEMASK_LENGTH 0x0000000000000010
159     int dev_colorplanemask_access(struct cpu *cpu, struct memory *mem,
160     uint64_t relative_addr, unsigned char *data, size_t len,
161     int writeflag, void *);
162     void dev_colorplanemask_init(struct memory *mem, uint64_t baseaddr,
163     unsigned char *color_plane_mask);
164    
165 dpavlin 20 /* dev_cpc700.c: */
166     struct cpc700_data {
167     struct pci_data *pci_data;
168     uint32_t sr; /* Status register (interrupt) */
169     uint32_t er; /* Enable register */
170     };
171     struct cpc700_data *dev_cpc700_init(struct machine *, struct memory *);
172    
173 dpavlin 4 /* dev_dc7085.c: */
174     #define DEV_DC7085_LENGTH 0x0000000000000080
175     /* see dc7085.h for more info */
176     void dev_dc7085_tick(struct cpu *cpu, void *);
177     int dev_dc7085_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
178     int dev_dc7085_init(struct machine *machine, struct memory *mem, uint64_t baseaddr, int irq_nr, int use_fb);
179    
180     /* dev_dec5800.c: */
181     #define DEV_DEC5800_LENGTH 0x1000 /* ? */
182     struct dec5800_data {
183     uint32_t csr;
184     uint32_t vector_0x50;
185     };
186     int dev_dec5800_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
187     struct dec5800_data *dev_dec5800_init(struct machine *machine, struct memory *mem, uint64_t baseaddr);
188     /* 16 slots, 0x2000 bytes each */
189     #define DEV_DECBI_LENGTH 0x20000
190     int dev_decbi_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
191     void dev_decbi_init(struct memory *mem, uint64_t baseaddr);
192     #define DEV_DECCCA_LENGTH 0x10000 /* ? */
193     #define DEC_DECCCA_BASEADDR 0x19000000 /* ? I just made this up */
194     int dev_deccca_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
195     void dev_deccca_init(struct memory *mem, uint64_t baseaddr);
196     #define DEV_DECXMI_LENGTH 0x800000
197     int dev_decxmi_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
198     void dev_decxmi_init(struct memory *mem, uint64_t baseaddr);
199    
200 dpavlin 20 /* dev_eagle.c: */
201     struct pci_data *dev_eagle_init(struct machine *machine, struct memory *mem,
202     int irqbase, int pciirq);
203    
204 dpavlin 4 /* dev_fb.c: */
205 dpavlin 12 #define DEV_FB_LENGTH 0x3c0000 /* 3c0000 to not colide with */
206     /* turbochannel rom, */
207     /* otherwise size = 4MB */
208 dpavlin 22 /* Type: */
209 dpavlin 12 #define VFB_GENERIC 0
210 dpavlin 18 #define VFB_HPC 1
211 dpavlin 12 #define VFB_DEC_VFB01 2
212     #define VFB_DEC_VFB02 3
213     #define VFB_DEC_MAXINE 4
214     #define VFB_PLAYSTATION2 5
215 dpavlin 22 /* Extra flags: */
216     #define VFB_REVERSE_START 0x10000
217 dpavlin 4 struct vfb_data {
218 dpavlin 28 struct memory *memory;
219 dpavlin 4 int vfb_type;
220    
221     int vfb_scaledown;
222    
223     int xsize;
224     int ysize;
225     int bit_depth;
226 dpavlin 10 int color32k; /* hack for 16-bit HPCmips */
227 dpavlin 24 int psp_15bit; /* playstation portable hack */
228 dpavlin 4
229     unsigned char color_plane_mask;
230    
231     int bytes_per_line; /* cached */
232    
233     int visible_xsize;
234     int visible_ysize;
235    
236     size_t framebuffer_size;
237     int x11_xsize, x11_ysize;
238    
239     int update_x1, update_y1, update_x2, update_y2;
240    
241     /* RGB palette for <= 8 bit modes: (r,g,b bytes for each) */
242     unsigned char rgb_palette[256 * 3];
243    
244 dpavlin 28 char *name;
245     char title[100];
246    
247 dpavlin 22 void (*redraw_func)(struct vfb_data *, int, int);
248    
249 dpavlin 4 /* These should always be in sync: */
250     unsigned char *framebuffer;
251     struct fb_window *fb_window;
252     };
253     #define VFB_MFB_BT455 0x100000
254     #define VFB_MFB_BT431 0x180000
255     #define VFB_MFB_VRAM 0x200000
256     #define VFB_CFB_BT459 0x200000
257     void set_grayscale_palette(struct vfb_data *d, int ncolors);
258 dpavlin 6 void dev_fb_resize(struct vfb_data *d, int new_xsize, int new_ysize);
259 dpavlin 4 void dev_fb_setcursor(struct vfb_data *d, int cursor_x, int cursor_y, int on,
260     int cursor_xsize, int cursor_ysize);
261     void framebuffer_blockcopyfill(struct vfb_data *d, int fillflag, int fill_r,
262     int fill_g, int fill_b, int x1, int y1, int x2, int y2,
263     int from_x, int from_y);
264     void dev_fb_tick(struct cpu *, void *);
265 dpavlin 12 int dev_fb_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr,
266     unsigned char *data, size_t len, int writeflag, void *);
267     struct vfb_data *dev_fb_init(struct machine *machine, struct memory *mem,
268     uint64_t baseaddr, int vfb_type, int visible_xsize, int visible_ysize,
269     int xsize, int ysize, int bit_depth, char *name);
270 dpavlin 4
271 dpavlin 14 /* dev_footbridge: */
272     #define N_FOOTBRIDGE_TIMERS 4
273     struct footbridge_data {
274     struct pci_data *pcibus;
275    
276     int console_handle;
277    
278     int timer_tick_countdown[N_FOOTBRIDGE_TIMERS];
279     uint32_t timer_load[N_FOOTBRIDGE_TIMERS];
280     uint32_t timer_value[N_FOOTBRIDGE_TIMERS];
281     uint32_t timer_control[N_FOOTBRIDGE_TIMERS];
282 dpavlin 18 int timer_being_read;
283     int timer_poll_mode;
284 dpavlin 14
285     uint32_t irq_status;
286     uint32_t irq_enable;
287    
288     uint32_t fiq_status;
289     uint32_t fiq_enable;
290     };
291    
292 dpavlin 22 /* dev_gc.c: */
293     struct gc_data {
294     int reassert_irq;
295     uint32_t status_hi;
296     uint32_t status_lo;
297     uint32_t enable_hi;
298     uint32_t enable_lo;
299     };
300     struct gc_data *dev_gc_init(struct machine *, struct memory *, uint64_t addr,
301     int reassert_irq);
302    
303 dpavlin 4 /* dev_gt.c: */
304 dpavlin 10 #define DEV_GT_LENGTH 0x1000
305     int dev_gt_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr,
306     unsigned char *data, size_t len, int writeflag, void *);
307     struct pci_data *dev_gt_init(struct machine *machine, struct memory *mem,
308     uint64_t baseaddr, int irq_nr, int pciirq, int type);
309 dpavlin 4
310 dpavlin 22 /* dev_i80321.c: */
311     struct i80321_data {
312     /* Interrupt Controller */
313     int reassert_irq;
314     uint32_t status;
315     uint32_t enable;
316    
317     uint32_t pci_addr;
318     struct pci_data *pci_bus;
319    
320     /* Memory Controller: */
321     uint32_t mcu_reg[0x100 / sizeof(uint32_t)];
322     };
323    
324 dpavlin 4 /* dev_jazz.c: */
325     #define DEV_JAZZ_LENGTH 0x280
326     struct jazz_data {
327     struct cpu *cpu;
328    
329     /* Jazz stuff: */
330     uint32_t int_enable_mask;
331     uint32_t int_asserted;
332    
333     /* ISA stuff: */
334     uint32_t isa_int_enable_mask;
335     uint32_t isa_int_asserted;
336    
337     int interval;
338     int interval_start;
339    
340     int jazz_timer_value;
341     int jazz_timer_current;
342    
343     uint64_t dma_translation_table_base;
344     uint64_t dma_translation_table_limit;
345    
346     uint32_t dma0_mode;
347     uint32_t dma0_enable;
348     uint32_t dma0_count;
349     uint32_t dma0_addr;
350    
351     uint32_t dma1_mode;
352     /* same for dma1,2,3 actually (TODO) */
353    
354     int led;
355     };
356     size_t dev_jazz_dma_controller(void *dma_controller_data,
357     unsigned char *data, size_t len, int writeflag);
358    
359     /* dev_kn01.c: */
360     #define DEV_KN01_CSR_LENGTH 0x0000000000000004
361     int dev_kn01_csr_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
362     void dev_kn01_csr_init(struct memory *mem, uint64_t baseaddr, int color_fb);
363     #define DEV_VDAC_LENGTH 0x20
364     #define DEV_VDAC_MAPWA 0x00
365     #define DEV_VDAC_MAP 0x04
366     #define DEV_VDAC_MASK 0x08
367     #define DEV_VDAC_MAPRA 0x0c
368     #define DEV_VDAC_OVERWA 0x10
369     #define DEV_VDAC_OVER 0x14
370     #define DEV_VDAC_OVERRA 0x1c
371     int dev_vdac_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
372     void dev_vdac_init(struct memory *mem, uint64_t baseaddr, unsigned char *rgb_palette, int color_fb_flag);
373    
374     /* dev_kn02.c: */
375     struct kn02_csr {
376     uint8_t csr[sizeof(uint32_t)];
377 dpavlin 24 uint8_t filler[4096 - sizeof(uint32_t)]; /* for dyntrans mapping */
378 dpavlin 4 };
379     int dev_kn02_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
380     struct kn02_csr *dev_kn02_init(struct cpu *cpu, struct memory *mem,
381     uint64_t baseaddr);
382    
383     /* dev_kn220.c: */
384     #define DEV_DEC5500_IOBOARD_LENGTH 0x100000
385     int dev_dec5500_ioboard_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
386     struct dec5500_ioboard_data *dev_dec5500_ioboard_init(struct cpu *cpu, struct memory *mem, uint64_t baseaddr);
387     #define DEV_SGEC_LENGTH 0x1000
388     int dev_sgec_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
389     void dev_sgec_init(struct memory *mem, uint64_t baseaddr, int irq_nr);
390    
391     /* dev_kn230.c: */
392     struct kn230_csr {
393     uint32_t csr;
394     };
395    
396     /* dev_le.c: */
397     #define DEV_LE_LENGTH 0x1c0200
398     int dev_le_access(struct cpu *cpu, struct memory *mem,
399     uint64_t relative_addr, unsigned char *data, size_t len,
400     int writeflag, void *);
401     void dev_le_init(struct machine *machine, struct memory *mem,
402     uint64_t baseaddr, uint64_t buf_start, uint64_t buf_end,
403     int irq_nr, int len);
404    
405     /* dev_m700_fb.c: */
406     #define DEV_M700_FB_LENGTH 0x10000 /* TODO? */
407     int dev_m700_fb_access(struct cpu *cpu, struct memory *mem,
408     uint64_t relative_addr, unsigned char *data, size_t len,
409     int writeflag, void *);
410     void dev_m700_fb_init(struct machine *machine, struct memory *mem,
411     uint64_t baseaddr, uint64_t baseaddr2);
412    
413 dpavlin 10 /* dev_malta.c: */
414     struct malta_data {
415     uint8_t assert_lo;
416     uint8_t assert_hi;
417     uint8_t disable_lo;
418     uint8_t disable_hi;
419     int poll_mode;
420     };
421    
422 dpavlin 4 /* dev_mc146818.c: */
423     #define DEV_MC146818_LENGTH 0x0000000000000100
424     #define MC146818_DEC 0
425     #define MC146818_PC_CMOS 1
426     #define MC146818_ARC_NEC 2
427     #define MC146818_ARC_JAZZ 3
428     #define MC146818_SGI 4
429 dpavlin 16 #define MC146818_CATS 5
430 dpavlin 20 #define MC146818_ALGOR 6
431     #define MC146818_PMPPC 7
432 dpavlin 4 /* see mc146818reg.h for more info */
433     void dev_mc146818_tick(struct cpu *cpu, void *);
434     int dev_mc146818_access(struct cpu *cpu, struct memory *mem,
435     uint64_t relative_addr, unsigned char *data, size_t len,
436     int writeflag, void *);
437     void dev_mc146818_init(struct machine *machine, struct memory *mem,
438     uint64_t baseaddr, int irq_nr, int access_style, int addrdiv);
439    
440     /* dev_pckbc.c: */
441     #define DEV_PCKBC_LENGTH 0x10
442     #define PCKBC_8042 0
443     #define PCKBC_8242 1
444     #define PCKBC_JAZZ 3
445     int dev_pckbc_access(struct cpu *cpu, struct memory *mem,
446     uint64_t relative_addr, unsigned char *data, size_t len,
447     int writeflag, void *);
448     int dev_pckbc_init(struct machine *machine, struct memory *mem,
449     uint64_t baseaddr, int type, int keyboard_irqnr, int mouse_irqnr,
450 dpavlin 6 int in_use, int pc_style_flag);
451 dpavlin 4
452     /* dev_pmppc.c: */
453     int dev_pmppc_board_access(struct cpu *cpu, struct memory *mem,
454     uint64_t relative_addr, unsigned char *data, size_t len, int writeflag,
455     void *);
456     void dev_pmppc_init(struct memory *mem);
457    
458     /* dev_ps2_spd.c: */
459     #define DEV_PS2_SPD_LENGTH 0x800
460     int dev_ps2_spd_access(struct cpu *cpu, struct memory *mem,
461     uint64_t relative_addr, unsigned char *data, size_t len,
462     int writeflag, void *);
463     void dev_ps2_spd_init(struct machine *machine, struct memory *mem,
464     uint64_t baseaddr);
465    
466     /* dev_ps2_stuff.c: */
467     #include "ps2_dmacreg.h"
468     #define N_PS2_DMA_CHANNELS 10
469     #define N_PS2_TIMERS 4
470     struct ps2_data {
471     uint32_t timer_count[N_PS2_TIMERS];
472     uint32_t timer_comp[N_PS2_TIMERS];
473     uint32_t timer_mode[N_PS2_TIMERS];
474     uint32_t timer_hold[N_PS2_TIMERS]; /* NOTE: only 0 and 1 are valid */
475    
476     uint64_t dmac_reg[DMAC_REGSIZE / 0x10];
477    
478     uint64_t other_memory_base[N_PS2_DMA_CHANNELS];
479    
480     uint32_t intr;
481     uint32_t imask;
482     uint32_t sbus_smflg;
483     };
484     #define DEV_PS2_STUFF_LENGTH 0x10000
485     int dev_ps2_stuff_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
486     struct ps2_data *dev_ps2_stuff_init(struct machine *machine, struct memory *mem, uint64_t baseaddr);
487    
488     /* dev_pmagja.c: */
489     #define DEV_PMAGJA_LENGTH 0x3c0000
490     int dev_pmagja_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
491     void dev_pmagja_init(struct machine *machine, struct memory *mem, uint64_t baseaddr, int irq_nr);
492    
493 dpavlin 20 /* dev_prep.c: */
494     struct prep_data {
495     uint32_t int_status;
496     };
497    
498 dpavlin 4 /* dev_px.c: */
499     struct px_data {
500     struct memory *fb_mem;
501     struct vfb_data *vfb_data;
502     int type;
503     char *px_name;
504     int irq_nr;
505     int bitdepth;
506     int xconfig;
507     int yconfig;
508    
509     uint32_t intr;
510     unsigned char sram[128 * 1024];
511     };
512     /* TODO: perhaps these types are wrong? */
513     #define DEV_PX_TYPE_PX 0
514     #define DEV_PX_TYPE_PXG 1
515     #define DEV_PX_TYPE_PXGPLUS 2
516     #define DEV_PX_TYPE_PXGPLUSTURBO 3
517     #define DEV_PX_LENGTH 0x3c0000
518 dpavlin 18 int dev_px_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr,
519     unsigned char *data, size_t len, int writeflag, void *);
520     void dev_px_init(struct machine *machine, struct memory *mem, uint64_t baseaddr,
521     int px_type, int irq_nr);
522 dpavlin 4
523     /* dev_ram.c: */
524 dpavlin 18 #define DEV_RAM_RAM 0
525     #define DEV_RAM_MIRROR 1
526     #define DEV_RAM_MIGHT_POINT_TO_DEVICES 0x10
527     int dev_ram_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr,
528     unsigned char *data, size_t len, int writeflag, void *);
529     void dev_ram_init(struct machine *machine, uint64_t baseaddr, uint64_t length,
530     int mode, uint64_t otheraddr);
531 dpavlin 4
532     /* dev_scc.c: */
533     #define DEV_SCC_LENGTH 0x1000
534 dpavlin 18 int dev_scc_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr,
535     unsigned char *data, size_t len, int writeflag, void *);
536     int dev_scc_dma_func(struct cpu *cpu, void *extra, uint64_t addr,
537     size_t dma_len, int tx);
538     void *dev_scc_init(struct machine *machine, struct memory *mem,
539     uint64_t baseaddr, int irq_nr, int use_fb, int scc_nr, int addrmul);
540 dpavlin 4
541     /* dev_sfb.c: */
542     #define DEV_SFB_LENGTH 0x400000
543 dpavlin 18 int dev_sfb_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr,
544     unsigned char *data, size_t len, int writeflag, void *);
545     void dev_sfb_init(struct machine *machine, struct memory *mem,
546     uint64_t baseaddr, struct vfb_data *vfb_data);
547 dpavlin 4
548     /* dev_sgi_gbe.c: */
549     #define DEV_SGI_GBE_LENGTH 0x1000000
550 dpavlin 18 int dev_sgi_gbe_access(struct cpu *cpu, struct memory *mem,
551     uint64_t relative_addr, unsigned char *data, size_t len, int writeflag,
552     void *);
553     void dev_sgi_gbe_init(struct machine *machine, struct memory *mem,
554     uint64_t baseaddr);
555 dpavlin 4
556     /* dev_sgi_ip20.c: */
557     #define DEV_SGI_IP20_LENGTH 0x40
558     #define DEV_SGI_IP20_BASE 0x1fb801c0
559     struct sgi_ip20_data {
560     int dummy;
561     };
562     int dev_sgi_ip20_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
563     struct sgi_ip20_data *dev_sgi_ip20_init(struct cpu *cpu, struct memory *mem, uint64_t baseaddr);
564    
565     /* dev_sgi_ip22.c: */
566     #define DEV_SGI_IP22_LENGTH 0x100
567     #define DEV_SGI_IP22_IMC_LENGTH 0x100
568     #define DEV_SGI_IP22_UNKNOWN2_LENGTH 0x100
569     #define IP22_IMC_BASE 0x1fa00000
570     #define IP22_UNKNOWN2_BASE 0x1fb94000
571     struct sgi_ip22_data {
572     int guiness_flag;
573     uint32_t reg[DEV_SGI_IP22_LENGTH / 4];
574     uint32_t imc_reg[DEV_SGI_IP22_IMC_LENGTH / 4];
575     uint32_t unknown2_reg[DEV_SGI_IP22_UNKNOWN2_LENGTH / 4];
576     uint32_t unknown_timer;
577     };
578     int dev_sgi_ip22_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
579     struct sgi_ip22_data *dev_sgi_ip22_init(struct machine *machine, struct memory *mem, uint64_t baseaddr, int guiness_flag);
580    
581     /* dev_sgi_ip30.c: */
582     #define DEV_SGI_IP30_LENGTH 0x80000
583     struct sgi_ip30_data {
584     /* ip30: */
585     uint64_t imask0; /* 0x10000 */
586     uint64_t reg_0x10018;
587     uint64_t isr; /* 0x10030 */
588     uint64_t reg_0x20000;
589     uint64_t reg_0x30000;
590    
591     /* ip30_2: */
592     uint64_t reg_0x0029c;
593    
594     /* ip30_3: */
595     uint64_t reg_0x00284;
596    
597     /* ip30_4: */
598     uint64_t reg_0x000b0;
599    
600     /* ip30_5: */
601     uint64_t reg_0x00000;
602     };
603     int dev_sgi_ip30_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
604     struct sgi_ip30_data *dev_sgi_ip30_init(struct machine *machine, struct memory *mem, uint64_t baseaddr);
605    
606     /* dev_sgi_ip32.c: */
607     #define DEV_CRIME_LENGTH 0x0000000000001000
608     struct crime_data {
609     unsigned char reg[DEV_CRIME_LENGTH];
610     int irq_nr;
611     int use_fb;
612     };
613     int dev_crime_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
614     struct crime_data *dev_crime_init(struct machine *machine, struct memory *mem, uint64_t baseaddr, int irq_nr, int use_fb);
615     #define DEV_MACE_LENGTH 0x100
616     struct mace_data {
617     unsigned char reg[DEV_MACE_LENGTH];
618     int irqnr;
619     };
620     int dev_mace_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
621     struct mace_data *dev_mace_init(struct memory *mem, uint64_t baseaddr, int irqnr);
622     #define DEV_MACEPCI_LENGTH 0x1000
623     int dev_macepci_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
624 dpavlin 22 struct pci_data *dev_macepci_init(struct machine *machine, struct memory *mem, uint64_t baseaddr, int pciirq);
625 dpavlin 4 #define DEV_SGI_MEC_LENGTH 0x1000
626     int dev_sgi_mec_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
627     void dev_sgi_mec_init(struct machine *machine, struct memory *mem, uint64_t baseaddr, int irq_nr, unsigned char *macaddr);
628     #define DEV_SGI_UST_LENGTH 0x10000
629     int dev_sgi_ust_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
630     void dev_sgi_ust_init(struct memory *mem, uint64_t baseaddr);
631     #define DEV_SGI_MTE_LENGTH 0x10000
632     int dev_sgi_mte_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
633     void dev_sgi_mte_init(struct memory *mem, uint64_t baseaddr);
634    
635     /* dev_sii.c: */
636     #define DEV_SII_LENGTH 0x100
637     void dev_sii_tick(struct cpu *cpu, void *);
638     int dev_sii_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
639     void dev_sii_init(struct machine *machine, struct memory *mem, uint64_t baseaddr, uint64_t buf_start, uint64_t buf_end, int irq_nr);
640    
641     /* dev_ssc.c: */
642     #define DEV_SSC_LENGTH 0x1000
643     int dev_ssc_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
644     void dev_ssc_init(struct machine *machine, struct memory *mem, uint64_t baseaddr, int irq_nr, int use_fb, uint32_t *);
645    
646     /* dev_turbochannel.c: */
647     #define DEV_TURBOCHANNEL_LEN 0x0470
648 dpavlin 6 int dev_turbochannel_access(struct cpu *cpu, struct memory *mem,
649     uint64_t relative_addr, unsigned char *data, size_t len,
650     int writeflag, void *);
651     void dev_turbochannel_init(struct machine *machine, struct memory *mem,
652     int slot_nr, uint64_t baseaddr, uint64_t endaddr, char *device_name,
653     int irq);
654 dpavlin 4
655 dpavlin 22 /* dev_uninorth.c: */
656     struct pci_data *dev_uninorth_init(struct machine *machine, struct memory *mem,
657     uint64_t addr, int irqbase, int pciirq);
658    
659     /* dev_v3.c: */
660     struct v3_data {
661     struct pci_data *pci_data;
662     uint16_t lb_map0;
663     };
664     struct v3_data *dev_v3_init(struct machine *, struct memory *);
665    
666 dpavlin 4 /* dev_vga.c: */
667     int dev_vga_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr,
668     unsigned char *data, size_t len, int writeflag, void *);
669     void dev_vga_init(struct machine *machine, struct memory *mem,
670 dpavlin 6 uint64_t videomem_base, uint64_t control_base, char *name);
671 dpavlin 4
672     /* dev_vr41xx.c: */
673     #define DEV_VR41XX_LENGTH 0x800 /* TODO? */
674     struct vr41xx_data {
675     int cpumodel;
676    
677     int kiu_console_handle;
678 dpavlin 22 uint32_t kiu_offset;
679 dpavlin 4 int kiu_irq_nr;
680     int kiu_int_assert;
681     int d0;
682     int d1;
683     int d2;
684     int d3;
685     int d4;
686     int d5;
687     int dont_clear_next;
688     int escape_state;
689    
690     /* See icureg.h in NetBSD for more info. */
691     uint16_t sysint1;
692     uint16_t msysint1;
693     uint16_t giuint;
694     uint16_t giumask;
695     uint16_t sysint2;
696     uint16_t msysint2;
697     };
698    
699     int dev_vr41xx_access(struct cpu *cpu, struct memory *mem,
700     uint64_t relative_addr, unsigned char *data, size_t len,
701     int writeflag, void *);
702     struct vr41xx_data *dev_vr41xx_init(struct machine *machine,
703     struct memory *mem, int cpumodel);
704    
705     /* dev_wdsc.c: */
706     #define DEV_WDSC_NREGS 0x100 /* 8-bit register select */
707     #define DEV_WDSC_LENGTH 0x10
708     int dev_wdsc_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
709     void dev_wdsc_init(struct machine *machine, struct memory *mem, uint64_t baseaddr, int controller_nr, int irq_nr);
710    
711     /* lk201.c: */
712     struct lk201_data {
713     int use_fb;
714     int console_handle;
715    
716     void (*add_to_rx_queue)(void *,int,int);
717     void *add_data;
718    
719     unsigned char keyb_buf[8];
720     int keyb_buf_pos;
721    
722     int mouse_mode;
723     int mouse_revision; /* 0..15 */
724     int mouse_x, mouse_y, mouse_buttons;
725    
726     int old_host_mouse_x;
727     int old_host_mouse_y;
728     int old_host_mouse_stays_put;
729     int mouse_check_interval;
730     int mouse_check_interval_reset;
731     };
732     void lk201_tick(struct lk201_data *);
733     void lk201_tx_data(struct lk201_data *, int port, int idata);
734     void lk201_init(struct lk201_data *d, int use_fb,
735     void (*add_to_rx_queue)(void *,int,int), int console_handle, void *);
736    
737    
738     #endif /* DEVICES_H */
739    

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