/[gxemul]/trunk/src/include/devices.h
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Revision 22 - (hide annotations)
Mon Oct 8 16:19:37 2007 UTC (13 years, 3 months ago) by dpavlin
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File size: 26632 byte(s)
++ trunk/HISTORY	(local)
$Id: HISTORY,v 1.1121 2006/02/18 21:03:08 debug Exp $
20051126	Cobalt and PReP now work with the 21143 NIC.
		Continuing on Alpha dyntrans things.
		Fixing some more left-shift-by-24 to unsigned.
20051127	Working on OpenFirmware emulation; major cleanup/redesign.
		Progress on MacPPC emulation: NetBSD detects two CPUs (when
		running with -n 2), framebuffer output (for text) works.
		Adding quick-hack Bandit PCI controller and "gc" interrupt
		controller for MacPPC.
20051128	Changing from a Bandit to a Uni-North controller for macppc.
		Continuing on OpenFirmware and MacPPC emulation in general
		(obio controller, and wdc attached to the obio seems to work).
20051129	More work on MacPPC emulation (adding a dummy ADB controller).
		Continuing the PCI bus cleanup (endianness and tag composition)
		and rewriting all PCI controllers' access functions.
20051130	Various minor PPC dyntrans optimizations.
		Manually inlining some parts of the framebuffer redraw routine.
		Slowly beginning the conversion of the old MIPS emulation into
		dyntrans (but this will take quite some time to get right).
		Generalizing quick_pc_to_pointers.
20051201	Documentation update (David Muse has made available a kernel
		which simplifies Debian/DECstation installation).
		Continuing on the ADB bus controller.
20051202	Beginning a rewrite of the Zilog serial controller (dev_zs).
20051203	Continuing on the zs rewrite (now called dev_z8530); conversion
		to devinit style.
		Reworking some of the input-only vs output-only vs input-output
		details of src/console.c, better warning messages, and adding
		a debug dump.
		Removing the concept of "device state"; it wasn't really used.
		Changing some debug output (-vv should now be used to show all
		details about devices and busses; not shown during normal
		startup anymore).
		Beginning on some SPARC instruction disassembly support.
20051204	Minor PPC updates (WALNUT skeleton stuff).
		Continuing on the MIPS dyntrans rewrite.
		More progress on the ADB controller (a keyboard is "detected"
		by NetBSD and OpenBSD).
		Downgrading OpenBSD/arc as a guest OS from "working" to
		"almost working" in the documentation.
		Progress on Algor emulation ("v3" PCI controller).
20051205	Minor updates.
20051207	Sorting devices according to address; this reduces complexity
		of device lookups from O(n) to O(log n) in memory_rw (but no
		real performance increase (yet) in experiments).
20051210	Beginning the work on native dyntrans backends (by making a
		simple skeleton; so far only for Alpha hosts).
20051211	Some very minor SPARC updates.
20051215	Fixing a bug in the MIPS mul (note: not mult) instruction,
		so it also works with non-64-bit emulation. (Thanks to Alec
		Voropay for noticing the problem.)
20051216	More work on the fake/empty/simple/skeleton/whatever backend;
		performance doesn't increase, so this isn't really worth it,
		but it was probably worth it to prepare for a real backend
		later.
20051219	More instr call statistics gathering and analysis stuff.
20051220	Another fix for MIPS 'mul'. Also converting mul and {d,}cl{o,z}
		to dyntrans.
		memory_ppc.c syntax error fix (noticed by Peter Valchev).
		Beginning to move out machines from src/machine.c into
		individual files in src/machines (in a way similar to the
		autodev system for devices).
20051222	Updating the documentation regarding NetBSD/pmax 3.0.
20051223	- " - NetBSD/cats 3.0.
20051225	- " - NetBSD/hpcmips 3.0.
20051226	Continuing on the machine registry redesign.
		Adding support for ARM rrx (33-bit rotate).
		Fixing some signed/unsigned issues (exposed by gcc -W).
20051227	Fixing the bug which prevented a NetBSD/prep 3.0 install kernel
		from starting (triggered when an mtmsr was the last instruction
		on a page). Unfortunately not enough to get the kernel to run
		as well as the 2.1 kernels did.
20051230	Some dyntrans refactoring.
20051231	Continuing on the machine registry redesign.
20060101-10	Continuing... moving more machines. Moving MD interrupt stuff
		from machine.c into a new src/machines/interrupts.c.
20060114	Adding various mvmeppc machine skeletons.
20060115	Continuing on mvme* stuff. NetBSD/mvmeppc prints boot messages
		(for MVME1600) and reaches the root device prompt, but no
		specific hardware devices are emulated yet.
20060116	Minor updates to the mvme1600 emulation mode; the Eagle PCI bus
		seems to work without much modification, and a 21143 can be
		detected, interrupts might work (but untested so far).
		Adding a fake MK48Txx (mkclock) device, for NetBSD/mvmeppc.
20060121	Adding an aux control register for ARM. (A BIG thank you to
		Olivier Houchard for tracking down this bug.)
20060122	Adding more ARM instructions (smulXY), and dev_iq80321_7seg.
20060124	Adding disassembly of more ARM instructions (mia*, mra/mar),
		and some semi-bogus XScale and i80321 registers.
20060201-02	Various minor updates. Moving the last machines out of
		machine.c.
20060204	Adding a -c command line option, for running debugger commands
		before the simulation starts, but after all files have been
		loaded.
		Minor iq80321-related updates.
20060209	Minor hacks (DEVINIT macro, etc).
		Preparing for the generalization of the 64-bit dyntrans address
		translation subsystem.
20060216	Adding ARM ldrd (double-register load).
20060217	Continuing on various ARM-related stuff.
20060218	More progress on the ATA/wdc emulation for NetBSD/iq80321.
		NetBSD/evbarm can now be installed :-)  Updating the docs, etc.
		Continuing on Algor emulation.

==============  RELEASE 0.3.8  ==============


1 dpavlin 4 #ifndef DEVICES_H
2     #define DEVICES_H
3    
4     /*
5     * Copyright (C) 2003-2005 Anders Gavare. All rights reserved.
6     *
7     * Redistribution and use in source and binary forms, with or without
8     * modification, are permitted provided that the following conditions are met:
9     *
10     * 1. Redistributions of source code must retain the above copyright
11     * notice, this list of conditions and the following disclaimer.
12     * 2. Redistributions in binary form must reproduce the above copyright
13     * notice, this list of conditions and the following disclaimer in the
14     * documentation and/or other materials provided with the distribution.
15     * 3. The name of the author may not be used to endorse or promote products
16     * derived from this software without specific prior written permission.
17     *
18     * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
19     * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20     * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21     * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
22     * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
23     * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
24     * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
25     * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
26     * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
27     * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28     * SUCH DAMAGE.
29     *
30     *
31 dpavlin 22 * $Id: devices.h,v 1.207 2006/02/18 17:55:25 debug Exp $
32 dpavlin 4 *
33     * Memory mapped devices.
34     *
35     * TODO: Separate into lots of smaller files? That might speed up a compile,
36     * but I'm not sure that it's a price worth paying.
37     */
38    
39     #include <sys/types.h>
40     #include <inttypes.h>
41    
42     struct cpu;
43     struct machine;
44     struct memory;
45     struct pci_data;
46    
47     /* #ifdef WITH_X11
48     #include <X11/Xlib.h>
49     #endif */
50    
51 dpavlin 6 /* dev_8259.c: */
52     struct pic8259_data {
53     int irq_nr; /* if connected to another 8259 */
54 dpavlin 4
55 dpavlin 6 int irq_base;
56     int current_command;
57    
58     int init_state;
59    
60     int priority_reg;
61     uint8_t irr; /* interrupt request register */
62     uint8_t isr; /* interrupt in-service register */
63     uint8_t ier; /* interrupt enable register */
64     };
65    
66 dpavlin 4 /* dev_dec_ioasic.c: */
67     #define DEV_DEC_IOASIC_LENGTH 0x80100
68     #define N_DEC_IOASIC_REGS (0x1f0 / 0x10)
69     #define MAX_IOASIC_DMA_FUNCTIONS 8
70     struct dec_ioasic_data {
71     uint32_t reg[N_DEC_IOASIC_REGS];
72     int (*(dma_func[MAX_IOASIC_DMA_FUNCTIONS]))(struct cpu *, void *, uint64_t addr, size_t dma_len, int tx);
73     void *dma_func_extra[MAX_IOASIC_DMA_FUNCTIONS];
74     int rackmount_flag;
75     };
76     int dev_dec_ioasic_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
77     struct dec_ioasic_data *dev_dec_ioasic_init(struct cpu *cpu, struct memory *mem, uint64_t baseaddr, int rackmount_flag);
78    
79 dpavlin 22 /* dev_algor.c: */
80     struct algor_data {
81     uint64_t base_addr;
82     };
83    
84 dpavlin 4 /* dev_asc.c: */
85     #define DEV_ASC_DEC_LENGTH 0x40000
86     #define DEV_ASC_PICA_LENGTH 0x1000
87     #define DEV_ASC_DEC 1
88     #define DEV_ASC_PICA 2
89     int dev_asc_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
90     void dev_asc_init(struct machine *machine, struct memory *mem, uint64_t baseaddr,
91     int irq_nr, void *turbochannel, int mode,
92     size_t (*dma_controller)(void *dma_controller_data,
93     unsigned char *data, size_t len, int writeflag),
94     void *dma_controller_data);
95    
96     /* dev_au1x00.c: */
97     struct au1x00_ic_data {
98     int ic_nr;
99     uint32_t request0_int;
100     uint32_t request1_int;
101     uint32_t config0;
102     uint32_t config1;
103     uint32_t config2;
104     uint32_t source;
105     uint32_t assign_request;
106     uint32_t wakeup;
107     uint32_t mask;
108     };
109    
110     int dev_au1x00_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
111     struct au1x00_ic_data *dev_au1x00_init(struct machine *machine, struct memory *mem);
112    
113 dpavlin 20 /* dev_bebox.c: */
114     struct bebox_data {
115     /* The 5 motherboard registers: */
116     uint32_t cpu0_int_mask;
117     uint32_t cpu1_int_mask;
118     uint32_t int_status;
119     uint32_t xpi;
120     uint32_t resets;
121     };
122    
123 dpavlin 4 /* dev_bt431.c: */
124     #define DEV_BT431_LENGTH 0x20
125     #define DEV_BT431_NREGS 0x800 /* ? */
126     int dev_bt431_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
127     struct vfb_data;
128     void dev_bt431_init(struct memory *mem, uint64_t baseaddr, struct vfb_data *vfb_data, int color_fb_flag);
129    
130     /* dev_bt455.c: */
131     #define DEV_BT455_LENGTH 0x20
132     int dev_bt455_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
133     struct vfb_data;
134     void dev_bt455_init(struct memory *mem, uint64_t baseaddr, struct vfb_data *vfb_data);
135    
136     /* dev_bt459.c: */
137     #define DEV_BT459_LENGTH 0x20
138     #define DEV_BT459_NREGS 0x1000
139     #define BT459_PX 1 /* px[g] */
140     #define BT459_BA 2 /* cfb */
141     #define BT459_BBA 3 /* sfb */
142     int dev_bt459_access(struct cpu *cpu, struct memory *mem,
143     uint64_t relative_addr, unsigned char *data, size_t len,
144     int writeflag, void *);
145     struct vfb_data;
146     void dev_bt459_init(struct machine *machine, struct memory *mem,
147     uint64_t baseaddr, uint64_t baseaddr_irq, struct vfb_data *vfb_data,
148     int color_fb_flag, int irq_nr, int type);
149    
150     /* dev_cons.c: */
151     #define DEV_CONS_ADDRESS 0x0000000010000000
152     #define DEV_CONS_LENGTH 0x0000000000000020
153     #define DEV_CONS_PUTGETCHAR 0x0000
154     #define DEV_CONS_HALT 0x0010
155 dpavlin 12 struct cons_data {
156     int console_handle;
157     int irq_nr;
158 dpavlin 22 int in_use;
159 dpavlin 12 };
160 dpavlin 4
161     /* dev_colorplanemask.c: */
162     #define DEV_COLORPLANEMASK_LENGTH 0x0000000000000010
163     int dev_colorplanemask_access(struct cpu *cpu, struct memory *mem,
164     uint64_t relative_addr, unsigned char *data, size_t len,
165     int writeflag, void *);
166     void dev_colorplanemask_init(struct memory *mem, uint64_t baseaddr,
167     unsigned char *color_plane_mask);
168    
169 dpavlin 20 /* dev_cpc700.c: */
170     struct cpc700_data {
171     struct pci_data *pci_data;
172     uint32_t sr; /* Status register (interrupt) */
173     uint32_t er; /* Enable register */
174     };
175     struct cpc700_data *dev_cpc700_init(struct machine *, struct memory *);
176    
177 dpavlin 4 /* dev_dc7085.c: */
178     #define DEV_DC7085_LENGTH 0x0000000000000080
179     /* see dc7085.h for more info */
180     void dev_dc7085_tick(struct cpu *cpu, void *);
181     int dev_dc7085_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
182     int dev_dc7085_init(struct machine *machine, struct memory *mem, uint64_t baseaddr, int irq_nr, int use_fb);
183    
184     /* dev_dec5800.c: */
185     #define DEV_DEC5800_LENGTH 0x1000 /* ? */
186     struct dec5800_data {
187     uint32_t csr;
188     uint32_t vector_0x50;
189     };
190     int dev_dec5800_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
191     struct dec5800_data *dev_dec5800_init(struct machine *machine, struct memory *mem, uint64_t baseaddr);
192     /* 16 slots, 0x2000 bytes each */
193     #define DEV_DECBI_LENGTH 0x20000
194     int dev_decbi_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
195     void dev_decbi_init(struct memory *mem, uint64_t baseaddr);
196     #define DEV_DECCCA_LENGTH 0x10000 /* ? */
197     #define DEC_DECCCA_BASEADDR 0x19000000 /* ? I just made this up */
198     int dev_deccca_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
199     void dev_deccca_init(struct memory *mem, uint64_t baseaddr);
200     #define DEV_DECXMI_LENGTH 0x800000
201     int dev_decxmi_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
202     void dev_decxmi_init(struct memory *mem, uint64_t baseaddr);
203    
204 dpavlin 12 /* dev_disk.c: */
205     #define DEV_DISK_ADDRESS 0x13000000
206    
207 dpavlin 20 /* dev_eagle.c: */
208     struct pci_data *dev_eagle_init(struct machine *machine, struct memory *mem,
209     int irqbase, int pciirq);
210    
211 dpavlin 12 /* dev_ether.c: */
212     #define DEV_ETHER_ADDRESS 0x14000000
213     #define DEV_ETHER_LENGTH 0x8000
214    
215 dpavlin 4 /* dev_fb.c: */
216 dpavlin 12 #define DEV_FB_ADDRESS 0x12000000 /* Default for testmips */
217     #define DEV_FB_LENGTH 0x3c0000 /* 3c0000 to not colide with */
218     /* turbochannel rom, */
219     /* otherwise size = 4MB */
220 dpavlin 22 /* Type: */
221 dpavlin 12 #define VFB_GENERIC 0
222 dpavlin 18 #define VFB_HPC 1
223 dpavlin 12 #define VFB_DEC_VFB01 2
224     #define VFB_DEC_VFB02 3
225     #define VFB_DEC_MAXINE 4
226     #define VFB_PLAYSTATION2 5
227 dpavlin 22 /* Extra flags: */
228     #define VFB_REVERSE_START 0x10000
229 dpavlin 4 struct vfb_data {
230     int vfb_type;
231    
232     int vfb_scaledown;
233    
234     int xsize;
235     int ysize;
236     int bit_depth;
237 dpavlin 10 int color32k; /* hack for 16-bit HPCmips */
238     int psp_15bit; /* plastation portable hack */
239 dpavlin 4
240     unsigned char color_plane_mask;
241    
242     int bytes_per_line; /* cached */
243    
244     int visible_xsize;
245     int visible_ysize;
246    
247     size_t framebuffer_size;
248     int x11_xsize, x11_ysize;
249    
250     int update_x1, update_y1, update_x2, update_y2;
251    
252     /* RGB palette for <= 8 bit modes: (r,g,b bytes for each) */
253     unsigned char rgb_palette[256 * 3];
254    
255 dpavlin 22 void (*redraw_func)(struct vfb_data *, int, int);
256    
257 dpavlin 4 /* These should always be in sync: */
258     unsigned char *framebuffer;
259     struct fb_window *fb_window;
260     };
261     #define VFB_MFB_BT455 0x100000
262     #define VFB_MFB_BT431 0x180000
263     #define VFB_MFB_VRAM 0x200000
264     #define VFB_CFB_BT459 0x200000
265     void set_grayscale_palette(struct vfb_data *d, int ncolors);
266 dpavlin 6 void dev_fb_resize(struct vfb_data *d, int new_xsize, int new_ysize);
267 dpavlin 4 void dev_fb_setcursor(struct vfb_data *d, int cursor_x, int cursor_y, int on,
268     int cursor_xsize, int cursor_ysize);
269     void framebuffer_blockcopyfill(struct vfb_data *d, int fillflag, int fill_r,
270     int fill_g, int fill_b, int x1, int y1, int x2, int y2,
271     int from_x, int from_y);
272     void dev_fb_tick(struct cpu *, void *);
273 dpavlin 12 int dev_fb_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr,
274     unsigned char *data, size_t len, int writeflag, void *);
275     struct vfb_data *dev_fb_init(struct machine *machine, struct memory *mem,
276     uint64_t baseaddr, int vfb_type, int visible_xsize, int visible_ysize,
277     int xsize, int ysize, int bit_depth, char *name);
278 dpavlin 4
279 dpavlin 14 /* dev_footbridge: */
280     #define N_FOOTBRIDGE_TIMERS 4
281     struct footbridge_data {
282     struct pci_data *pcibus;
283    
284     int console_handle;
285    
286     int timer_tick_countdown[N_FOOTBRIDGE_TIMERS];
287     uint32_t timer_load[N_FOOTBRIDGE_TIMERS];
288     uint32_t timer_value[N_FOOTBRIDGE_TIMERS];
289     uint32_t timer_control[N_FOOTBRIDGE_TIMERS];
290 dpavlin 18 int timer_being_read;
291     int timer_poll_mode;
292 dpavlin 14
293     uint32_t irq_status;
294     uint32_t irq_enable;
295    
296     uint32_t fiq_status;
297     uint32_t fiq_enable;
298     };
299    
300 dpavlin 22 /* dev_gc.c: */
301     struct gc_data {
302     int reassert_irq;
303     uint32_t status_hi;
304     uint32_t status_lo;
305     uint32_t enable_hi;
306     uint32_t enable_lo;
307     };
308     struct gc_data *dev_gc_init(struct machine *, struct memory *, uint64_t addr,
309     int reassert_irq);
310    
311 dpavlin 4 /* dev_gt.c: */
312 dpavlin 10 #define DEV_GT_LENGTH 0x1000
313     int dev_gt_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr,
314     unsigned char *data, size_t len, int writeflag, void *);
315     struct pci_data *dev_gt_init(struct machine *machine, struct memory *mem,
316     uint64_t baseaddr, int irq_nr, int pciirq, int type);
317 dpavlin 4
318 dpavlin 22 /* dev_i80321.c: */
319     struct i80321_data {
320     /* Interrupt Controller */
321     int reassert_irq;
322     uint32_t status;
323     uint32_t enable;
324    
325     uint32_t pci_addr;
326     struct pci_data *pci_bus;
327    
328     /* Memory Controller: */
329     uint32_t mcu_reg[0x100 / sizeof(uint32_t)];
330     };
331    
332 dpavlin 4 /* dev_jazz.c: */
333     #define DEV_JAZZ_LENGTH 0x280
334     struct jazz_data {
335     struct cpu *cpu;
336    
337     /* Jazz stuff: */
338     uint32_t int_enable_mask;
339     uint32_t int_asserted;
340    
341     /* ISA stuff: */
342     uint32_t isa_int_enable_mask;
343     uint32_t isa_int_asserted;
344    
345     int interval;
346     int interval_start;
347    
348     int jazz_timer_value;
349     int jazz_timer_current;
350    
351     uint64_t dma_translation_table_base;
352     uint64_t dma_translation_table_limit;
353    
354     uint32_t dma0_mode;
355     uint32_t dma0_enable;
356     uint32_t dma0_count;
357     uint32_t dma0_addr;
358    
359     uint32_t dma1_mode;
360     /* same for dma1,2,3 actually (TODO) */
361    
362     int led;
363     };
364     size_t dev_jazz_dma_controller(void *dma_controller_data,
365     unsigned char *data, size_t len, int writeflag);
366    
367     /* dev_kn01.c: */
368     #define DEV_KN01_CSR_LENGTH 0x0000000000000004
369     int dev_kn01_csr_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
370     void dev_kn01_csr_init(struct memory *mem, uint64_t baseaddr, int color_fb);
371     #define DEV_VDAC_LENGTH 0x20
372     #define DEV_VDAC_MAPWA 0x00
373     #define DEV_VDAC_MAP 0x04
374     #define DEV_VDAC_MASK 0x08
375     #define DEV_VDAC_MAPRA 0x0c
376     #define DEV_VDAC_OVERWA 0x10
377     #define DEV_VDAC_OVER 0x14
378     #define DEV_VDAC_OVERRA 0x1c
379     int dev_vdac_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
380     void dev_vdac_init(struct memory *mem, uint64_t baseaddr, unsigned char *rgb_palette, int color_fb_flag);
381    
382     /* dev_kn02.c: */
383     struct kn02_csr {
384     uint8_t csr[sizeof(uint32_t)];
385     uint8_t filler[4096 - sizeof(uint32_t)]; /* for bintrans mapping */
386     };
387     int dev_kn02_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
388     struct kn02_csr *dev_kn02_init(struct cpu *cpu, struct memory *mem,
389     uint64_t baseaddr);
390    
391     /* dev_kn220.c: */
392     #define DEV_DEC5500_IOBOARD_LENGTH 0x100000
393     int dev_dec5500_ioboard_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
394     struct dec5500_ioboard_data *dev_dec5500_ioboard_init(struct cpu *cpu, struct memory *mem, uint64_t baseaddr);
395     #define DEV_SGEC_LENGTH 0x1000
396     int dev_sgec_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
397     void dev_sgec_init(struct memory *mem, uint64_t baseaddr, int irq_nr);
398    
399     /* dev_kn230.c: */
400     struct kn230_csr {
401     uint32_t csr;
402     };
403    
404     /* dev_le.c: */
405     #define DEV_LE_LENGTH 0x1c0200
406     int dev_le_access(struct cpu *cpu, struct memory *mem,
407     uint64_t relative_addr, unsigned char *data, size_t len,
408     int writeflag, void *);
409     void dev_le_init(struct machine *machine, struct memory *mem,
410     uint64_t baseaddr, uint64_t buf_start, uint64_t buf_end,
411     int irq_nr, int len);
412    
413     /* dev_m700_fb.c: */
414     #define DEV_M700_FB_LENGTH 0x10000 /* TODO? */
415     int dev_m700_fb_access(struct cpu *cpu, struct memory *mem,
416     uint64_t relative_addr, unsigned char *data, size_t len,
417     int writeflag, void *);
418     void dev_m700_fb_init(struct machine *machine, struct memory *mem,
419     uint64_t baseaddr, uint64_t baseaddr2);
420    
421 dpavlin 10 /* dev_malta.c: */
422     struct malta_data {
423     uint8_t assert_lo;
424     uint8_t assert_hi;
425     uint8_t disable_lo;
426     uint8_t disable_hi;
427     int poll_mode;
428     };
429    
430 dpavlin 4 /* dev_mc146818.c: */
431     #define DEV_MC146818_LENGTH 0x0000000000000100
432     #define MC146818_DEC 0
433     #define MC146818_PC_CMOS 1
434     #define MC146818_ARC_NEC 2
435     #define MC146818_ARC_JAZZ 3
436     #define MC146818_SGI 4
437 dpavlin 16 #define MC146818_CATS 5
438 dpavlin 20 #define MC146818_ALGOR 6
439     #define MC146818_PMPPC 7
440 dpavlin 4 /* see mc146818reg.h for more info */
441     void dev_mc146818_tick(struct cpu *cpu, void *);
442     int dev_mc146818_access(struct cpu *cpu, struct memory *mem,
443     uint64_t relative_addr, unsigned char *data, size_t len,
444     int writeflag, void *);
445     void dev_mc146818_init(struct machine *machine, struct memory *mem,
446     uint64_t baseaddr, int irq_nr, int access_style, int addrdiv);
447    
448     /* dev_pckbc.c: */
449     #define DEV_PCKBC_LENGTH 0x10
450     #define PCKBC_8042 0
451     #define PCKBC_8242 1
452     #define PCKBC_JAZZ 3
453     int dev_pckbc_access(struct cpu *cpu, struct memory *mem,
454     uint64_t relative_addr, unsigned char *data, size_t len,
455     int writeflag, void *);
456     int dev_pckbc_init(struct machine *machine, struct memory *mem,
457     uint64_t baseaddr, int type, int keyboard_irqnr, int mouse_irqnr,
458 dpavlin 6 int in_use, int pc_style_flag);
459 dpavlin 4
460     /* dev_pmppc.c: */
461     int dev_pmppc_board_access(struct cpu *cpu, struct memory *mem,
462     uint64_t relative_addr, unsigned char *data, size_t len, int writeflag,
463     void *);
464     void dev_pmppc_init(struct memory *mem);
465    
466     /* dev_ps2_spd.c: */
467     #define DEV_PS2_SPD_LENGTH 0x800
468     int dev_ps2_spd_access(struct cpu *cpu, struct memory *mem,
469     uint64_t relative_addr, unsigned char *data, size_t len,
470     int writeflag, void *);
471     void dev_ps2_spd_init(struct machine *machine, struct memory *mem,
472     uint64_t baseaddr);
473    
474     /* dev_ps2_stuff.c: */
475     #include "ps2_dmacreg.h"
476     #define N_PS2_DMA_CHANNELS 10
477     #define N_PS2_TIMERS 4
478     struct ps2_data {
479     uint32_t timer_count[N_PS2_TIMERS];
480     uint32_t timer_comp[N_PS2_TIMERS];
481     uint32_t timer_mode[N_PS2_TIMERS];
482     uint32_t timer_hold[N_PS2_TIMERS]; /* NOTE: only 0 and 1 are valid */
483    
484     uint64_t dmac_reg[DMAC_REGSIZE / 0x10];
485    
486     uint64_t other_memory_base[N_PS2_DMA_CHANNELS];
487    
488     uint32_t intr;
489     uint32_t imask;
490     uint32_t sbus_smflg;
491     };
492     #define DEV_PS2_STUFF_LENGTH 0x10000
493     int dev_ps2_stuff_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
494     struct ps2_data *dev_ps2_stuff_init(struct machine *machine, struct memory *mem, uint64_t baseaddr);
495    
496     /* dev_pmagja.c: */
497     #define DEV_PMAGJA_LENGTH 0x3c0000
498     int dev_pmagja_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
499     void dev_pmagja_init(struct machine *machine, struct memory *mem, uint64_t baseaddr, int irq_nr);
500    
501 dpavlin 20 /* dev_prep.c: */
502     struct prep_data {
503     uint32_t int_status;
504     };
505    
506 dpavlin 4 /* dev_px.c: */
507     struct px_data {
508     struct memory *fb_mem;
509     struct vfb_data *vfb_data;
510     int type;
511     char *px_name;
512     int irq_nr;
513     int bitdepth;
514     int xconfig;
515     int yconfig;
516    
517     uint32_t intr;
518     unsigned char sram[128 * 1024];
519     };
520     /* TODO: perhaps these types are wrong? */
521     #define DEV_PX_TYPE_PX 0
522     #define DEV_PX_TYPE_PXG 1
523     #define DEV_PX_TYPE_PXGPLUS 2
524     #define DEV_PX_TYPE_PXGPLUSTURBO 3
525     #define DEV_PX_LENGTH 0x3c0000
526 dpavlin 18 int dev_px_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr,
527     unsigned char *data, size_t len, int writeflag, void *);
528     void dev_px_init(struct machine *machine, struct memory *mem, uint64_t baseaddr,
529     int px_type, int irq_nr);
530 dpavlin 4
531     /* dev_ram.c: */
532 dpavlin 18 #define DEV_RAM_RAM 0
533     #define DEV_RAM_MIRROR 1
534     #define DEV_RAM_MIGHT_POINT_TO_DEVICES 0x10
535     int dev_ram_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr,
536     unsigned char *data, size_t len, int writeflag, void *);
537     void dev_ram_init(struct machine *machine, uint64_t baseaddr, uint64_t length,
538     int mode, uint64_t otheraddr);
539 dpavlin 4
540     /* dev_scc.c: */
541     #define DEV_SCC_LENGTH 0x1000
542 dpavlin 18 int dev_scc_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr,
543     unsigned char *data, size_t len, int writeflag, void *);
544     int dev_scc_dma_func(struct cpu *cpu, void *extra, uint64_t addr,
545     size_t dma_len, int tx);
546     void *dev_scc_init(struct machine *machine, struct memory *mem,
547     uint64_t baseaddr, int irq_nr, int use_fb, int scc_nr, int addrmul);
548 dpavlin 4
549     /* dev_sfb.c: */
550     #define DEV_SFB_LENGTH 0x400000
551 dpavlin 18 int dev_sfb_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr,
552     unsigned char *data, size_t len, int writeflag, void *);
553     void dev_sfb_init(struct machine *machine, struct memory *mem,
554     uint64_t baseaddr, struct vfb_data *vfb_data);
555 dpavlin 4
556     /* dev_sgi_gbe.c: */
557     #define DEV_SGI_GBE_LENGTH 0x1000000
558 dpavlin 18 int dev_sgi_gbe_access(struct cpu *cpu, struct memory *mem,
559     uint64_t relative_addr, unsigned char *data, size_t len, int writeflag,
560     void *);
561     void dev_sgi_gbe_init(struct machine *machine, struct memory *mem,
562     uint64_t baseaddr);
563 dpavlin 4
564     /* dev_sgi_ip20.c: */
565     #define DEV_SGI_IP20_LENGTH 0x40
566     #define DEV_SGI_IP20_BASE 0x1fb801c0
567     struct sgi_ip20_data {
568     int dummy;
569     };
570     int dev_sgi_ip20_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
571     struct sgi_ip20_data *dev_sgi_ip20_init(struct cpu *cpu, struct memory *mem, uint64_t baseaddr);
572    
573     /* dev_sgi_ip22.c: */
574     #define DEV_SGI_IP22_LENGTH 0x100
575     #define DEV_SGI_IP22_IMC_LENGTH 0x100
576     #define DEV_SGI_IP22_UNKNOWN2_LENGTH 0x100
577     #define IP22_IMC_BASE 0x1fa00000
578     #define IP22_UNKNOWN2_BASE 0x1fb94000
579     struct sgi_ip22_data {
580     int guiness_flag;
581     uint32_t reg[DEV_SGI_IP22_LENGTH / 4];
582     uint32_t imc_reg[DEV_SGI_IP22_IMC_LENGTH / 4];
583     uint32_t unknown2_reg[DEV_SGI_IP22_UNKNOWN2_LENGTH / 4];
584     uint32_t unknown_timer;
585     };
586     int dev_sgi_ip22_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
587     struct sgi_ip22_data *dev_sgi_ip22_init(struct machine *machine, struct memory *mem, uint64_t baseaddr, int guiness_flag);
588    
589     /* dev_sgi_ip30.c: */
590     #define DEV_SGI_IP30_LENGTH 0x80000
591     struct sgi_ip30_data {
592     /* ip30: */
593     uint64_t imask0; /* 0x10000 */
594     uint64_t reg_0x10018;
595     uint64_t isr; /* 0x10030 */
596     uint64_t reg_0x20000;
597     uint64_t reg_0x30000;
598    
599     /* ip30_2: */
600     uint64_t reg_0x0029c;
601    
602     /* ip30_3: */
603     uint64_t reg_0x00284;
604    
605     /* ip30_4: */
606     uint64_t reg_0x000b0;
607    
608     /* ip30_5: */
609     uint64_t reg_0x00000;
610     };
611     int dev_sgi_ip30_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
612     struct sgi_ip30_data *dev_sgi_ip30_init(struct machine *machine, struct memory *mem, uint64_t baseaddr);
613    
614     /* dev_sgi_ip32.c: */
615     #define DEV_CRIME_LENGTH 0x0000000000001000
616     struct crime_data {
617     unsigned char reg[DEV_CRIME_LENGTH];
618     int irq_nr;
619     int use_fb;
620     };
621     int dev_crime_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
622     struct crime_data *dev_crime_init(struct machine *machine, struct memory *mem, uint64_t baseaddr, int irq_nr, int use_fb);
623     #define DEV_MACE_LENGTH 0x100
624     struct mace_data {
625     unsigned char reg[DEV_MACE_LENGTH];
626     int irqnr;
627     };
628     int dev_mace_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
629     struct mace_data *dev_mace_init(struct memory *mem, uint64_t baseaddr, int irqnr);
630     #define DEV_MACEPCI_LENGTH 0x1000
631     int dev_macepci_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
632 dpavlin 22 struct pci_data *dev_macepci_init(struct machine *machine, struct memory *mem, uint64_t baseaddr, int pciirq);
633 dpavlin 4 #define DEV_SGI_MEC_LENGTH 0x1000
634     int dev_sgi_mec_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
635     void dev_sgi_mec_init(struct machine *machine, struct memory *mem, uint64_t baseaddr, int irq_nr, unsigned char *macaddr);
636     #define DEV_SGI_UST_LENGTH 0x10000
637     int dev_sgi_ust_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
638     void dev_sgi_ust_init(struct memory *mem, uint64_t baseaddr);
639     #define DEV_SGI_MTE_LENGTH 0x10000
640     int dev_sgi_mte_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
641     void dev_sgi_mte_init(struct memory *mem, uint64_t baseaddr);
642    
643     /* dev_sii.c: */
644     #define DEV_SII_LENGTH 0x100
645     void dev_sii_tick(struct cpu *cpu, void *);
646     int dev_sii_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
647     void dev_sii_init(struct machine *machine, struct memory *mem, uint64_t baseaddr, uint64_t buf_start, uint64_t buf_end, int irq_nr);
648    
649     /* dev_ssc.c: */
650     #define DEV_SSC_LENGTH 0x1000
651     int dev_ssc_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
652     void dev_ssc_init(struct machine *machine, struct memory *mem, uint64_t baseaddr, int irq_nr, int use_fb, uint32_t *);
653    
654     /* dev_turbochannel.c: */
655     #define DEV_TURBOCHANNEL_LEN 0x0470
656 dpavlin 6 int dev_turbochannel_access(struct cpu *cpu, struct memory *mem,
657     uint64_t relative_addr, unsigned char *data, size_t len,
658     int writeflag, void *);
659     void dev_turbochannel_init(struct machine *machine, struct memory *mem,
660     int slot_nr, uint64_t baseaddr, uint64_t endaddr, char *device_name,
661     int irq);
662 dpavlin 4
663 dpavlin 22 /* dev_uninorth.c: */
664     struct pci_data *dev_uninorth_init(struct machine *machine, struct memory *mem,
665     uint64_t addr, int irqbase, int pciirq);
666    
667     /* dev_v3.c: */
668     struct v3_data {
669     struct pci_data *pci_data;
670     uint16_t lb_map0;
671     };
672     struct v3_data *dev_v3_init(struct machine *, struct memory *);
673    
674 dpavlin 4 /* dev_vga.c: */
675     int dev_vga_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr,
676     unsigned char *data, size_t len, int writeflag, void *);
677     void dev_vga_init(struct machine *machine, struct memory *mem,
678 dpavlin 6 uint64_t videomem_base, uint64_t control_base, char *name);
679 dpavlin 4
680     /* dev_vr41xx.c: */
681     #define DEV_VR41XX_LENGTH 0x800 /* TODO? */
682     struct vr41xx_data {
683     int cpumodel;
684    
685     int kiu_console_handle;
686 dpavlin 22 uint32_t kiu_offset;
687 dpavlin 4 int kiu_irq_nr;
688     int kiu_int_assert;
689     int d0;
690     int d1;
691     int d2;
692     int d3;
693     int d4;
694     int d5;
695     int dont_clear_next;
696     int escape_state;
697    
698     /* See icureg.h in NetBSD for more info. */
699     uint16_t sysint1;
700     uint16_t msysint1;
701     uint16_t giuint;
702     uint16_t giumask;
703     uint16_t sysint2;
704     uint16_t msysint2;
705     };
706    
707     int dev_vr41xx_access(struct cpu *cpu, struct memory *mem,
708     uint64_t relative_addr, unsigned char *data, size_t len,
709     int writeflag, void *);
710     struct vr41xx_data *dev_vr41xx_init(struct machine *machine,
711     struct memory *mem, int cpumodel);
712    
713     /* dev_wdsc.c: */
714     #define DEV_WDSC_NREGS 0x100 /* 8-bit register select */
715     #define DEV_WDSC_LENGTH 0x10
716     int dev_wdsc_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, unsigned char *data, size_t len, int writeflag, void *);
717     void dev_wdsc_init(struct machine *machine, struct memory *mem, uint64_t baseaddr, int controller_nr, int irq_nr);
718    
719     /* lk201.c: */
720     struct lk201_data {
721     int use_fb;
722     int console_handle;
723    
724     void (*add_to_rx_queue)(void *,int,int);
725     void *add_data;
726    
727     unsigned char keyb_buf[8];
728     int keyb_buf_pos;
729    
730     int mouse_mode;
731     int mouse_revision; /* 0..15 */
732     int mouse_x, mouse_y, mouse_buttons;
733    
734     int old_host_mouse_x;
735     int old_host_mouse_y;
736     int old_host_mouse_stays_put;
737     int mouse_check_interval;
738     int mouse_check_interval_reset;
739     };
740     void lk201_tick(struct lk201_data *);
741     void lk201_tx_data(struct lk201_data *, int port, int idata);
742     void lk201_init(struct lk201_data *d, int use_fb,
743     void (*add_to_rx_queue)(void *,int,int), int console_handle, void *);
744    
745    
746     #endif /* DEVICES_H */
747    

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