/[gxemul]/trunk/src/include/dec_kn02.h
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Contents of /trunk/src/include/dec_kn02.h

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Revision 4 - (show annotations)
Mon Oct 8 16:18:00 2007 UTC (16 years, 5 months ago) by dpavlin
File MIME type: text/plain
File size: 8830 byte(s)
++ trunk/HISTORY	(local)
$Id: HISTORY,v 1.707 2005/04/27 16:37:33 debug Exp $
20050408	Some minor updates to the wdc. Linux now doesn't complain
		anymore if a disk is non-present.
20050409	Various minor fixes (a bintrans bug, and some other things).
		The wdc seems to work with Playstation2 emulation, but there
		is a _long_ annoying delay when disks are detected.
		Fixing a really important bintrans bug (when devices and RAM
		are mixed within 4KB pages), which was triggered with
		NetBSD/playstation2 kernels.
20050410	Adding a dummy dev_ps2_ether (just so that NetBSD doesn't
		complain as much during bootup).
		Symbols starting with '$' are now ignored.
		Renaming dev_ps2_ohci.c to dev_ohci.c, etc.
20050411	Moving the bintrans-cache-isolation check from cpu_mips.c to
		cpu_mips_coproc.c. (I thought this would give a speedup, but
		it's not noticable.)
		Better playstation2 sbus interrupt code.
		Skip ahead many ticks if the count register is read manually.
		(This increases the speed of delay-loops that simply read
		the count register.)
20050412	Updates to the playstation2 timer/interrupt code.
		Some other minor updates.
20050413	NetBSD/cobalt runs from a disk image :-) including userland;
		updating the documentation on how to install NetBSD/cobalt
		using NetBSD/pmax (!).
		Some minor bintrans updates (no real speed improvement) and
		other minor updates (playstation2 now uses the -o options).
20050414	Adding a dummy x86 (and AMD64) mode.
20050415	Adding some (32-bit and 16-bit) x86 instructions.
		Adding some initial support for non-SCSI, non-IDE floppy
		images. (The x86 mode can boot from these, more or less.)
		Moving the devices/ and include/ directories to src/devices/
		and src/include/, respectively.
20050416	Continuing on the x86 stuff. (Adding pc_bios.c and some simple
		support for software interrupts in 16-bit mode.)
20050417	Ripping out most of the x86 instruction decoding stuff, trying
		to rewrite it in a cleaner way.
		Disabling some of the least working CPU families in the
		configure script (sparc, x86, alpha, hppa), so that they are
		not enabled by default.
20050418	Trying to fix the bug which caused problems when turning on
		and off bintrans interactively, by flushing the bintrans cache
		whenever bintrans is manually (re)enabled.
20050419	Adding the 'lswi' ppc instruction.
		Minor updates to the x86 instruction decoding.
20050420	Renaming x86 register name indices from R_xx to X86_R_xx (this
		makes building on Tru64 nicer).
20050422	Adding a check for duplicate MIPS TLB entries on tlbwr/tlbwi.
20050427	Adding screenshots to guestoses.html.
		Some minor fixes and testing for the next release.

==============  RELEASE 0.3.2  ==============


1 /* gxemul: $Id: dec_kn02.h,v 1.3 2005/03/05 12:34:02 debug Exp $ */
2 /* $NetBSD: kn02.h,v 1.8 2000/02/29 04:41:56 nisimura Exp $ */
3
4 /*-
5 * Copyright (c) 1992, 1993
6 * The Regents of the University of California. All rights reserved.
7 *
8 * This code is derived from software contributed to Berkeley by
9 * The Mach Operating System project at Carnegie-Mellon University,
10 * Ralph Campbell and Rick Macklem.
11 *
12 * Redistribution and use in source and binary forms, with or without
13 * modification, are permitted provided that the following conditions
14 * are met:
15 * 1. Redistributions of source code must retain the above copyright
16 * notice, this list of conditions and the following disclaimer.
17 * 2. Redistributions in binary form must reproduce the above copyright
18 * notice, this list of conditions and the following disclaimer in the
19 * documentation and/or other materials provided with the distribution.
20 * 3. All advertising materials mentioning features or use of this software
21 * must display the following acknowledgement:
22 * This product includes software developed by the University of
23 * California, Berkeley and its contributors.
24 * 4. Neither the name of the University nor the names of its contributors
25 * may be used to endorse or promote products derived from this software
26 * without specific prior written permission.
27 *
28 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
29 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
30 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
31 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
32 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
33 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
34 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
35 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
37 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
38 * SUCH DAMAGE.
39 *
40 * @(#)kn02.h 8.1 (Berkeley) 6/10/93
41 */
42
43 /*
44 * Mach Operating System
45 * Copyright (c) 1991,1990,1989 Carnegie Mellon University
46 * All Rights Reserved.
47 *
48 * Permission to use, copy, modify and distribute this software and
49 * its documentation is hereby granted, provided that both the copyright
50 * notice and this permission notice appear in all copies of the
51 * software, derivative works or modified versions, and any portions
52 * thereof, and that both notices appear in supporting documentation.
53 *
54 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
55 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
56 * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
57 *
58 * Carnegie Mellon requests users of this software to return to
59 *
60 * Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU
61 * School of Computer Science
62 * Carnegie Mellon University
63 * Pittsburgh PA 15213-3890
64 *
65 * any improvements or extensions that they make and grant Carnegie the
66 * rights to redistribute these changes.
67 */
68 /*
69 * HISTORY
70 * Log: kn02.h,v
71 * Revision 2.5 91/05/14 17:23:30 mrt
72 * Correcting copyright
73 *
74 * Revision 2.4 91/02/05 17:42:03 mrt
75 * Added author notices
76 * [91/02/04 11:14:23 mrt]
77 *
78 * Changed to use new Mach copyright
79 * [91/02/02 12:12:58 mrt]
80 *
81 * Revision 2.3 90/12/05 23:32:04 af
82 *
83 *
84 * Revision 2.1.1.2 90/11/01 02:48:10 af
85 * Reworked a bit, made reentrant.
86 *
87 * Revision 2.1.1.1 90/10/03 11:48:22 af
88 * Created, from the DEC specs:
89 * "DECstation 5000/200 KN02 System Module Functional Specification"
90 * Workstation Systems Engineering, Palo Alto, CA. Aug 27, 1990.
91 * [90/09/03 af]
92 */
93 /*
94 * File: kn02.h
95 * Author: Alessandro Forin, Carnegie Mellon University
96 * Date: 9/90
97 *
98 * Definitions specific to the KN02 processor (3max)
99 */
100
101 #ifndef MIPS_KN02_H
102 #define MIPS_KN02_H 1
103
104 /*
105 * KN02's Physical address space
106 */
107 #define KN02_PHYS_MIN 0x00000000 /* 512 Meg */
108 #define KN02_PHYS_MAX 0x1fffffff
109
110 /*
111 * Memory map
112 */
113 #define KN02_PHYS_MEMORY_START 0x00000000
114 #define KN02_PHYS_MEMORY_END 0x1dffffff /* 480 Meg in 15 slots */
115
116 /*
117 * I/O map
118 */
119 #define KN02_PHYS_TC_0_START 0x1e000000 /* TURBOchannel, slot 0 */
120 #define KN02_PHYS_TC_0_END 0x1e3fffff /* 4 Meg, option0 */
121
122 #define KN02_PHYS_TC_1_START 0x1e400000 /* TURBOchannel, slot 1 */
123 #define KN02_PHYS_TC_1_END 0x1e7fffff /* 4 Meg, option1 */
124
125 #define KN02_PHYS_TC_2_START 0x1e800000 /* TURBOchannel, slot 2 */
126 #define KN02_PHYS_TC_2_END 0x1ebfffff /* 4 Meg, option2 */
127
128 #define KN02_PHYS_TC_3_START 0x1ec00000 /* TURBOchannel, slot 3 */
129 #define KN02_PHYS_TC_3_END 0x1effffff /* 4 Meg, reserved*/
130
131 #define KN02_PHYS_TC_4_START 0x1f000000 /* TURBOchannel, slot 4 */
132 #define KN02_PHYS_TC_4_END 0x1f3fffff /* 4 Meg, reserved*/
133
134 #define KN02_PHYS_TC_5_START 0x1f400000 /* TURBOchannel, slot 5 */
135 #define KN02_PHYS_TC_5_END 0x1f7fffff /* 4 Meg, SCSI */
136
137 #define KN02_PHYS_TC_6_START 0x1f800000 /* TURBOchannel, slot 6 */
138 #define KN02_PHYS_TC_6_END 0x1fbfffff /* 4 Meg, ether */
139
140 #define KN02_PHYS_TC_7_START 0x1fc00000 /* TURBOchannel, slot 7 */
141 #define KN02_PHYS_TC_7_END 0x1fffffff /* 4 Meg, system devices */
142
143 #define KN02_PHYS_TC_START KN02_PHYS_TC_0_START
144 #define KN02_PHYS_TC_END KN02_PHYS_TC_7_END /* 32 Meg */
145
146 #define KN02_TC_NSLOTS 8
147 #define KN02_TC_MIN 0
148 #define KN02_TC_MAX 6 /* don't look at system slot */
149
150 /*
151 * System devices
152 */
153 #define KN02_SYS_ROM_START KN02_PHYS_TC_7_START+0x000000
154 #define KN02_SYS_ROM_END KN02_PHYS_TC_7_START+0x07ffff
155 #define KN02_SYS_RESERVED KN02_PHYS_TC_7_START+0x080000
156 #define KN02_SYS_CHKSYN KN02_PHYS_TC_7_START+0x100000
157 #define KN02_SYS_ERRADR KN02_PHYS_TC_7_START+0x180000
158 #define KN02_SYS_DZ KN02_PHYS_TC_7_START+0x200000
159 #define KN02_SYS_CLOCK KN02_PHYS_TC_7_START+0x280000
160 #define KN02_SYS_CSR KN02_PHYS_TC_7_START+0x300000
161 #define KN02_SYS_ROM1_START KN02_PHYS_TC_7_START+0x380000
162 #define KN02_SYS_ROM1_END KN02_PHYS_TC_7_START+0x3fffff
163
164 /*
165 * Interrupts
166 */
167 #define KN02_INT_FPA IP_LEV7 /* Floating Point coproc */
168 #define KN02_INT_RES1 IP_LEV6 /* reserved, unused */
169 #define KN02_INT_MEM IP_LEV5 /* memory controller */
170 #define KN02_INT_RES2 IP_LEV4 /* reserved, unused */
171 #define KN02_INT_CLOCK IP_LEV3 /* RTC chip */
172 #define KN02_INT_IO IP_LEV2 /* I/O slots */
173
174 /*
175 * System board registers
176 */
177 /* system Status and Control register */
178 #define KN02_CSR_IOINT 0x000000ff /* ro Interrupt pending */
179 # define KN02_IP_DZ 0x00000080 /* serial lines */
180 # define KN02_IP_LANCE 0x00000040 /* thin ethernet */
181 # define KN02_IP_SCSI 0x00000020 /* ASC scsi controller */
182 # define KN02_IP_XXXX 0x00000018 /* unused */
183 # define KN02_IP_SLOT2 0x00000004 /* option slot 2 */
184 # define KN02_IP_SLOT1 0x00000002 /* option slot 1 */
185 # define KN02_IP_SLOT0 0x00000001 /* option slot 0 */
186
187 #define KN02_CSR_BAUD38 0x00000100 /* rw Max DZ baud rate */
188 #define KN02_CSR_DIAGDN 0x00000200 /* rw Diag jumper */
189 #define KN02_CSR_BNK32M 0x00000400 /* rw Memory bank stride */
190 #define KN02_CSR_TXDIS 0x00000800 /* rw Disable DZ xmit */
191 #define KN02_CSR_LEDIAG 0x00001000 /* rw Latch ECC */
192 #define KN02_CSR_CORRECT 0x00002000 /* rw ECC corrects single bit */
193 #define KN02_CSR_ECCMD 0x0000c000 /* rw ECC logic mode */
194 #define KN02_CSR_IOINTEN 0x00ff0000 /* rw Interrupt enable */
195 #define KN02_CSR_IOINTEN_SHIFT 16
196 #define KN02_CSR_NRMMOD 0x01000000 /* ro Diag jumper state */
197 #define KN02_CSR_REFEVEN 0x02000000 /* ro Refreshing even mem bank */
198 #define KN02_CSR_PRSVNVR 0x04000000 /* ro Preserve NVR jumper */
199 #define KN02_CSR_PSWARN 0x08000000 /* ro PS overheating */
200 #define KN02_CSR_RRESERVED 0xf0000000 /* rz */
201
202 #define KN02_CSR_LEDS 0x000000ff /* wo Diag LEDs */
203 #define KN02_CSR_WRESERVED 0xff000000 /* wz */
204
205 /* Error address status register */
206 #define KN02_ERR_ADDRESS 0x07ffffff /* phys address */
207 #define KN02_ERR_RESERVED 0x08000000 /* unused */
208 #define KN02_ERR_ECCERR 0x10000000 /* ECC error */
209 #define KN02_ERR_WRITE 0x20000000 /* read/write transaction */
210 #define KN02_ERR_CPU 0x40000000 /* CPU or device initiator */
211 #define KN02_ERR_VALID 0x80000000 /* Info is valid */
212
213 /* ECC check/syndrome status register */
214 #define KN02_ECC_SYNLO 0x0000007f /* syndrome, even bank */
215 #define KN02_ECC_SNGLO 0x00000080 /* single bit err, " */
216 #define KN02_ECC_CHKLO 0x00007f00 /* check bits, " " */
217 #define KN02_ECC_VLDLO 0x00008000 /* info valid for " */
218 #define KN02_ECC_SYNHI 0x007f0000 /* syndrome, odd bank */
219 #define KN02_ECC_SNGHI 0x00800000 /* single bit err, " */
220 #define KN02_ECC_CHKHI 0x7f000000 /* check bits, " " */
221 #define KN02_ECC_VLDHI 0x80000000 /* info valid for " */
222
223 #endif /* MIPS_KN02_H */

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