/[gxemul]/trunk/src/include/dec_5100.h
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Contents of /trunk/src/include/dec_5100.h

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Revision 4 - (show annotations)
Mon Oct 8 16:18:00 2007 UTC (16 years, 6 months ago) by dpavlin
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File size: 7634 byte(s) 
++ trunk/HISTORY	(local)
$Id: HISTORY,v 1.707 2005/04/27 16:37:33 debug Exp $
20050408	Some minor updates to the wdc. Linux now doesn't complain
		anymore if a disk is non-present.
20050409	Various minor fixes (a bintrans bug, and some other things).
		The wdc seems to work with Playstation2 emulation, but there
		is a _long_ annoying delay when disks are detected.
		Fixing a really important bintrans bug (when devices and RAM
		are mixed within 4KB pages), which was triggered with
		NetBSD/playstation2 kernels.
20050410	Adding a dummy dev_ps2_ether (just so that NetBSD doesn't
		complain as much during bootup).
		Symbols starting with '$' are now ignored.
		Renaming dev_ps2_ohci.c to dev_ohci.c, etc.
20050411	Moving the bintrans-cache-isolation check from cpu_mips.c to
		cpu_mips_coproc.c. (I thought this would give a speedup, but
		it's not noticable.)
		Better playstation2 sbus interrupt code.
		Skip ahead many ticks if the count register is read manually.
		(This increases the speed of delay-loops that simply read
		the count register.)
20050412	Updates to the playstation2 timer/interrupt code.
		Some other minor updates.
20050413	NetBSD/cobalt runs from a disk image :-) including userland;
		updating the documentation on how to install NetBSD/cobalt
		using NetBSD/pmax (!).
		Some minor bintrans updates (no real speed improvement) and
		other minor updates (playstation2 now uses the -o options).
20050414	Adding a dummy x86 (and AMD64) mode.
20050415	Adding some (32-bit and 16-bit) x86 instructions.
		Adding some initial support for non-SCSI, non-IDE floppy
		images. (The x86 mode can boot from these, more or less.)
		Moving the devices/ and include/ directories to src/devices/
		and src/include/, respectively.
20050416	Continuing on the x86 stuff. (Adding pc_bios.c and some simple
		support for software interrupts in 16-bit mode.)
20050417	Ripping out most of the x86 instruction decoding stuff, trying
		to rewrite it in a cleaner way.
		Disabling some of the least working CPU families in the
		configure script (sparc, x86, alpha, hppa), so that they are
		not enabled by default.
20050418	Trying to fix the bug which caused problems when turning on
		and off bintrans interactively, by flushing the bintrans cache
		whenever bintrans is manually (re)enabled.
20050419	Adding the 'lswi' ppc instruction.
		Minor updates to the x86 instruction decoding.
20050420	Renaming x86 register name indices from R_xx to X86_R_xx (this
		makes building on Tru64 nicer).
20050422	Adding a check for duplicate MIPS TLB entries on tlbwr/tlbwi.
20050427	Adding screenshots to guestoses.html.
		Some minor fixes and testing for the next release.

==============  RELEASE 0.3.2  ==============
1 /* gxemul: $Id: dec_5100.h,v 1.3 2005/03/05 12:34:02 debug Exp $ */
2 #ifndef DEC_5100_H
3 #define DEC_5100_H
4
5 /* $NetBSD: kn230.h,v 1.2 1999/03/25 01:17:52 simonb Exp $ */
6
7 /*
8 * Copyright (c) 1997,1998 Jonathan Stone.
9 * All rights reserved.
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
13 * are met:
14 * 1. Redistributions of source code must retain the above copyright
15 * notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 * notice, this list of conditions and the following disclaimer in the
18 * documentation and/or other materials provided with the distribution.
19 * 3. All advertising materials mentioning features or use of this software
20 * must display the following acknowledgement:
21 * This product includes software developed by Jonathan Stone for
22 * the NetBSD Project.
23 * 4. The name of the author may not be used to endorse or promote products
24 * derived from this software without specific prior written permission.
25 *
26 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND
27 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
28 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
29 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE
30 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
31 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
32 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
33 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
34 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
35 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
36 * SUCH DAMAGE.
37 */
38
39
40 /*
41 * Physical addresses of baseboard devices and registers on the
42 * the DECstation 5100 motherboard (also known as the kn230).
43 *
44 * The only options on the kn230 are two slots for daughterboards.
45 * Each slot can contain an extra four-port dc708x DZ11 clone chip.
46 * Most baseborad chips are the same hardware and at the same
47 * address as the DECstation 3100 (kn01), except:
48 *
49 * The kn230 has more devices than the 3100, so instead
50 * of hardwiring each device to a CPU interrupt line,
51 * the kn230 provides an interrupt-request register (ICSR).
52 * Devices are mapped onto CPU interrupt lines as below:
53 * hardint 5: fpu
54 * hardint 4: reset switch
55 * hardint 3: memory error (write to nonexistent memory)
56 * hardint 2: clock
57 * hardint 1: sii, lance
58 * hardint 0: baseboard DZ, I/O option cards
59 *
60 * the ICSR only indicates which devices are requesting interrupts.
61 * there is no interrupt mask register.
62 *
63 * There is no framebuffer, pcc (cursor), colormap or vdac on a 5100.
64 */
65
66 #define KN230_SYS_LANCE 0x18000000 /* Lance chip */
67 #define KN230_SYS_LANCE_B_START 0x19000000 /* 64 Kb Lance Buffer */
68 #define KN230_SYS_LANCE_B_END 0x19010000
69
70 #define KN230_SYS_SII 0x1a000000 /* scsi SII chip */
71 #define KN230_SYS_SII_B_START 0x1b000000 /* 128 Kb SCSI buffer */
72 #define KN230_SYS_SII_B_END 0x1b020000
73
74 #define KN230_SYS_DZ0 0x1c000000 /* baseboard DZ serial chip */
75
76 #define KN230_SYS_CLOCK 0x1d000000 /* mc146818 rtc chip */
77
78 #define KN230_SYS_ICSR 0x1e000000 /* System control register */
79
80 /*
81 * Interrupt-request bitmasks in the low-order 16 bits of the CSR.
82 * If a bit is set, the corresponding device has an interrupt condition.
83 * There is no equivalent per-device interrupt masking register.
84 * (note: these were LED control bits in the kn01).
85 */
86 #define KN230_CSR_INTR_RESET 0x00004000 /* reset button */
87 #define KN230_CSR_INTR_WMERR 0x00002000 /* badaddr() or write error */
88 #define KN230_CSR_INTR_LANCE 0x00001000 /* lance interrupt */
89 #define KN230_CSR_INTR_SII 0x00000800 /* scsi interrupt */
90 #define KN230_CSR_INTR_OPT1 0x00000400 /* second option DZ */
91 #define KN230_CSR_INTR_OPT0 0x00000200 /* first option DZ */
92 #define KN230_CSR_INTR_DZ0 0x00000100 /* baseboard DZ */
93
94 /*
95 * kn230 LED control register.
96 * Writing a 1 bit to any bit turns off the corresponding LED.
97 * low bits are or'ed to control registers which have side effects.
98 *
99 * This is sort of like the 3100 CSR only at a different address, and
100 * with the same external-logic hack as the 5000/200 to enable 38.4
101 * baud mode on the baseboard DZ chip.
102 */
103 #define KN230_SYS_CTL_LED 0x14000000 /* LED register */
104 #define KN230_LED7 0x00008000 /* no side effect */
105 #define KN230_LED6 0x00004000 /* no side effect */
106 #define KN230_LED5 0x00002000 /* no side effect */
107 #define KN230_LED4 0x00001000 /* no side effect */
108
109 #define KN230_LED3 0x00000800 /* Turns off led 3.
110 * Also disables main memory.
111 * enables writes to EEPROM.
112 */
113
114 #define KN230_LED2 0x00000400 /* Turns off led 2.
115 * 0: forces DZ to run at
116 * 38.4 when 19.2 is selected
117 * 1: is 19.2 means 19.2.
118 */
119
120 #define KN230_LED1 0x00000200 /* read-only
121 * 0: 8M memory in bank 1
122 * 1: 32M in bank1
123 */
124 #define KN230_LED0 0x00000100
125
126 /*
127 * Option slot addresses.
128 * dc7084 registers appear here, if present.
129 */
130 #define KN230_SYS_DZ1 0x15000000 /* DZ1 Control and status */
131 #define KN230_SYS_DZ2 0x15200000 /* DZ2 Control and status */
132
133 /*
134 * Write error address.
135 * Same address as the KN01_SYS_MERR, but with a presence bit for a
136 * PrestoServe option and a secure console-mode the low-order bits.
137 */
138 #define KN230_SYS_WEAR 0x17000000 /* Write-error address reg */
139 #define KN230_WEAR_OPTIONMASK 0x00000001 /* 1 if no card present */
140 #define KN230_WEAR_OPTION_FALSE KN230_WEAR_OPTIONMASK
141 #define KN230_WEAR_OPTION_TRUE 0
142
143 #define KN230_WEAR_SECUREMASK 0x00000002 /* "1": system is insecure */
144 #define KN230_WEAR_INSECURE KN230_WEAR_SECUREMASK
145 #define KN230_WEAR_SECURE 0
146
147 /*
148 * various leftover stuff....
149 */
150
151 /*
152 * Option ID register. Indicates whether options are present.
153 */
154 #define KN230_SYS_OID 0x1f00020c /* option slot ID register */
155 #define KN230_OID_MASK 0x000000ff /* ID number mask */
156 #define KN230_ERRCNT_MASK 0x0000ff00 /* hardware failure count */
157
158
159 #define KN230_SYS_PASSWD 0x1f000244 /* password location */
160
161 /*
162 * NVRAM state defintions.
163 * Used under Ultrix for PrestoServe.
164 */
165 #define KN230_SYS_NVRAM_DIAG 0x1f000300 /* NVRAM diagnostic register */
166 #define KN230_NVRAM_PRESENT 0x00000001
167 #define KN230_NVRAM_TESTFAIL_RO 0x00000002
168 #define KN230_NVRAM_TESTFAIL_RW 0x00000004
169 #define KN230_NVRAM_FAILURE 0x00000008 /* ran out of power anyway? */
170 #define KN230_NVRAM_SIZEMASK 0x000000f0
171
172 #define KN230_SYS_NVRAM_ADDR 0x1f000304 /* holds addr of NVRAM bank */
173 /*
174 * NVRAM has separete control and status registers for each of
175 * the two motherboard SIMM banks (even and odd),
176 * located at offsets from the value at value at SYS_NVRAM_ADDR.
177 */
178 # define KN230_SYS_NVRAM_EVENBNK_STATUS_OFFSET (0x200000)
179 # define KN230_SYS_NVRAM_ODDBNK_STATUS_OFFSET (0x200000 +4)
180 # define KN230_SYS_NVRAM_EVENBNK_CONTROL_OFFSET (-0x200000)
181 # define KN230_SYS_NVRAM_ODDNK_STATUS_OFFSET (-0x200000+4)
182
183 /* flags in nvram per-bank status register */
184 #define KN230_NVRAM_BATFAIL 0x00000001 /* battery failure */
185 #define KN230_NVRAM_BATKILL 0x00000002 /* battery kill */
186 /*
187 * To enable the battery, write 0x00 to each nvram control reg.
188 * To disable the battery, write the sequence
189 * 0x01, 0x01, 0x00, 0x00, 0x01
190 * to both per-bank control registers (do banks in parallel, not in sequence).
191 */
192
193 #endif /* DEC_5100_H */
194
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