/[gxemul]/trunk/src/include/cpu_x86.h
This is repository of my old source code which isn't updated any more. Go to git.rot13.org for current projects!
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revision 18 by dpavlin, Mon Oct 8 16:19:11 2007 UTC revision 26 by dpavlin, Mon Oct 8 16:20:10 2007 UTC
# Line 2  Line 2 
2  #define CPU_X86_H  #define CPU_X86_H
3    
4  /*  /*
5   *  Copyright (C) 2005  Anders Gavare.  All rights reserved.   *  Copyright (C) 2005-2006  Anders Gavare.  All rights reserved.
6   *   *
7   *  Redistribution and use in source and binary forms, with or without   *  Redistribution and use in source and binary forms, with or without
8   *  modification, are permitted provided that the following conditions are met:   *  modification, are permitted provided that the following conditions are met:
# Line 28  Line 28 
28   *  SUCH DAMAGE.   *  SUCH DAMAGE.
29   *   *
30   *   *
31   *  $Id: cpu_x86.h,v 1.35 2005/10/27 14:01:15 debug Exp $   *  $Id: cpu_x86.h,v 1.48 2006/06/24 21:47:24 debug Exp $
32     *
33     *  x86 (including AMD64) cpu dependent stuff.
34   */   */
35    
36  #include "misc.h"  #include "misc.h"
# Line 101  struct x86_model { Line 103  struct x86_model {
103  #define X86_PC_TO_IC_ENTRY(a)           ((a) & (X86_IC_ENTRIES_PER_PAGE-1))  #define X86_PC_TO_IC_ENTRY(a)           ((a) & (X86_IC_ENTRIES_PER_PAGE-1))
104  #define X86_ADDR_TO_PAGENR(a)           ((a) >> X86_IC_ENTRIES_SHIFT)  #define X86_ADDR_TO_PAGENR(a)           ((a) >> X86_IC_ENTRIES_SHIFT)
105    
106  struct x86_instr_call {  #define X86_L2N                 17
107          void    (*f)(struct cpu *, struct x86_instr_call *);  #define X86_L3N                 18
         size_t  arg[X86_N_IC_ARGS];  
 };  
   
 /*  Translation cache struct for each physical page:  */  
 struct x86_tc_physpage {  
         struct x86_instr_call ics[X86_IC_ENTRIES_PER_PAGE + 1];  
         uint32_t        next_ofs;       /*  or 0 for end of chain  */  
         int             flags;  
         uint64_t        physaddr;  
 };  
108    
109  #define X86_N_VPH_ENTRIES               1048576  DYNTRANS_MISC_DECLARATIONS(x86,X86,uint64_t)
110    DYNTRANS_MISC64_DECLARATIONS(x86,X86,uint8_t)
111    
112  #define X86_MAX_VPH_TLB_ENTRIES         256  #define X86_MAX_VPH_TLB_ENTRIES         128
 struct x86_vpg_tlb_entry {  
         int             valid;  
         int             writeflag;  
         int64_t         timestamp;  
         unsigned char   *host_page;  
         uint64_t        vaddr_page;  
         uint64_t        paddr_page;  
 };  
113    
114  struct descriptor_cache {  struct descriptor_cache {
115          int             valid;          int             valid;
# Line 180  struct x86_cpu { Line 165  struct x86_cpu {
165    
166    
167          /*          /*
168           *  Instruction translation cache:           *  Instruction translation cache and Virtual->Physical->Host
169             *  address translation:
170           */           */
171            DYNTRANS_ITC(x86)
172          /*  cur_ic_page is a pointer to an array of X86_IC_ENTRIES_PER_PAGE          VPH_TLBS(x86,X86)
173              instruction call entries. next_ic points to the next such          VPH32(x86,X86,uint64_t,uint8_t)
174              call to be executed.  */          VPH64(x86,X86,uint8_t)
         struct x86_tc_physpage  *cur_physpage;  
         struct x86_instr_call   *cur_ic_page;  
         struct x86_instr_call   *next_ic;  
   
   
         /*  
          *  Virtual -> physical -> host address translation:  
          *  
          *  host_load and host_store point to arrays of X86_N_VPH_ENTRIES  
          *  pointers (to host pages); phys_addr points to an array of  
          *  X86_N_VPH_ENTRIES uint32_t.  
          */  
   
         struct x86_vpg_tlb_entry        vph_tlb_entry[X86_MAX_VPH_TLB_ENTRIES];  
         unsigned char                   *host_load[X86_N_VPH_ENTRIES];  
         unsigned char                   *host_store[X86_N_VPH_ENTRIES];  
         uint32_t                        phys_addr[X86_N_VPH_ENTRIES];  
         struct x86_tc_physpage          *phys_page[X86_N_VPH_ENTRIES];  
   
         uint32_t                        phystranslation[X86_N_VPH_ENTRIES/32];  
175  };  };
176    
177    
# Line 320  struct x86_cpu { Line 286  struct x86_cpu {
286  #define DESCR_TYPE_DATA         2  #define DESCR_TYPE_DATA         2
287    
288    
289    #define LONG_MODE               (cpu->cd.x86.efer & X86_EFER_LME)
290  #define PROTECTED_MODE          (cpu->cd.x86.cr[0] & X86_CR0_PE)  #define PROTECTED_MODE          (cpu->cd.x86.cr[0] & X86_CR0_PE)
291  #define REAL_MODE               (!PROTECTED_MODE)  #define REAL_MODE               (!PROTECTED_MODE)
292    
293    
294  /*  cpu_x86.c:  */  /*  cpu_x86.c:  */
295  void reload_segment_descriptor(struct cpu *cpu, int segnr, int selector,  void reload_segment_descriptor(struct cpu *cpu, int segnr, int selector,
296          uint64_t *curpcp);          uint64_t *curpcp);
297  int x86_interrupt(struct cpu *cpu, int nr, int errcode);  int x86_interrupt(struct cpu *cpu, int nr, int errcode);
298  int x86_memory_rw(struct cpu *cpu, struct memory *mem, uint64_t vaddr,  int x86_memory_rw(struct cpu *cpu, struct memory *mem, uint64_t vaddr,
299          unsigned char *data, size_t len, int writeflag, int cache_flags);          unsigned char *data, size_t len, int writeflag, int cache_flags);
300    void x86_update_translation_table(struct cpu *cpu, uint64_t vaddr_page,
301            unsigned char *host_page, int writeflag, uint64_t paddr_page);
302    void x8632_update_translation_table(struct cpu *cpu, uint64_t vaddr_page,
303            unsigned char *host_page, int writeflag, uint64_t paddr_page);
304    void x86_invalidate_translation_caches(struct cpu *cpu, uint64_t, int);
305    void x8632_invalidate_translation_caches(struct cpu *cpu, uint64_t, int);
306    void x86_invalidate_code_translation(struct cpu *cpu, uint64_t, int);
307    void x8632_invalidate_code_translation(struct cpu *cpu, uint64_t, int);
308    void x86_init_64bit_dummy_tables(struct cpu *cpu);
309  int x86_cpu_family_init(struct cpu_family *);  int x86_cpu_family_init(struct cpu_family *);
310    
311    
312  /*  memory_x86.c:  */  /*  memory_x86.c:  */
313  int x86_translate_address(struct cpu *cpu, uint64_t vaddr,  int x86_translate_v2p(struct cpu *cpu, uint64_t vaddr,
314          uint64_t *return_addr, int flags);          uint64_t *return_addr, int flags);
315    
316  #endif  /*  CPU_X86_H  */  #endif  /*  CPU_X86_H  */
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