--- trunk/src/include/cpu_x86.h	2007/10/08 16:18:51	14
+++ trunk/src/include/cpu_x86.h	2007/10/08 16:19:37	22
@@ -2,7 +2,7 @@
 #define	CPU_X86_H
 
 /*
- *  Copyright (C) 2005  Anders Gavare.  All rights reserved.
+ *  Copyright (C) 2005-2006  Anders Gavare.  All rights reserved.
  *
  *  Redistribution and use in source and binary forms, with or without
  *  modification, are permitted provided that the following conditions are met:
@@ -28,7 +28,9 @@
  *  SUCH DAMAGE.
  *
  *
- *  $Id: cpu_x86.h,v 1.33 2005/08/25 17:32:21 debug Exp $
+ *  $Id: cpu_x86.h,v 1.43 2006/02/13 04:23:25 debug Exp $
+ *
+ *  x86 (including AMD64) cpu dependent stuff.
  */
 
 #include "misc.h"
@@ -101,30 +103,9 @@
 #define	X86_PC_TO_IC_ENTRY(a)		((a) & (X86_IC_ENTRIES_PER_PAGE-1))
 #define	X86_ADDR_TO_PAGENR(a)		((a) >> X86_IC_ENTRIES_SHIFT)
 
-struct x86_instr_call {
-	void	(*f)(struct cpu *, struct x86_instr_call *);
-	size_t	arg[X86_N_IC_ARGS];
-};
-
-/*  Translation cache struct for each physical page:  */
-struct x86_tc_physpage {
-	uint32_t	next_ofs;	/*  or 0 for end of chain  */
-	uint64_t	physaddr;
-	int		flags;
-	struct x86_instr_call ics[X86_IC_ENTRIES_PER_PAGE + 1];
-};
+DYNTRANS_MISC_DECLARATIONS(x86,X86,uint64_t)
 
-#define	X86_N_VPH_ENTRIES		1048576
-
-#define	X86_MAX_VPH_TLB_ENTRIES		256
-struct x86_vpg_tlb_entry {
-	int		valid;
-	int		writeflag;
-	int64_t		timestamp;
-	unsigned char	*host_page;
-	uint64_t	vaddr_page;
-	uint64_t	paddr_page;
-};
+#define	X86_MAX_VPH_TLB_ENTRIES		128
 
 struct descriptor_cache {
 	int		valid;
@@ -180,30 +161,13 @@
 
 
 	/*
-	 *  Instruction translation cache:
+	 *  Instruction translation cache and Virtual->Physical->Host
+	 *  address translation:
 	 */
-
-	/*  cur_ic_page is a pointer to an array of X86_IC_ENTRIES_PER_PAGE
-	    instruction call entries. next_ic points to the next such
-	    call to be executed.  */
-	struct x86_tc_physpage  *cur_physpage;
-	struct x86_instr_call   *cur_ic_page;
-	struct x86_instr_call   *next_ic;
-
-
-	/*
-	 *  Virtual -> physical -> host address translation:
-	 *
-	 *  host_load and host_store point to arrays of X86_N_VPH_ENTRIES
-	 *  pointers (to host pages); phys_addr points to an array of
-	 *  X86_N_VPH_ENTRIES uint32_t.
-	 */
-
-	struct x86_vpg_tlb_entry        vph_tlb_entry[X86_MAX_VPH_TLB_ENTRIES];
-	unsigned char                   *host_load[X86_N_VPH_ENTRIES];
-	unsigned char                   *host_store[X86_N_VPH_ENTRIES];
-	uint32_t                        phys_addr[X86_N_VPH_ENTRIES];
-	struct x86_tc_physpage          *phys_page[X86_N_VPH_ENTRIES];
+	DYNTRANS_ITC(x86)
+	VPH_TLBS(x86,X86)
+	VPH32(x86,X86,uint64_t,uint8_t)
+	VPH64(x86,X86,uint8_t)
 };
 
 
@@ -327,8 +291,17 @@
 int x86_interrupt(struct cpu *cpu, int nr, int errcode);
 int x86_memory_rw(struct cpu *cpu, struct memory *mem, uint64_t vaddr,
 	unsigned char *data, size_t len, int writeflag, int cache_flags);
+void x86_update_translation_table(struct cpu *cpu, uint64_t vaddr_page,
+        unsigned char *host_page, int writeflag, uint64_t paddr_page);
+void x8632_update_translation_table(struct cpu *cpu, uint64_t vaddr_page,
+        unsigned char *host_page, int writeflag, uint64_t paddr_page);
+void x86_invalidate_translation_caches(struct cpu *cpu, uint64_t, int);
+void x8632_invalidate_translation_caches(struct cpu *cpu, uint64_t, int);
+void x86_invalidate_code_translation(struct cpu *cpu, uint64_t, int);
+void x8632_invalidate_code_translation(struct cpu *cpu, uint64_t, int);
 int x86_cpu_family_init(struct cpu_family *);
 
+
 /*  memory_x86.c:  */
 int x86_translate_address(struct cpu *cpu, uint64_t vaddr,
 	uint64_t *return_addr, int flags);