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dpavlin |
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#ifndef CPU_TRANSPUTER_H |
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#define CPU_TRANSPUTER_H |
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/* |
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* Copyright (C) 2006 Anders Gavare. All rights reserved. |
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* |
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* Redistribution and use in source and binary forms, with or without |
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* modification, are permitted provided that the following conditions are met: |
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* |
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* 1. Redistributions of source code must retain the above copyright |
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* notice, this list of conditions and the following disclaimer. |
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* 2. Redistributions in binary form must reproduce the above copyright |
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* notice, this list of conditions and the following disclaimer in the |
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* documentation and/or other materials provided with the distribution. |
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* 3. The name of the author may not be used to endorse or promote products |
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* derived from this software without specific prior written permission. |
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* |
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND |
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE |
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS |
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) |
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY |
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF |
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* SUCH DAMAGE. |
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* |
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* |
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* $Id: cpu_transputer.h,v 1.1 2006/07/20 21:53:00 debug Exp $ |
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*/ |
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#include "misc.h" |
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struct cpu_family; |
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/* TRANSPUTER CPU types: */ |
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struct transputer_cpu_type_def { |
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char *name; |
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int bits; /* 16 or 32 */ |
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int onchip_ram; /* 2048 or 4096 bytes */ |
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int features; |
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}; |
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/* |
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* Features of various transputer processors according to |
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* http://www.enlight.ru/docs/cpu/t-puters/talp/app_g.txt: |
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*/ |
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#define T_T4_FP 1 /* T4 floating point */ |
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#define T_T8_FP 2 /* T8 floating point */ |
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#define T_2D_BLOCK 4 /* 2D Block Move instruction */ |
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#define T_FMUL 8 /* FMUL instruction */ |
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#define T_DUP 16 /* DUP instruction */ |
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#define T_WSUBDB 32 /* WSUBDB instruction */ |
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#define T_CRC 64 /* CRC instruction */ |
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#define T_BITCOUNT 128 /* BITCOUNT instruction */ |
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#define T_FPTESTERR 256 /* FPTESTERR instruction */ |
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#define T_DEBUG 512 /* Debug capabilities */ |
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#define TRANSPUTER_CPU_TYPE_DEFS { \ |
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{ "T212", 16, 2048, 0 }, \ |
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{ "T222", 16, 4096, 0 }, \ |
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{ "T225", 16, 4096, T_DUP | T_WSUBDB | T_CRC | T_BITCOUNT | \ |
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T_DEBUG }, \ |
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{ "T414", 32, 2048, T_FMUL | T_T4_FP }, \ |
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{ "T425", 32, 4096, T_T4_FP | T_2D_BLOCK | T_FMUL | T_WSUBDB | \ |
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T_DUP | T_CRC | T_BITCOUNT | T_FPTESTERR | \ |
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T_DEBUG }, \ |
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{ "T800", 32, 4096, T_T8_FP | T_2D_BLOCK | T_FMUL | T_WSUBDB | \ |
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T_DUP | T_CRC | T_BITCOUNT | T_FPTESTERR }, \ |
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{ "T801", 32, 4096, T_T8_FP | T_2D_BLOCK | T_FMUL | T_WSUBDB | \ |
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T_DUP | T_CRC | T_BITCOUNT | T_FPTESTERR }, \ |
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{ "T805", 32, 4096, T_T8_FP | T_2D_BLOCK | T_FMUL | T_WSUBDB | \ |
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T_DUP | T_CRC | T_BITCOUNT | T_FPTESTERR | \ |
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T_DEBUG }, \ |
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{ NULL, 0, 0, 0 } } |
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#define TRANSPUTER_INSTRUCTIONS { \ |
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/* 0X */ "j", /* jump */ \ |
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/* 1X */ "ldlp", /* load local pointer */ \ |
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/* 2X */ "pfix", /* prefix */ \ |
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/* 3X */ "ldnl", /* load non-local */ \ |
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/* 4X */ "ldc", /* load constant */ \ |
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/* 5X */ "ldnlp", /* load non-local pointer */ \ |
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/* 6X */ "nfix", /* negative prefix */ \ |
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/* 7X */ "ldl", /* load local */ \ |
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/* 8X */ "adc", /* add constant */ \ |
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/* 9X */ "call", /* call subroutine */ \ |
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/* AX */ "cj", /* conditional jump */ \ |
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/* BX */ "ajw", /* adjust workspace */ \ |
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/* CX */ "eqc", /* equals constant */ \ |
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/* DX */ "stl", /* store local */ \ |
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/* EX */ "stnl", /* store non-local */ \ |
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/* FX */ "opr" /* operate */ } |
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#define TRANSPUTER_N_IC_ARGS 1 |
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#define TRANSPUTER_INSTR_ALIGNMENT_SHIFT 0 |
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#define TRANSPUTER_IC_ENTRIES_SHIFT 12 |
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#define TRANSPUTER_IC_ENTRIES_PER_PAGE (1 << TRANSPUTER_IC_ENTRIES_SHIFT) |
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#define TRANSPUTER_PC_TO_IC_ENTRY(a) (((a)>>TRANSPUTER_INSTR_ALIGNMENT_SHIFT) \ |
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& (TRANSPUTER_IC_ENTRIES_PER_PAGE-1)) |
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#define TRANSPUTER_ADDR_TO_PAGENR(a) ((a) >> (TRANSPUTER_IC_ENTRIES_SHIFT \ |
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+ TRANSPUTER_INSTR_ALIGNMENT_SHIFT)) |
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DYNTRANS_MISC_DECLARATIONS(transputer,TRANSPUTER,uint32_t) |
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#define TRANSPUTER_MAX_VPH_TLB_ENTRIES 128 |
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struct transputer_cpu { |
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struct transputer_cpu_type_def cpu_type; |
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uint32_t a, b, c; /* GPRs */ |
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uint32_t wptr; /* Workspace/stack pointer */ |
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uint32_t oreg; /* Operand register */ |
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uint64_t fa, fb, fc; /* Floating point registers */ |
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int error; |
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int halt_on_error; |
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int fp_error; |
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/* |
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* Instruction translation cache and 32-bit virtual -> physical -> |
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* host address translation: |
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*/ |
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DYNTRANS_ITC(transputer) |
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VPH_TLBS(transputer,TRANSPUTER) |
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VPH32(transputer,TRANSPUTER,uint32_t,uint8_t) |
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}; |
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/* cpu_transputer.c: */ |
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int transputer_run_instr(struct cpu *cpu); |
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void transputer_update_translation_table(struct cpu *cpu, uint64_t vaddr_page, |
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unsigned char *host_page, int writeflag, uint64_t paddr_page); |
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void transputer_invalidate_translation_caches(struct cpu *cpu, uint64_t, int); |
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void transputer_invalidate_code_translation(struct cpu *cpu, uint64_t, int); |
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int transputer_memory_rw(struct cpu *cpu, struct memory *mem, uint64_t vaddr, |
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unsigned char *data, size_t len, int writeflag, int cache_flags); |
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int transputer_cpu_family_init(struct cpu_family *); |
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#endif /* CPU_TRANSPUTER_H */ |