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#define CPU_SPARC_H |
#define CPU_SPARC_H |
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/* |
/* |
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* Copyright (C) 2005 Anders Gavare. All rights reserved. |
* Copyright (C) 2005-2006 Anders Gavare. All rights reserved. |
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* |
* |
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* Redistribution and use in source and binary forms, with or without |
* Redistribution and use in source and binary forms, with or without |
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* modification, are permitted provided that the following conditions are met: |
* modification, are permitted provided that the following conditions are met: |
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* SUCH DAMAGE. |
* SUCH DAMAGE. |
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* |
* |
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* |
* |
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* $Id: cpu_sparc.h,v 1.9 2005/08/28 20:16:24 debug Exp $ |
* $Id: cpu_sparc.h,v 1.23 2006/02/13 04:23:25 debug Exp $ |
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*/ |
*/ |
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#include "misc.h" |
#include "misc.h" |
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struct cpu_family; |
struct cpu_family; |
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/* SPARC CPU types: */ |
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struct sparc_cpu_type_def { |
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char *name; |
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int bits; |
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int icache_shift; |
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int ilinesize; |
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int iway; |
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int dcache_shift; |
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int dlinesize; |
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int dway; |
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int l2cache_shift; |
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int l2linesize; |
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int l2way; |
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}; |
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#define SPARC_CPU_TYPE_DEFS { \ |
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{ "SPARCv7", 32, 14,5,4, 14,5,4, 0,0,0 }, \ |
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{ "SPARCv9", 64, 14,5,4, 14,5,4, 0,0,0 }, \ |
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{ NULL, 0, 0,0,0, 0,0,0, 0,0,0 } \ |
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} |
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#define SPARC_N_IC_ARGS 3 |
#define SPARC_N_IC_ARGS 3 |
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#define SPARC_INSTR_ALIGNMENT_SHIFT 2 |
#define SPARC_INSTR_ALIGNMENT_SHIFT 2 |
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#define SPARC_IC_ENTRIES_SHIFT 10 |
#define SPARC_IC_ENTRIES_SHIFT 10 |
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#define SPARC_ADDR_TO_PAGENR(a) ((a) >> (SPARC_IC_ENTRIES_SHIFT \ |
#define SPARC_ADDR_TO_PAGENR(a) ((a) >> (SPARC_IC_ENTRIES_SHIFT \ |
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+ SPARC_INSTR_ALIGNMENT_SHIFT)) |
+ SPARC_INSTR_ALIGNMENT_SHIFT)) |
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struct sparc_instr_call { |
DYNTRANS_MISC_DECLARATIONS(sparc,SPARC,uint64_t) |
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void (*f)(struct cpu *, struct sparc_instr_call *); |
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size_t arg[SPARC_N_IC_ARGS]; |
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}; |
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/* Translation cache struct for each physical page: */ |
#define SPARC_MAX_VPH_TLB_ENTRIES 128 |
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struct sparc_tc_physpage { |
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uint32_t next_ofs; /* or 0 for end of chain */ |
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uint64_t physaddr; |
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int flags; |
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struct sparc_instr_call ics[SPARC_IC_ENTRIES_PER_PAGE + 1]; |
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}; |
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#define SPARC_N_VPH_ENTRIES 1048576 |
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#define SPARC_MAX_VPH_TLB_ENTRIES 256 |
#define N_SPARC_REG 32 |
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struct sparc_vpg_tlb_entry { |
#define SPARC_REG_NAMES { \ |
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int valid; |
"g0","g1","g2","g3","g4","g5","g6","g7", \ |
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int writeflag; |
"o0","o1","o2","o3","o4","o5","sp","o7", \ |
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int64_t timestamp; |
"l0","l1","l2","l3","l4","l5","l6","l7", \ |
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unsigned char *host_page; |
"i0","i1","i2","i3","i4","i5","fp","i7" } |
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uint64_t vaddr_page; |
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uint64_t paddr_page; |
#define N_SPARC_BRANCH_TYPES 16 |
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}; |
#define SPARC_BRANCH_NAMES { \ |
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"bn", "be", "ble", "bl", "bleu", "bcs", "bneg", "bvs", \ |
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"b", "bne", "bg", "bge", "bgu", "bcc", "bpos", "bvc" } |
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#define N_SPARC_REGBRANCH_TYPES 8 |
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#define SPARC_REGBRANCH_NAMES { \ |
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"br?","brz","brlez","brlz","br??","brnz", "brgz", "brgez" } |
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#define N_ALU_INSTR_TYPES 64 |
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#define SPARC_ALU_NAMES { \ |
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"add", "and", "or", "xor", "sub", "andn", "orn", "xnor", \ |
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"addx", "[9]", "umul", "smul", "subx", "[13]", "udiv", "sdiv", \ |
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"addcc","andcc","orcc","xorcc","subcc","andncc","orncc","xnorcc",\ |
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"addxcc","[25]","umulcc","smulcc","subxcc","[29]","udivcc","sdivcc",\ |
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"taddcc","tsubcc","taddcctv","tsubcctv","mulscc","sll","srl","sra",\ |
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"[40]","[41]","[42]","[43]", "[44]","[45]","[46]","movre", \ |
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"[48]","[49]","[50]","[51]", "[52]","[53]","[54]","[55]", \ |
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"jmpl", "rett", "trap", "flush", "save", "restore", "[62]","[63]" } |
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#define N_LOADSTORE_TYPES 64 |
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#define SPARC_LOADSTORE_NAMES { \ |
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"ld","ldub","lduh","ldd", "st","stb","sth","std", \ |
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"[8]","ldsb","ldsh","ldx", "[12]","ldstub","stx","swap", \ |
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"lda","lduba","lduha","ldda", "sta","stba","stha","stda", \ |
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"[24]","ldsba","ldsha","ldxa", "[28]","ldstuba","stxa","swapa", \ |
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"ldf","ldfsr","[34]","lddf", "stf","stfsr","stdfq","stdf", \ |
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"[40]","[41]","[42]","[43]", "[44]","[45]","[46]","[47]", \ |
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"ldc","ldcsr","[50]","lddc", "stc","stcsr","scdfq","scdf", \ |
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"[56]","[57]","[58]","[59]", "[60]","[61]","casxa","[63]" } |
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struct sparc_cpu { |
struct sparc_cpu { |
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/* TODO */ |
struct sparc_cpu_type_def cpu_type; |
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uint64_t r_i[8]; |
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uint64_t r[N_SPARC_REG]; |
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/* |
uint64_t zero; /* for dyntrans; ALWAYS zero */ |
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* Instruction translation cache: |
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*/ |
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/* cur_ic_page is a pointer to an array of SPARC_IC_ENTRIES_PER_PAGE |
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instruction call entries. next_ic points to the next such |
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call to be executed. */ |
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struct sparc_tc_physpage *cur_physpage; |
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struct sparc_instr_call *cur_ic_page; |
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struct sparc_instr_call *next_ic; |
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/* |
/* |
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* Virtual -> physical -> host address translation: |
* Instruction translation cache and Virtual->Physical->Host |
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* |
* address translation: |
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* host_load and host_store point to arrays of SPARC_N_VPH_ENTRIES |
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* pointers (to host pages); phys_addr points to an array of |
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* SPARC_N_VPH_ENTRIES uint32_t. |
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*/ |
*/ |
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DYNTRANS_ITC(sparc) |
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struct sparc_vpg_tlb_entry vph_tlb_entry[SPARC_MAX_VPH_TLB_ENTRIES]; |
VPH_TLBS(sparc,SPARC) |
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unsigned char *host_load[SPARC_N_VPH_ENTRIES]; |
VPH32(sparc,SPARC,uint64_t,uint8_t) |
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unsigned char *host_store[SPARC_N_VPH_ENTRIES]; |
VPH64(sparc,SPARC,uint8_t) |
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uint32_t phys_addr[SPARC_N_VPH_ENTRIES]; |
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struct sparc_tc_physpage *phys_page[SPARC_N_VPH_ENTRIES]; |
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}; |
}; |
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/* cpu_sparc.c: */ |
/* cpu_sparc.c: */ |
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void sparc_update_translation_table(struct cpu *cpu, uint64_t vaddr_page, |
void sparc_update_translation_table(struct cpu *cpu, uint64_t vaddr_page, |
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unsigned char *host_page, int writeflag, uint64_t paddr_page); |
unsigned char *host_page, int writeflag, uint64_t paddr_page); |
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void sparc_invalidate_translation_caches_paddr(struct cpu *cpu, uint64_t, int); |
void sparc_invalidate_translation_caches(struct cpu *cpu, uint64_t, int); |
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void sparc_invalidate_code_translation(struct cpu *cpu, uint64_t, int); |
void sparc_invalidate_code_translation(struct cpu *cpu, uint64_t, int); |
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void sparc32_update_translation_table(struct cpu *cpu, uint64_t vaddr_page, |
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unsigned char *host_page, int writeflag, uint64_t paddr_page); |
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void sparc32_invalidate_translation_caches(struct cpu *cpu, uint64_t, int); |
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void sparc32_invalidate_code_translation(struct cpu *cpu, uint64_t, int); |
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int sparc_memory_rw(struct cpu *cpu, struct memory *mem, uint64_t vaddr, |
int sparc_memory_rw(struct cpu *cpu, struct memory *mem, uint64_t vaddr, |
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unsigned char *data, size_t len, int writeflag, int cache_flags); |
unsigned char *data, size_t len, int writeflag, int cache_flags); |
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int sparc_cpu_family_init(struct cpu_family *); |
int sparc_cpu_family_init(struct cpu_family *); |