/[gxemul]/trunk/src/include/cpu_sh.h
This is repository of my old source code which isn't updated any more. Go to git.rot13.org for current projects!
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revision 42 by dpavlin, Mon Oct 8 16:22:32 2007 UTC revision 44 by dpavlin, Mon Oct 8 16:22:56 2007 UTC
# Line 28  Line 28 
28   *  SUCH DAMAGE.   *  SUCH DAMAGE.
29   *   *
30   *   *
31   *  $Id: cpu_sh.h,v 1.46 2007/06/07 15:36:25 debug Exp $   *  $Id: cpu_sh.h,v 1.50 2007/07/20 09:03:33 debug Exp $
32   *   *
33   *  Note: Many things here are SH4-specific, so it probably doesn't work   *  Note 1: Many things here are SH4-specific, so it probably doesn't work
34   *        for SH3 emulation.   *          for SH3 emulation.
35     *
36     *  Note 2: The SuperH emulation in GXemul does not include SH5/SH64 at
37     *          this time. There doesn't seem to be that much interesting code
38     *          to run in the emulator for SH5. :-/
39   */   */
40    
41  #include "interrupt.h"  #include "interrupt.h"
# Line 40  Line 44 
44    
45    
46  struct cpu_family;  struct cpu_family;
 struct timer;  
47    
48    
49  /*  SH CPU types:  */  /*  SH CPU types:  */
# Line 61  struct sh_cpu_type_def { Line 64  struct sh_cpu_type_def {
64          { NULL,       0, 0, 0,              0                    }  }          { NULL,       0, 0, 0,              0                    }  }
65    
66    
67  /*  #define SH_N_IC_ARGS                    2
68   *  TODO: Figure out how to nicely support multiple instruction encodings!  #define SH_INSTR_ALIGNMENT_SHIFT        1
69   *  For now, I'm reverting this to SH4. SH5 will have to wait until later.  #define SH_IC_ENTRIES_SHIFT             11
  */  
   
 #define SH_N_IC_ARGS                    2       /*  3 for SH5/SH64  */  
 #define SH_INSTR_ALIGNMENT_SHIFT        1       /*  2 for SH5/SH64  */  
 #define SH_IC_ENTRIES_SHIFT             11      /*  10 for SH5/SH64  */  
70  #define SH_IC_ENTRIES_PER_PAGE          (1 << SH_IC_ENTRIES_SHIFT)  #define SH_IC_ENTRIES_PER_PAGE          (1 << SH_IC_ENTRIES_SHIFT)
71  #define SH_PC_TO_IC_ENTRY(a)            (((a)>>SH_INSTR_ALIGNMENT_SHIFT) \  #define SH_PC_TO_IC_ENTRY(a)            (((a)>>SH_INSTR_ALIGNMENT_SHIFT) \
72                                          & (SH_IC_ENTRIES_PER_PAGE-1))                                          & (SH_IC_ENTRIES_PER_PAGE-1))
# Line 87  DYNTRANS_MISC_DECLARATIONS(sh,SH,uint32_ Line 85  DYNTRANS_MISC_DECLARATIONS(sh,SH,uint32_
85  #define SH_N_ITLB_ENTRIES       4  #define SH_N_ITLB_ENTRIES       4
86  #define SH_N_UTLB_ENTRIES       64  #define SH_N_UTLB_ENTRIES       64
87    
88    /*  An instruction with an invalid encoding; used for software
89        emulation of PROM calls within GXemul:  */
90  #define SH_INVALID_INSTR        0x00fb  #define SH_INVALID_INSTR        0x00fb
91    
92    
# Line 228  void sh_update_translation_table(struct Line 228  void sh_update_translation_table(struct
228          unsigned char *host_page, int writeflag, uint64_t paddr_page);          unsigned char *host_page, int writeflag, uint64_t paddr_page);
229  void sh_invalidate_translation_caches(struct cpu *cpu, uint64_t, int);  void sh_invalidate_translation_caches(struct cpu *cpu, uint64_t, int);
230  void sh_invalidate_code_translation(struct cpu *cpu, uint64_t, int);  void sh_invalidate_code_translation(struct cpu *cpu, uint64_t, int);
 int sh32_run_instr(struct cpu *cpu);  
 void sh32_update_translation_table(struct cpu *cpu, uint64_t vaddr_page,  
         unsigned char *host_page, int writeflag, uint64_t paddr_page);  
 void sh32_invalidate_translation_caches(struct cpu *cpu, uint64_t, int);  
 void sh32_invalidate_code_translation(struct cpu *cpu, uint64_t, int);  
231  void sh_init_64bit_dummy_tables(struct cpu *cpu);  void sh_init_64bit_dummy_tables(struct cpu *cpu);
 void sh_timer_sample_tick(struct timer *, void *);  
232  int sh_memory_rw(struct cpu *cpu, struct memory *mem, uint64_t vaddr,  int sh_memory_rw(struct cpu *cpu, struct memory *mem, uint64_t vaddr,
233          unsigned char *data, size_t len, int writeflag, int cache_flags);          unsigned char *data, size_t len, int writeflag, int cache_flags);
234  int sh_cpu_family_init(struct cpu_family *);  int sh_cpu_family_init(struct cpu_family *);
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