--- trunk/src/include/cpu_ppc.h 2007/10/08 16:19:23 20 +++ trunk/src/include/cpu_ppc.h 2007/10/08 16:19:56 24 @@ -2,7 +2,7 @@ #define CPU_PPC_H /* - * Copyright (C) 2005 Anders Gavare. All rights reserved. + * Copyright (C) 2005-2006 Anders Gavare. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are met: @@ -28,7 +28,7 @@ * SUCH DAMAGE. * * - * $Id: cpu_ppc.h,v 1.55 2005/11/24 01:15:07 debug Exp $ + * $Id: cpu_ppc.h,v 1.64 2006/03/05 16:51:55 debug Exp $ */ #include "misc.h" @@ -63,13 +63,16 @@ #define PPC_NOFP 1 #define PPC_601 2 #define PPC_603 4 +#define PPC_NO_DEC 8 /* No DEC (decrementer) SPR */ + /* TODO: Most of these just bogus */ #define PPC_CPU_TYPE_DEFS { \ - { "PPC405GP", 0, 32, PPC_NOFP, 15,5,2, 15,5,2, 20,5,1, 0 }, \ - { "PPC601", 0, 32, PPC_601, 14,5,4, 14,5,4, 0,0,0, 0 }, \ - { "PPC603", 0x00030302, 32, PPC_603, 14,5,4, 14,5,4, 0,0,0, 0 }, \ - { "PPC603e", 0x00060104, 32, PPC_603, 14,5,4, 14,5,4, 0,0,0, 0 }, \ + { "PPC405GP", 0x40110000, 32, PPC_NOFP|PPC_NO_DEC, \ + 13,5,2, 13,5,2, 0,5,1, 0 }, \ + { "PPC601", 0, 32, PPC_601, 14,5,4, 14,5,4, 0,0,0, 0 },\ + { "PPC603", 0x00030302, 32, PPC_603, 14,5,4, 14,5,4, 0,0,0, 0 },\ + { "PPC603e", 0x00060104, 32, PPC_603, 14,5,4, 14,5,4, 0,0,0, 0 },\ { "PPC604", 0x00040304, 32, 0, 15,5,4, 15,5,4, 0,0,0, 0 }, \ { "PPC620", 0x00140000, 64, 0, 15,5,4, 15,5,4, 0,0,0, 0 }, \ { "MPC7400", 0x000c0000, 32, 0, 15,5,2, 15,5,2, 19,5,1, 1 }, \ @@ -81,6 +84,7 @@ #define PPC_NGPRS 32 #define PPC_NFPRS 32 +#define PPC_NVRS 32 #define PPC_N_TGPRS 4 #define PPC_N_IC_ARGS 3 @@ -92,30 +96,14 @@ #define PPC_ADDR_TO_PAGENR(a) ((a) >> (PPC_IC_ENTRIES_SHIFT \ + PPC_INSTR_ALIGNMENT_SHIFT)) -struct ppc_instr_call { - void (*f)(struct cpu *, struct ppc_instr_call *); - size_t arg[PPC_N_IC_ARGS]; -}; - -/* Translation cache struct for each physical page: */ -struct ppc_tc_physpage { - struct ppc_instr_call ics[PPC_IC_ENTRIES_PER_PAGE + 1]; - uint32_t next_ofs; /* or 0 for end of chain */ - int flags; - uint64_t physaddr; -}; +#define PPC_L2N 17 +#define PPC_L3N 18 -#define PPC_N_VPH_ENTRIES 1048576 +DYNTRANS_MISC_DECLARATIONS(ppc,PPC,uint64_t) +DYNTRANS_MISC64_DECLARATIONS(ppc,PPC,uint8_t) #define PPC_MAX_VPH_TLB_ENTRIES 128 -struct ppc_vpg_tlb_entry { - uint8_t valid; - uint8_t writeflag; - int64_t timestamp; - uint64_t vaddr_page; - uint64_t paddr_page; - unsigned char *host_page; -}; + struct ppc_cpu { struct ppc_cpu_type_def cpu_type; @@ -134,6 +122,9 @@ uint64_t gpr[PPC_NGPRS]; /* General Purpose Registers */ uint64_t fpr[PPC_NFPRS]; /* Floating-Point Registers */ + uint64_t vr_hi[PPC_NVRS];/* 128-bit Vector registers */ + uint64_t vr_lo[PPC_NVRS];/* (Hi and lo 64-bit parts) */ + uint64_t msr; /* Machine state register */ uint64_t tgpr[PPC_N_TGPRS];/*Temporary gpr 0..3 */ @@ -145,35 +136,13 @@ /* - * Instruction translation cache: + * Instruction translation cache and Virtual->Physical->Host + * address translation: */ - - /* cur_ic_page is a pointer to an array of PPC_IC_ENTRIES_PER_PAGE - instruction call entries. next_ic points to the next such - call to be executed. */ - struct ppc_tc_physpage *cur_physpage; - struct ppc_instr_call *cur_ic_page; - struct ppc_instr_call *next_ic; - - void (*combination_check)(struct cpu *, - struct ppc_instr_call *, int low_addr); - - /* - * Virtual -> physical -> host address translation: - * - * host_load and host_store point to arrays of PPC_N_VPH_ENTRIES - * pointers (to host pages); phys_addr points to an array of - * PPC_N_VPH_ENTRIES uint32_t. - */ - - struct ppc_vpg_tlb_entry vph_tlb_entry[PPC_MAX_VPH_TLB_ENTRIES]; - unsigned char *host_load[PPC_N_VPH_ENTRIES]; - unsigned char *host_store[PPC_N_VPH_ENTRIES]; - uint32_t phys_addr[PPC_N_VPH_ENTRIES]; - struct ppc_tc_physpage *phys_page[PPC_N_VPH_ENTRIES]; - - uint32_t phystranslation[PPC_N_VPH_ENTRIES/32]; - uint8_t vaddr_to_tlbindex[PPC_N_VPH_ENTRIES]; + DYNTRANS_ITC(ppc) + VPH_TLBS(ppc,PPC) + VPH32(ppc,PPC,uint64_t,uint8_t) + VPH64(ppc,PPC,uint8_t) }; @@ -238,6 +207,7 @@ void ppc32_invalidate_translation_caches(struct cpu *cpu, uint64_t, int); void ppc_invalidate_code_translation(struct cpu *cpu, uint64_t, int); void ppc32_invalidate_code_translation(struct cpu *cpu, uint64_t, int); +void ppc_init_64bit_dummy_tables(struct cpu *cpu); int ppc_memory_rw(struct cpu *cpu, struct memory *mem, uint64_t vaddr, unsigned char *data, size_t len, int writeflag, int cache_flags); int ppc_cpu_family_init(struct cpu_family *);