/[gxemul]/trunk/src/include/cpu_ppc.h
This is repository of my old source code which isn't updated any more. Go to git.rot13.org for current projects!
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revision 22 by dpavlin, Mon Oct 8 16:19:37 2007 UTC revision 44 by dpavlin, Mon Oct 8 16:22:56 2007 UTC
# Line 2  Line 2 
2  #define CPU_PPC_H  #define CPU_PPC_H
3    
4  /*  /*
5   *  Copyright (C) 2005-2006  Anders Gavare.  All rights reserved.   *  Copyright (C) 2005-2007  Anders Gavare.  All rights reserved.
6   *   *
7   *  Redistribution and use in source and binary forms, with or without   *  Redistribution and use in source and binary forms, with or without
8   *  modification, are permitted provided that the following conditions are met:   *  modification, are permitted provided that the following conditions are met:
# Line 28  Line 28 
28   *  SUCH DAMAGE.   *  SUCH DAMAGE.
29   *   *
30   *   *
31   *  $Id: cpu_ppc.h,v 1.60 2006/02/09 22:40:27 debug Exp $   *  $Id: cpu_ppc.h,v 1.72 2007/07/20 09:03:33 debug Exp $
32   */   */
33    
34  #include "misc.h"  #include "misc.h"
# Line 65  struct ppc_cpu_type_def { Line 65  struct ppc_cpu_type_def {
65  #define PPC_603                 4  #define PPC_603                 4
66  #define PPC_NO_DEC              8       /*  No DEC (decrementer) SPR  */  #define PPC_NO_DEC              8       /*  No DEC (decrementer) SPR  */
67    
68  /*  TODO: Most of these just bogus  */  /*
69     *  TODO: Most of these just bogus
70     */
71    
72  #define PPC_CPU_TYPE_DEFS       {                                       \  #define PPC_CPU_TYPE_DEFS       {                                       \
73          { "PPC405GP",   0x40110000, 32, PPC_NOFP|PPC_NO_DEC,            \          { "PPC405GP",   0x40110000, 32, PPC_NOFP|PPC_NO_DEC,            \
# Line 84  struct ppc_cpu_type_def { Line 86  struct ppc_cpu_type_def {
86    
87  #define PPC_NGPRS               32  #define PPC_NGPRS               32
88  #define PPC_NFPRS               32  #define PPC_NFPRS               32
89    #define PPC_NVRS                32
90  #define PPC_N_TGPRS             4  #define PPC_N_TGPRS             4
91    
92  #define PPC_N_IC_ARGS                   3  #define PPC_N_IC_ARGS                   3
# Line 95  struct ppc_cpu_type_def { Line 98  struct ppc_cpu_type_def {
98  #define PPC_ADDR_TO_PAGENR(a)           ((a) >> (PPC_IC_ENTRIES_SHIFT \  #define PPC_ADDR_TO_PAGENR(a)           ((a) >> (PPC_IC_ENTRIES_SHIFT \
99                                          + PPC_INSTR_ALIGNMENT_SHIFT))                                          + PPC_INSTR_ALIGNMENT_SHIFT))
100    
101    #define PPC_L2N                 17
102    #define PPC_L3N                 18
103    
104  DYNTRANS_MISC_DECLARATIONS(ppc,PPC,uint64_t)  DYNTRANS_MISC_DECLARATIONS(ppc,PPC,uint64_t)
105    DYNTRANS_MISC64_DECLARATIONS(ppc,PPC,uint8_t)
106    
107  #define PPC_MAX_VPH_TLB_ENTRIES         128  #define PPC_MAX_VPH_TLB_ENTRIES         128
108    
# Line 117  struct ppc_cpu { Line 124  struct ppc_cpu {
124          uint64_t        gpr[PPC_NGPRS]; /*  General Purpose Registers  */          uint64_t        gpr[PPC_NGPRS]; /*  General Purpose Registers  */
125          uint64_t        fpr[PPC_NFPRS]; /*  Floating-Point Registers  */          uint64_t        fpr[PPC_NFPRS]; /*  Floating-Point Registers  */
126    
127            uint64_t        vr_hi[PPC_NVRS];/*  128-bit Vector registers  */
128            uint64_t        vr_lo[PPC_NVRS];/*  (Hi and lo 64-bit parts)  */
129    
130          uint64_t        msr;            /*  Machine state register  */          uint64_t        msr;            /*  Machine state register  */
131          uint64_t        tgpr[PPC_N_TGPRS];/*Temporary gpr 0..3  */          uint64_t        tgpr[PPC_N_TGPRS];/*Temporary gpr 0..3  */
132    
# Line 133  struct ppc_cpu { Line 143  struct ppc_cpu {
143           */           */
144          DYNTRANS_ITC(ppc)          DYNTRANS_ITC(ppc)
145          VPH_TLBS(ppc,PPC)          VPH_TLBS(ppc,PPC)
146          VPH32(ppc,PPC,uint64_t,uint8_t)          VPH32(ppc,PPC)
147          VPH64(ppc,PPC,uint8_t)          VPH64(ppc,PPC)
148  };  };
149    
150    
# Line 190  struct ppc_cpu { Line 200  struct ppc_cpu {
200    
201    
202  /*  cpu_ppc.c:  */  /*  cpu_ppc.c:  */
203    int ppc_run_instr(struct cpu *cpu);
204    int ppc32_run_instr(struct cpu *cpu);
205  void ppc_exception(struct cpu *cpu, int exception_nr);  void ppc_exception(struct cpu *cpu, int exception_nr);
206  void ppc_update_translation_table(struct cpu *cpu, uint64_t vaddr_page,  void ppc_update_translation_table(struct cpu *cpu, uint64_t vaddr_page,
207          unsigned char *host_page, int writeflag, uint64_t paddr_page);          unsigned char *host_page, int writeflag, uint64_t paddr_page);
# Line 199  void ppc_invalidate_translation_caches(s Line 211  void ppc_invalidate_translation_caches(s
211  void ppc32_invalidate_translation_caches(struct cpu *cpu, uint64_t, int);  void ppc32_invalidate_translation_caches(struct cpu *cpu, uint64_t, int);
212  void ppc_invalidate_code_translation(struct cpu *cpu, uint64_t, int);  void ppc_invalidate_code_translation(struct cpu *cpu, uint64_t, int);
213  void ppc32_invalidate_code_translation(struct cpu *cpu, uint64_t, int);  void ppc32_invalidate_code_translation(struct cpu *cpu, uint64_t, int);
214    void ppc_init_64bit_dummy_tables(struct cpu *cpu);
215  int ppc_memory_rw(struct cpu *cpu, struct memory *mem, uint64_t vaddr,  int ppc_memory_rw(struct cpu *cpu, struct memory *mem, uint64_t vaddr,
216          unsigned char *data, size_t len, int writeflag, int cache_flags);          unsigned char *data, size_t len, int writeflag, int cache_flags);
217  int ppc_cpu_family_init(struct cpu_family *);  int ppc_cpu_family_init(struct cpu_family *);
218    
219  /*  memory_ppc.c:  */  /*  memory_ppc.c:  */
220  int ppc_translate_address(struct cpu *cpu, uint64_t vaddr,  int ppc_translate_v2p(struct cpu *cpu, uint64_t vaddr,
221          uint64_t *return_addr, int flags);          uint64_t *return_addr, int flags);
222    
223  #endif  /*  CPU_PPC_H  */  #endif  /*  CPU_PPC_H  */
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