/[gxemul]/trunk/src/include/cpu_m68k.h
This is repository of my old source code which isn't updated any more. Go to git.rot13.org for current projects!
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Contents of /trunk/src/include/cpu_m68k.h

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Revision 18 - (show annotations)
Mon Oct 8 16:19:11 2007 UTC (16 years, 5 months ago) by dpavlin
File MIME type: text/plain
File size: 4178 byte(s)
++ trunk/HISTORY	(local)
$Id: HISTORY,v 1.1004 2005/10/27 14:01:10 debug Exp $
20051011        Passing -A as the default boot arg for CATS (works fine with
                OpenBSD/cats).
20051012	Fixing the VGA cursor offset bug, and speeding up framebuffer
		redraws if character cells contain the same thing as during
		the last redraw.
20051013	Adding a slow strd ARM instruction hack.
20051017	Minor updates: Adding a dummy i80321 Verde controller (for
		XScale emulation), fixing the disassembly of the ARM "ldrd"
		instruction, adding "support" for less-than-4KB pages for ARM
		(by not adding them to translation tables).
20051020	Continuing on some HPCarm stuff. A NetBSD/hpcarm kernel prints
		some boot messages on an emulated Jornada 720.
		Making dev_ram work better with dyntrans (speeds up some things
		quite a bit).
20051021	Automatically generating some of the most common ARM load/store
		multiple instructions.
20051022	Better statistics gathering for the ARM load/store multiple.
		Various other dyntrans and device updates.
20051023	Various minor updates.
20051024	Continuing; minor device and dyntrans fine-tuning. Adding the
		first "reasonable" instruction combination hacks for ARM (the
		cores of NetBSD/cats' memset and memcpy).
20051025	Fixing a dyntrans-related bug in dev_vga. Also changing the
		dyntrans low/high access notification to only be updated on
		writes, not reads. Hopefully it will be enough. (dev_vga in
		charcell mode now seems to work correctly with both reads and
		writes.)
		Experimenting with gathering dyntrans statistics (which parts
		of emulated RAM that are actually executed), and adding
		instruction combination hacks for cache cleaning and a part of
		NetBSD's scanc() function.
20051026	Adding a bitmap for ARM emulation which indicates if a page is
		(specifically) user accessible; loads and stores with the t-
		flag set can now use the translation arrays, which results in
		a measurable speedup.
20051027	Dyntrans updates; adding an extra bitmap array for 32-bit
		emulation modes, speeding up the check whether a physical page
		has any code translations or not (O(n) -> O(1)). Doing a
		similar reduction of O(n) to O(1) by avoiding the scan through
		the translation entries on a translation update (32-bit mode
		only).
		Various other minor hacks.
20051029	Quick release, without any testing at all.

==============  RELEASE 0.3.6.2  ==============


1 #ifndef CPU_M68K_H
2 #define CPU_M68K_H
3
4 /*
5 * Copyright (C) 2005 Anders Gavare. All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions are met:
9 *
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 * 3. The name of the author may not be used to endorse or promote products
16 * derived from this software without specific prior written permission.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
19 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28 * SUCH DAMAGE.
29 *
30 *
31 * $Id: cpu_m68k.h,v 1.6 2005/10/27 14:01:15 debug Exp $
32 */
33
34 #include "misc.h"
35
36
37 struct cpu_family;
38
39 #define N_M68K_DREGS 8
40 #define N_M68K_AREGS 8
41
42 #define M68K_N_IC_ARGS 3
43 #define M68K_INSTR_ALIGNMENT_SHIFT 1
44 #define M68K_IC_ENTRIES_SHIFT 11
45 #define M68K_IC_ENTRIES_PER_PAGE (1 << M68K_IC_ENTRIES_SHIFT)
46 #define M68K_PC_TO_IC_ENTRY(a) (((a)>>M68K_INSTR_ALIGNMENT_SHIFT) \
47 & (M68K_IC_ENTRIES_PER_PAGE-1))
48 #define M68K_ADDR_TO_PAGENR(a) ((a) >> (M68K_IC_ENTRIES_SHIFT \
49 + M68K_INSTR_ALIGNMENT_SHIFT))
50
51 struct m68k_instr_call {
52 void (*f)(struct cpu *, struct m68k_instr_call *);
53 size_t arg[M68K_N_IC_ARGS];
54 };
55
56 /* Translation cache struct for each physical page: */
57 struct m68k_tc_physpage {
58 struct m68k_instr_call ics[M68K_IC_ENTRIES_PER_PAGE + 1];
59 uint32_t next_ofs; /* or 0 for end of chain */
60 uint32_t physaddr;
61 int flags;
62 };
63
64
65 #define M68K_N_VPH_ENTRIES 1048576
66
67 #define M68K_MAX_VPH_TLB_ENTRIES 256
68 struct m68k_vpg_tlb_entry {
69 int valid;
70 int writeflag;
71 int64_t timestamp;
72 unsigned char *host_page;
73 uint32_t vaddr_page;
74 uint32_t paddr_page;
75 };
76
77
78 struct m68k_cpu {
79 /*
80 * General Purpose Registers:
81 */
82
83 uint32_t d[N_M68K_DREGS];
84 uint32_t a[N_M68K_AREGS];
85
86
87 /*
88 * Instruction translation cache:
89 */
90
91 /* cur_ic_page is a pointer to an array of M68K_IC_ENTRIES_PER_PAGE
92 instruction call entries. next_ic points to the next such
93 call to be executed. */
94 struct m68k_tc_physpage *cur_physpage;
95 struct m68k_instr_call *cur_ic_page;
96 struct m68k_instr_call *next_ic;
97
98
99 /*
100 * Virtual -> physical -> host address translation:
101 *
102 * host_load and host_store point to arrays of M68K_N_VPH_ENTRIES
103 * pointers (to host pages); phys_addr points to an array of
104 * M68K_N_VPH_ENTRIES uint32_t.
105 */
106
107 struct m68k_vpg_tlb_entry vph_tlb_entry[M68K_MAX_VPH_TLB_ENTRIES];
108 unsigned char *host_load[M68K_N_VPH_ENTRIES];
109 unsigned char *host_store[M68K_N_VPH_ENTRIES];
110 uint32_t phys_addr[M68K_N_VPH_ENTRIES];
111 struct m68k_tc_physpage *phys_page[M68K_N_VPH_ENTRIES];
112
113 uint32_t phystranslation[M68K_N_VPH_ENTRIES/32];
114 };
115
116
117 /* cpu_m68k.c: */
118 void m68k_update_translation_table(struct cpu *cpu, uint64_t vaddr_page,
119 unsigned char *host_page, int writeflag, uint64_t paddr_page);
120 void m68k_invalidate_translation_caches(struct cpu *cpu, uint64_t, int);
121 void m68k_invalidate_code_translation(struct cpu *cpu, uint64_t, int);
122 int m68k_memory_rw(struct cpu *cpu, struct memory *mem, uint64_t vaddr,
123 unsigned char *data, size_t len, int writeflag, int cache_flags);
124 int m68k_cpu_family_init(struct cpu_family *);
125
126
127 #endif /* CPU_M68K_H */

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