/[gxemul]/trunk/src/include/cpu_m68k.h
This is repository of my old source code which isn't updated any more. Go to git.rot13.org for current projects!
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revision 20 by dpavlin, Mon Oct 8 16:19:23 2007 UTC revision 22 by dpavlin, Mon Oct 8 16:19:37 2007 UTC
# Line 2  Line 2 
2  #define CPU_M68K_H  #define CPU_M68K_H
3    
4  /*  /*
5   *  Copyright (C) 2005  Anders Gavare.  All rights reserved.   *  Copyright (C) 2005-2006  Anders Gavare.  All rights reserved.
6   *   *
7   *  Redistribution and use in source and binary forms, with or without   *  Redistribution and use in source and binary forms, with or without
8   *  modification, are permitted provided that the following conditions are met:   *  modification, are permitted provided that the following conditions are met:
# Line 28  Line 28 
28   *  SUCH DAMAGE.   *  SUCH DAMAGE.
29   *   *
30   *   *
31   *  $Id: cpu_m68k.h,v 1.9 2005/11/16 21:15:19 debug Exp $   *  $Id: cpu_m68k.h,v 1.12 2006/02/13 04:23:25 debug Exp $
32   */   */
33    
34  #include "misc.h"  #include "misc.h"
# Line 48  struct cpu_family; Line 48  struct cpu_family;
48  #define M68K_ADDR_TO_PAGENR(a)          ((a) >> (M68K_IC_ENTRIES_SHIFT \  #define M68K_ADDR_TO_PAGENR(a)          ((a) >> (M68K_IC_ENTRIES_SHIFT \
49                                          + M68K_INSTR_ALIGNMENT_SHIFT))                                          + M68K_INSTR_ALIGNMENT_SHIFT))
50    
51  struct m68k_instr_call {  DYNTRANS_MISC_DECLARATIONS(m68k,M68K,uint32_t)
         void    (*f)(struct cpu *, struct m68k_instr_call *);  
         int     len;  
         size_t  arg[M68K_N_IC_ARGS];  
 };  
   
 /*  Translation cache struct for each physical page:  */  
 struct m68k_tc_physpage {  
         struct m68k_instr_call ics[M68K_IC_ENTRIES_PER_PAGE + 1];  
         uint32_t        next_ofs;       /*  or 0 for end of chain  */  
         uint32_t        physaddr;  
         int             flags;  
 };  
52    
53    #define M68K_MAX_VPH_TLB_ENTRIES                128
 #define M68K_N_VPH_ENTRIES      1048576  
   
 #define M68K_MAX_VPH_TLB_ENTRIES                256  
 struct m68k_vpg_tlb_entry {  
         uint8_t         valid;  
         uint8_t         writeflag;  
         uint32_t        vaddr_page;  
         uint32_t        paddr_page;  
         unsigned char   *host_page;  
 };  
54    
55    
56  struct m68k_cpu {  struct m68k_cpu {
# Line 85  struct m68k_cpu { Line 63  struct m68k_cpu {
63    
64    
65          /*          /*
66           *  Instruction translation cache:           *  Instruction translation cache and 32-bit virtual -> physical ->
67             *  host address translation:
68           */           */
69            DYNTRANS_ITC(m68k)
70          /*  cur_ic_page is a pointer to an array of M68K_IC_ENTRIES_PER_PAGE          VPH_TLBS(m68k,M68K)
71              instruction call entries. next_ic points to the next such          VPH32(m68k,M68K,uint32_t,uint8_t)
             call to be executed.  */  
         struct m68k_tc_physpage *cur_physpage;  
         struct m68k_instr_call  *cur_ic_page;  
         struct m68k_instr_call  *next_ic;  
   
         void                    (*combination_check)(struct cpu *,  
                                     struct m68k_instr_call *, int low_addr);  
   
         /*  
          *  Virtual -> physical -> host address translation:  
          *  
          *  host_load and host_store point to arrays of M68K_N_VPH_ENTRIES  
          *  pointers (to host pages); phys_addr points to an array of  
          *  M68K_N_VPH_ENTRIES uint32_t.  
          */  
   
         struct m68k_vpg_tlb_entry       vph_tlb_entry[M68K_MAX_VPH_TLB_ENTRIES];  
         unsigned char                   *host_load[M68K_N_VPH_ENTRIES];  
         unsigned char                   *host_store[M68K_N_VPH_ENTRIES];  
         uint32_t                        phys_addr[M68K_N_VPH_ENTRIES];  
         struct m68k_tc_physpage         *phys_page[M68K_N_VPH_ENTRIES];  
   
         uint32_t                        phystranslation[M68K_N_VPH_ENTRIES/32];  
         int16_t                         vaddr_to_tlbindex[M68K_N_VPH_ENTRIES];  
72  };  };
73    
74    
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