/[gxemul]/trunk/src/include/cpu_ia64.h
This is repository of my old source code which isn't updated any more. Go to git.rot13.org for current projects!
ViewVC logotype

Diff of /trunk/src/include/cpu_ia64.h

Parent Directory Parent Directory | Revision Log Revision Log | View Patch Patch

revision 18 by dpavlin, Mon Oct 8 16:19:11 2007 UTC revision 28 by dpavlin, Mon Oct 8 16:20:26 2007 UTC
# Line 2  Line 2 
2  #define CPU_IA64_H  #define CPU_IA64_H
3    
4  /*  /*
5   *  Copyright (C) 2005  Anders Gavare.  All rights reserved.   *  Copyright (C) 2005-2006  Anders Gavare.  All rights reserved.
6   *   *
7   *  Redistribution and use in source and binary forms, with or without   *  Redistribution and use in source and binary forms, with or without
8   *  modification, are permitted provided that the following conditions are met:   *  modification, are permitted provided that the following conditions are met:
# Line 28  Line 28 
28   *  SUCH DAMAGE.   *  SUCH DAMAGE.
29   *   *
30   *   *
31   *  $Id: cpu_ia64.h,v 1.5 2005/10/22 17:24:22 debug Exp $   *  $Id: cpu_ia64.h,v 1.14 2006/07/16 13:32:27 debug Exp $
32   */   */
33    
34  #include "misc.h"  #include "misc.h"
# Line 45  struct cpu_family; Line 45  struct cpu_family;
45  #define IA64_ADDR_TO_PAGENR(a)          ((a) >> (IA64_IC_ENTRIES_SHIFT \  #define IA64_ADDR_TO_PAGENR(a)          ((a) >> (IA64_IC_ENTRIES_SHIFT \
46                                          + IA64_INSTR_ALIGNMENT_SHIFT))                                          + IA64_INSTR_ALIGNMENT_SHIFT))
47    
48  /*  TODO  */  #define IA64_L2N                17
49  struct ia64_instr_call {  #define IA64_L3N                18
         void    (*f)(struct cpu *, struct ia64_instr_call *);  
         size_t  arg[IA64_N_IC_ARGS];  
 };  
   
 /*  Translation cache struct for each physical page:  */  
 struct ia64_tc_physpage {  
         struct ia64_instr_call ics[IA64_IC_ENTRIES_PER_PAGE + 1];  
         uint32_t        next_ofs;       /*  or 0 for end of chain  */  
         int             flags;  
         uint64_t        physaddr;  
 };  
50    
51    DYNTRANS_MISC_DECLARATIONS(ia64,IA64,uint64_t)
52    DYNTRANS_MISC64_DECLARATIONS(ia64,IA64,uint8_t)
53    
54  /*  #define IA64_MAX_VPH_TLB_ENTRIES                128
  *  Virtual->physical->host page entry:  
  *  
  *      38 + 14 + 12 bits = 64 bits  
  *  
  *  TODO!!!!  
  */  
 #define IA64_LEVEL0_SHIFT               26  
 #define IA64_LEVEL0                     8192  
 #define IA64_LEVEL1_SHIFT               12  
 #define IA64_LEVEL1                     16384  
 struct ia64_vph_page {  
         void            *host_load[IA64_LEVEL1];  
         void            *host_store[IA64_LEVEL1];  
         uint64_t        phys_addr[IA64_LEVEL1];  
         struct ia64_tc_physpage *phys_page[IA64_LEVEL1];  
         int             refcount;  
         struct ia64_vph_page    *next;  /*  Freelist, used if refcount = 0.  */  
 };  
55    
56    #define N_IA64_REG      128
 #define IA64_MAX_VPH_TLB_ENTRIES        48  
 struct ia64_vpg_tlb_entry {  
         int             valid;  
         int             writeflag;  
         int64_t         timestamp;  
         unsigned char   *host_page;  
         uint64_t        vaddr_page;  
         uint64_t        paddr_page;  
 };  
57    
58  struct ia64_cpu {  struct ia64_cpu {
59          /*  TODO  */          /*  TODO  */
60          uint64_t        r[128];          uint64_t        r[N_IA64_REG];
   
   
         /*  
          *  Instruction translation cache:  
          */  
   
         /*  cur_ic_page is a pointer to an array of IA64_IC_ENTRIES_PER_PAGE  
             instruction call entries. next_ic points to the next such  
             call to be executed.  */  
         struct ia64_tc_physpage *cur_physpage;  
         struct ia64_instr_call  *cur_ic_page;  
         struct ia64_instr_call  *next_ic;  
61    
62    
63          /*          /*
64           *  Virtual -> physical -> host address translation:           *  Instruction translation cache and Virtual->Physical->Host
65             *  address translation:
66           */           */
67          struct ia64_vpg_tlb_entry vph_tlb_entry[IA64_MAX_VPH_TLB_ENTRIES];          DYNTRANS_ITC(ia64)
68          struct ia64_vph_page    *vph_default_page;          VPH_TLBS(ia64,IA64)
69          struct ia64_vph_page    *vph_next_free_page;          VPH64(ia64,IA64,uint8_t)
         struct ia64_vph_table   *vph_next_free_table;  
         struct ia64_vph_page    *vph_table0[IA64_LEVEL0];  
         struct ia64_vph_page    *vph_table0_kernel[IA64_LEVEL0];  
70  };  };
71    
72    
73  /*  cpu_ia64.c:  */  /*  cpu_ia64.c:  */
74    int ia64_run_instr(struct cpu *cpu);
75  void ia64_update_translation_table(struct cpu *cpu, uint64_t vaddr_page,  void ia64_update_translation_table(struct cpu *cpu, uint64_t vaddr_page,
76          unsigned char *host_page, int writeflag, uint64_t paddr_page);          unsigned char *host_page, int writeflag, uint64_t paddr_page);
77  void ia64_invalidate_translation_caches(struct cpu *cpu, uint64_t, int);  void ia64_invalidate_translation_caches(struct cpu *cpu, uint64_t, int);
78  void ia64_invalidate_code_translation(struct cpu *cpu, uint64_t, int);  void ia64_invalidate_code_translation(struct cpu *cpu, uint64_t, int);
79    void ia64_init_64bit_dummy_tables(struct cpu *cpu);
80  int ia64_memory_rw(struct cpu *cpu, struct memory *mem, uint64_t vaddr,  int ia64_memory_rw(struct cpu *cpu, struct memory *mem, uint64_t vaddr,
81          unsigned char *data, size_t len, int writeflag, int cache_flags);          unsigned char *data, size_t len, int writeflag, int cache_flags);
82  int ia64_userland_memory_rw(struct cpu *cpu, struct memory *mem,  int ia64_userland_memory_rw(struct cpu *cpu, struct memory *mem,

Legend:
Removed from v.18  
changed lines
  Added in v.28

  ViewVC Help
Powered by ViewVC 1.1.26