--- trunk/src/include/cpu_avr.h	2007/10/08 16:19:11	18
+++ trunk/src/include/cpu_avr.h	2007/10/08 16:20:26	28
@@ -2,7 +2,7 @@
 #define	CPU_AVR_H
 
 /*
- *  Copyright (C) 2005  Anders Gavare.  All rights reserved.
+ *  Copyright (C) 2005-2006  Anders Gavare.  All rights reserved.
  *
  *  Redistribution and use in source and binary forms, with or without
  *  modification, are permitted provided that the following conditions are met:
@@ -28,7 +28,7 @@
  *  SUCH DAMAGE.
  *
  *
- *  $Id: cpu_avr.h,v 1.7 2005/10/27 14:01:15 debug Exp $
+ *  $Id: cpu_avr.h,v 1.17 2006/07/16 13:32:27 debug Exp $
  */
 
 #include "misc.h"
@@ -38,7 +38,7 @@
 
 #define	N_AVR_REGS		32
 
-#define	AVR_N_IC_ARGS			2
+#define	AVR_N_IC_ARGS			4
 #define	AVR_INSTR_ALIGNMENT_SHIFT	1
 #define	AVR_IC_ENTRIES_SHIFT		11
 #define	AVR_IC_ENTRIES_PER_PAGE		(1 << AVR_IC_ENTRIES_SHIFT)
@@ -47,31 +47,9 @@
 #define	AVR_ADDR_TO_PAGENR(a)		((a) >> (AVR_IC_ENTRIES_SHIFT \
 					+ AVR_INSTR_ALIGNMENT_SHIFT))
 
-struct avr_instr_call {
-	void	(*f)(struct cpu *, struct avr_instr_call *);
-	size_t	arg[AVR_N_IC_ARGS];
-};
-
-/*  Translation cache struct for each physical page:  */
-struct avr_tc_physpage {
-	struct avr_instr_call ics[AVR_IC_ENTRIES_PER_PAGE + 1];
-	uint32_t	next_ofs;	/*  or 0 for end of chain  */
-	uint32_t	physaddr;
-	int		flags;
-};
+DYNTRANS_MISC_DECLARATIONS(avr,AVR,uint64_t)
 
-
-#define	AVR_N_VPH_ENTRIES	1048576
-
-#define	AVR_MAX_VPH_TLB_ENTRIES		256
-struct avr_vpg_tlb_entry {
-	int		valid;
-	int		writeflag;
-	int64_t		timestamp;
-	unsigned char	*host_page;
-	uint32_t	vaddr_page;
-	uint32_t	paddr_page;
-};
+#define	AVR_MAX_VPH_TLB_ENTRIES		128
 
 
 #define SREG_NAMES	"cznvshti"
@@ -85,9 +63,14 @@
 #define	AVR_SREG_T		0x40	/*  Transfer bit  */
 #define	AVR_SREG_I		0x80	/*  Interrupt enable/disable  */
 
+#define	AVR_SRAM_BASE	0x800000
+
 
 struct avr_cpu {
 	uint32_t	pc_mask;
+	int		is_22bit;	/*  0 for 16-bit, 1 for 22-bit PC  */
+
+	uint32_t	sram_mask;
 
 	/*
 	 *  General Purpose Registers:
@@ -97,6 +80,23 @@
 	/*  Status register:  */
 	uint8_t		sreg;
 
+	/*  Ports A-D:  */
+	uint8_t		ddra;	/*  Direction  */
+	uint8_t		ddrb;
+	uint8_t		ddrc;
+	uint8_t		ddrd;
+	uint8_t		porta_read;
+	uint8_t		porta_write;
+	uint8_t		portb_read;
+	uint8_t		portb_write;
+	uint8_t		portc_read;
+	uint8_t		portc_write;
+	uint8_t		portd_read;
+	uint8_t		portd_write;
+
+	/*  Stack pointer (high and low byte combined):  */
+	uint16_t	sp;
+
 	/*
 	 *  In order to keep an accurate cycle count, this variable should be
 	 *  increased for those instructions that take longer than 1 cycle to
@@ -109,34 +109,20 @@
 	/*
 	 *  Instruction translation cache:
 	 */
-
-	/*  cur_ic_page is a pointer to an array of AVR_IC_ENTRIES_PER_PAGE
-	    instruction call entries. next_ic points to the next such
-	    call to be executed.  */
-	struct avr_tc_physpage	*cur_physpage;
-	struct avr_instr_call	*cur_ic_page;
-	struct avr_instr_call	*next_ic;
-
+	DYNTRANS_ITC(avr)
 
 	/*
-	 *  Virtual -> physical -> host address translation:
+	 *  32-bit virtual -> physical -> host address translation:
 	 *
-	 *  host_load and host_store point to arrays of AVR_N_VPH_ENTRIES
-	 *  pointers (to host pages); phys_addr points to an array of
-	 *  AVR_N_VPH_ENTRIES uint32_t.
+	 *  (All 32 bits are not really needed on AVRs.)
 	 */
-
-	struct avr_vpg_tlb_entry	vph_tlb_entry[AVR_MAX_VPH_TLB_ENTRIES];
-	unsigned char			*host_load[AVR_N_VPH_ENTRIES];
-	unsigned char			*host_store[AVR_N_VPH_ENTRIES];
-	uint32_t			phys_addr[AVR_N_VPH_ENTRIES];
-	struct avr_tc_physpage		*phys_page[AVR_N_VPH_ENTRIES];
-
-	uint32_t			phystranslation[AVR_N_VPH_ENTRIES/32];
+	VPH_TLBS(avr,AVR)
+	VPH32(avr,AVR,uint32_t,uint8_t)
 };
 
 
 /*  cpu_avr.c:  */
+int avr_run_instr(struct cpu *cpu);
 void avr_update_translation_table(struct cpu *cpu, uint64_t vaddr_page,
 	unsigned char *host_page, int writeflag, uint64_t paddr_page);
 void avr_invalidate_translation_caches(struct cpu *cpu, uint64_t, int);