/[gxemul]/trunk/src/include/cpu_avr.h
This is repository of my old source code which isn't updated any more. Go to git.rot13.org for current projects!
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revision 18 by dpavlin, Mon Oct 8 16:19:11 2007 UTC revision 28 by dpavlin, Mon Oct 8 16:20:26 2007 UTC
# Line 2  Line 2 
2  #define CPU_AVR_H  #define CPU_AVR_H
3    
4  /*  /*
5   *  Copyright (C) 2005  Anders Gavare.  All rights reserved.   *  Copyright (C) 2005-2006  Anders Gavare.  All rights reserved.
6   *   *
7   *  Redistribution and use in source and binary forms, with or without   *  Redistribution and use in source and binary forms, with or without
8   *  modification, are permitted provided that the following conditions are met:   *  modification, are permitted provided that the following conditions are met:
# Line 28  Line 28 
28   *  SUCH DAMAGE.   *  SUCH DAMAGE.
29   *   *
30   *   *
31   *  $Id: cpu_avr.h,v 1.7 2005/10/27 14:01:15 debug Exp $   *  $Id: cpu_avr.h,v 1.17 2006/07/16 13:32:27 debug Exp $
32   */   */
33    
34  #include "misc.h"  #include "misc.h"
# Line 38  struct cpu_family; Line 38  struct cpu_family;
38    
39  #define N_AVR_REGS              32  #define N_AVR_REGS              32
40    
41  #define AVR_N_IC_ARGS                   2  #define AVR_N_IC_ARGS                   4
42  #define AVR_INSTR_ALIGNMENT_SHIFT       1  #define AVR_INSTR_ALIGNMENT_SHIFT       1
43  #define AVR_IC_ENTRIES_SHIFT            11  #define AVR_IC_ENTRIES_SHIFT            11
44  #define AVR_IC_ENTRIES_PER_PAGE         (1 << AVR_IC_ENTRIES_SHIFT)  #define AVR_IC_ENTRIES_PER_PAGE         (1 << AVR_IC_ENTRIES_SHIFT)
# Line 47  struct cpu_family; Line 47  struct cpu_family;
47  #define AVR_ADDR_TO_PAGENR(a)           ((a) >> (AVR_IC_ENTRIES_SHIFT \  #define AVR_ADDR_TO_PAGENR(a)           ((a) >> (AVR_IC_ENTRIES_SHIFT \
48                                          + AVR_INSTR_ALIGNMENT_SHIFT))                                          + AVR_INSTR_ALIGNMENT_SHIFT))
49    
50  struct avr_instr_call {  DYNTRANS_MISC_DECLARATIONS(avr,AVR,uint64_t)
         void    (*f)(struct cpu *, struct avr_instr_call *);  
         size_t  arg[AVR_N_IC_ARGS];  
 };  
   
 /*  Translation cache struct for each physical page:  */  
 struct avr_tc_physpage {  
         struct avr_instr_call ics[AVR_IC_ENTRIES_PER_PAGE + 1];  
         uint32_t        next_ofs;       /*  or 0 for end of chain  */  
         uint32_t        physaddr;  
         int             flags;  
 };  
51    
52    #define AVR_MAX_VPH_TLB_ENTRIES         128
 #define AVR_N_VPH_ENTRIES       1048576  
   
 #define AVR_MAX_VPH_TLB_ENTRIES         256  
 struct avr_vpg_tlb_entry {  
         int             valid;  
         int             writeflag;  
         int64_t         timestamp;  
         unsigned char   *host_page;  
         uint32_t        vaddr_page;  
         uint32_t        paddr_page;  
 };  
53    
54    
55  #define SREG_NAMES      "cznvshti"  #define SREG_NAMES      "cznvshti"
# Line 85  struct avr_vpg_tlb_entry { Line 63  struct avr_vpg_tlb_entry {
63  #define AVR_SREG_T              0x40    /*  Transfer bit  */  #define AVR_SREG_T              0x40    /*  Transfer bit  */
64  #define AVR_SREG_I              0x80    /*  Interrupt enable/disable  */  #define AVR_SREG_I              0x80    /*  Interrupt enable/disable  */
65    
66    #define AVR_SRAM_BASE   0x800000
67    
68    
69  struct avr_cpu {  struct avr_cpu {
70          uint32_t        pc_mask;          uint32_t        pc_mask;
71            int             is_22bit;       /*  0 for 16-bit, 1 for 22-bit PC  */
72    
73            uint32_t        sram_mask;
74    
75          /*          /*
76           *  General Purpose Registers:           *  General Purpose Registers:
# Line 97  struct avr_cpu { Line 80  struct avr_cpu {
80          /*  Status register:  */          /*  Status register:  */
81          uint8_t         sreg;          uint8_t         sreg;
82    
83            /*  Ports A-D:  */
84            uint8_t         ddra;   /*  Direction  */
85            uint8_t         ddrb;
86            uint8_t         ddrc;
87            uint8_t         ddrd;
88            uint8_t         porta_read;
89            uint8_t         porta_write;
90            uint8_t         portb_read;
91            uint8_t         portb_write;
92            uint8_t         portc_read;
93            uint8_t         portc_write;
94            uint8_t         portd_read;
95            uint8_t         portd_write;
96    
97            /*  Stack pointer (high and low byte combined):  */
98            uint16_t        sp;
99    
100          /*          /*
101           *  In order to keep an accurate cycle count, this variable should be           *  In order to keep an accurate cycle count, this variable should be
102           *  increased for those instructions that take longer than 1 cycle to           *  increased for those instructions that take longer than 1 cycle to
# Line 109  struct avr_cpu { Line 109  struct avr_cpu {
109          /*          /*
110           *  Instruction translation cache:           *  Instruction translation cache:
111           */           */
112            DYNTRANS_ITC(avr)
         /*  cur_ic_page is a pointer to an array of AVR_IC_ENTRIES_PER_PAGE  
             instruction call entries. next_ic points to the next such  
             call to be executed.  */  
         struct avr_tc_physpage  *cur_physpage;  
         struct avr_instr_call   *cur_ic_page;  
         struct avr_instr_call   *next_ic;  
   
113    
114          /*          /*
115           *  Virtual -> physical -> host address translation:           *  32-bit virtual -> physical -> host address translation:
116           *           *
117           *  host_load and host_store point to arrays of AVR_N_VPH_ENTRIES           *  (All 32 bits are not really needed on AVRs.)
          *  pointers (to host pages); phys_addr points to an array of  
          *  AVR_N_VPH_ENTRIES uint32_t.  
118           */           */
119            VPH_TLBS(avr,AVR)
120          struct avr_vpg_tlb_entry        vph_tlb_entry[AVR_MAX_VPH_TLB_ENTRIES];          VPH32(avr,AVR,uint32_t,uint8_t)
         unsigned char                   *host_load[AVR_N_VPH_ENTRIES];  
         unsigned char                   *host_store[AVR_N_VPH_ENTRIES];  
         uint32_t                        phys_addr[AVR_N_VPH_ENTRIES];  
         struct avr_tc_physpage          *phys_page[AVR_N_VPH_ENTRIES];  
   
         uint32_t                        phystranslation[AVR_N_VPH_ENTRIES/32];  
121  };  };
122    
123    
124  /*  cpu_avr.c:  */  /*  cpu_avr.c:  */
125    int avr_run_instr(struct cpu *cpu);
126  void avr_update_translation_table(struct cpu *cpu, uint64_t vaddr_page,  void avr_update_translation_table(struct cpu *cpu, uint64_t vaddr_page,
127          unsigned char *host_page, int writeflag, uint64_t paddr_page);          unsigned char *host_page, int writeflag, uint64_t paddr_page);
128  void avr_invalidate_translation_caches(struct cpu *cpu, uint64_t, int);  void avr_invalidate_translation_caches(struct cpu *cpu, uint64_t, int);
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