--- trunk/src/include/cpu_arm.h	2007/10/08 16:19:01	16
+++ trunk/src/include/cpu_arm.h	2007/10/08 16:19:11	18
@@ -28,7 +28,7 @@
  *  SUCH DAMAGE.
  *
  *
- *  $Id: cpu_arm.h,v 1.44 2005/10/10 18:43:37 debug Exp $
+ *  $Id: cpu_arm.h,v 1.53 2005/10/27 14:01:15 debug Exp $
  */
 
 #include "misc.h"
@@ -85,10 +85,10 @@
 
 /*  Translation cache struct for each physical page:  */
 struct arm_tc_physpage {
+	struct arm_instr_call ics[ARM_IC_ENTRIES_PER_PAGE + 1];
 	uint32_t	next_ofs;	/*  or 0 for end of chain  */
 	uint32_t	physaddr;
 	int		flags;
-	struct arm_instr_call ics[ARM_IC_ENTRIES_PER_PAGE + 1];
 };
 
 
@@ -132,7 +132,7 @@
 
 #define	ARM_N_VPH_ENTRIES	1048576
 
-#define	ARM_MAX_VPH_TLB_ENTRIES		32
+#define	ARM_MAX_VPH_TLB_ENTRIES		128
 struct arm_vpg_tlb_entry {
 	int		valid;
 	int		writeflag;
@@ -192,6 +192,10 @@
 	uint32_t		far;		/*  Fault Address Register  */
 	uint32_t		pid;		/*  Process Id Register  */
 
+	/*  For caching the host address of the L1 translation table:  */
+	unsigned char		*translation_table;
+	uint32_t		last_ttb;
+
 
 	/*
 	 *  Interrupts:
@@ -224,6 +228,12 @@
 	unsigned char			*host_store[ARM_N_VPH_ENTRIES];
 	uint32_t			phys_addr[ARM_N_VPH_ENTRIES];
 	struct arm_tc_physpage		*phys_page[ARM_N_VPH_ENTRIES];
+
+	uint32_t			phystranslation[ARM_N_VPH_ENTRIES/32];
+	int16_t				vaddr_to_tlbindex[ARM_N_VPH_ENTRIES];
+
+	/*  ARM specific: */
+	unsigned char			is_userpage[ARM_N_VPH_ENTRIES/8];
 };
 
 
@@ -245,12 +255,16 @@
 #define	ARM_CONTROL_L4		0x8000
 
 /*  cpu_arm.c:  */
+void arm_setup_initial_translation_table(struct cpu *cpu, uint32_t ttb_addr);
+void arm_translation_table_set_l1(struct cpu *cpu, uint32_t vaddr,
+	uint32_t paddr);
+void arm_translation_table_set_l1_b(struct cpu *cpu, uint32_t vaddr,
+	uint32_t paddr);
 void arm_exception(struct cpu *, int);
 void arm_update_translation_table(struct cpu *cpu, uint64_t vaddr_page,
 	unsigned char *host_page, int writeflag, uint64_t paddr_page);
-void arm_invalidate_translation_caches_paddr(struct cpu *cpu, uint64_t, int);
+void arm_invalidate_translation_caches(struct cpu *cpu, uint64_t, int);
 void arm_invalidate_code_translation(struct cpu *cpu, uint64_t, int);
-void arm_setup_initial_translation_table(struct cpu *cpu, uint32_t ttb_addr);
 void arm_load_register_bank(struct cpu *cpu);
 void arm_save_register_bank(struct cpu *cpu);
 int arm_memory_rw(struct cpu *cpu, struct memory *mem, uint64_t vaddr,
@@ -268,5 +282,7 @@
 /*  memory_arm.c:  */
 int arm_translate_address(struct cpu *cpu, uint64_t vaddr,
 	uint64_t *return_addr, int flags);
+int arm_translate_address_mmu(struct cpu *cpu, uint64_t vaddr,
+	uint64_t *return_addr, int flags);
 
 #endif	/*  CPU_ARM_H  */