--- trunk/src/include/cpu_alpha.h	2007/10/08 16:18:51	14
+++ trunk/src/include/cpu_alpha.h	2007/10/08 16:19:56	24
@@ -2,7 +2,7 @@
 #define	CPU_ALPHA_H
 
 /*
- *  Copyright (C) 2005  Anders Gavare.  All rights reserved.
+ *  Copyright (C) 2005-2006  Anders Gavare.  All rights reserved.
  *
  *  Redistribution and use in source and binary forms, with or without
  *  modification, are permitted provided that the following conditions are met:
@@ -28,12 +28,41 @@
  *  SUCH DAMAGE.
  *
  *
- *  $Id: cpu_alpha.h,v 1.23 2005/08/28 20:16:24 debug Exp $
+ *  $Id: cpu_alpha.h,v 1.37 2006/06/02 18:11:38 debug Exp $
  */
 
 #include "misc.h"
 
 
+/*  ALPHA CPU types:  */
+struct alpha_cpu_type_def { 
+	char		*name;
+	int		features;
+	int		icache_shift;
+	int		ilinesize;
+	int		iway;
+	int		dcache_shift;
+	int		dlinesize;
+	int		dway;
+	int		l2cache_shift;
+	int		l2linesize;
+	int		l2way;
+};
+
+/*  TODO: More features  */
+#define	ALPHA_FEATURE_BWX		1
+
+#define ALPHA_CPU_TYPE_DEFS	{					\
+	{ "21064",	0,	 16,5,2, 16,5,2,  0,0,0 },		\
+	{ "21066",	0,	 16,5,2, 16,5,2,  0,0,0 },		\
+	{ "21164",	0,	 16,5,2, 16,5,2,  0,0,0 },		\
+	{ "21164A-2",	0,	 16,5,2, 16,5,2,  0,0,0 },		\
+	{ "21164PC",	0,	 16,5,2, 16,5,2,  0,0,0 },		\
+	{ "21264",	0,	 16,5,2, 16,5,2,  0,0,0 },		\
+	{ "21364",	0,	 16,5,2, 16,5,2,  0,0,0 },		\
+	{ NULL,		0,	  0,0,0,  0,0,0,   0,0,0 }		}
+
+
 struct cpu_family;
 
 #define	ALPHA_V0		0
@@ -65,52 +94,14 @@
 #define	ALPHA_ADDR_TO_PAGENR(a)		((a) >> (ALPHA_IC_ENTRIES_SHIFT \
 					+ ALPHA_INSTR_ALIGNMENT_SHIFT))
 
-struct alpha_instr_call {
-	void	(*f)(struct cpu *, struct alpha_instr_call *);
-	size_t	arg[ALPHA_N_IC_ARGS];
-};
+#define	ALPHA_MAX_VPH_TLB_ENTRIES	128
 
-/*  Translation cache struct for each physical page:  */
-struct alpha_tc_physpage {
-	uint32_t	next_ofs;	/*  or 0 for end of chain  */
-	uint32_t	physaddr;
-	int		flags;
-	struct alpha_instr_call ics[ALPHA_IC_ENTRIES_PER_PAGE + 1];
-};
+#define	ALPHA_L2N		17
+#define	ALPHA_L3N		17
 
+DYNTRANS_MISC_DECLARATIONS(alpha,ALPHA,uint64_t)
+DYNTRANS_MISC64_DECLARATIONS(alpha,ALPHA,uint8_t)
 
-/*
- *  Virtual->physical->host page entry:
- *
- *	13 + 13 + 13 bits = 39 bits (should be enough for most userspace
- *	applications)
- *
- *  There is also an additional check for kernel space addresses.
- */
-#define	ALPHA_TOPSHIFT			39
-#define	ALPHA_TOP_KERNEL		0x1fffff8
-#define	ALPHA_LEVEL0_SHIFT		26
-#define	ALPHA_LEVEL0			8192
-#define	ALPHA_LEVEL1_SHIFT		13
-#define	ALPHA_LEVEL1			8192
-struct alpha_vph_page {
-	void		*host_load[ALPHA_LEVEL1];
-	void		*host_store[ALPHA_LEVEL1];
-	uint64_t	phys_addr[ALPHA_LEVEL1];
-	struct alpha_tc_physpage *phys_page[ALPHA_LEVEL1];
-	int		refcount;
-	struct alpha_vph_page	*next;	/*  Freelist, used if refcount = 0.  */
-};
-
-#define	ALPHA_MAX_VPH_TLB_ENTRIES	128
-struct alpha_vpg_tlb_entry {
-	int		valid;
-	int		writeflag;
-	int64_t		timestamp;
-	unsigned char	*host_page;
-	uint64_t	vaddr_page;
-	uint64_t	paddr_page;
-};
 
 struct alpha_cpu {
 	/*
@@ -120,6 +111,7 @@
 	uint64_t		r[N_ALPHA_REGS];	/*  Integer  */
 	uint64_t		f[N_ALPHA_REGS];	/*  Floating Point  */
 
+	uint64_t		fpcr;			/*  FP Control Reg.  */
 
 	/*  Misc.:  */
 	uint64_t		pcc;			/*  Cycle Counter  */
@@ -127,37 +119,27 @@
 	uint64_t		load_linked_addr;
 	int			ll_flag;
 
-
-	/*
-	 *  Instruction translation cache:
-	 */
-
-	/*  cur_ic_page is a pointer to an array of ALPHA_IC_ENTRIES_PER_PAGE
-	    instruction call entries. next_ic points to the next such
-	    call to be executed.  */
-	struct alpha_tc_physpage *cur_physpage;
-	struct alpha_instr_call	*cur_ic_page;
-	struct alpha_instr_call	*next_ic;
+	/*  PALcode specific:  */
+	uint64_t		wrvptptr;
+	uint64_t		sysvalue;
 
 
 	/*
-	 *  Virtual -> physical -> host address translation:
+	 *  Instruction translation cache and Virtual->Physical->Host
+	 *  address translation:
 	 */
-
-	struct alpha_vpg_tlb_entry vph_tlb_entry[ALPHA_MAX_VPH_TLB_ENTRIES];
-	struct alpha_vph_page	*vph_default_page;
-	struct alpha_vph_page	*vph_next_free_page;
-	struct alpha_vph_table	*vph_next_free_table;
-	struct alpha_vph_page	*vph_table0[ALPHA_LEVEL0];
-	struct alpha_vph_page	*vph_table0_kernel[ALPHA_LEVEL0];
+	DYNTRANS_ITC(alpha)
+	VPH_TLBS(alpha,ALPHA)
+	VPH64(alpha,ALPHA,uint8_t)
 };
 
 
 /*  cpu_alpha.c:  */
 void alpha_update_translation_table(struct cpu *cpu, uint64_t vaddr_page,
 	unsigned char *host_page, int writeflag, uint64_t paddr_page);
-void alpha_invalidate_translation_caches_paddr(struct cpu *cpu, uint64_t, int);
+void alpha_invalidate_translation_caches(struct cpu *cpu, uint64_t, int);
 void alpha_invalidate_code_translation(struct cpu *cpu, uint64_t, int);
+void alpha_init_64bit_dummy_tables(struct cpu *cpu);
 int alpha_memory_rw(struct cpu *cpu, struct memory *mem, uint64_t vaddr,
 	unsigned char *data, size_t len, int writeflag, int cache_flags);
 int alpha_userland_memory_rw(struct cpu *cpu, struct memory *mem,
@@ -169,5 +151,8 @@
 void alpha_palcode_name(uint32_t palcode, char *buf, size_t buflen);
 void alpha_palcode(struct cpu *cpu, uint32_t palcode);
 
+/*  memory_alpha.c:  */
+int alpha_translate_address(struct cpu *cpu, uint64_t vaddr,
+	uint64_t *return_addr, int flags);
 
 #endif	/*  CPU_ALPHA_H  */