--- trunk/src/include/cpu.h 2007/10/08 16:20:10 26 +++ trunk/src/include/cpu.h 2007/10/08 16:20:26 28 @@ -28,7 +28,7 @@ * SUCH DAMAGE. * * - * $Id: cpu.h,v 1.79 2006/06/25 00:27:36 debug Exp $ + * $Id: cpu.h,v 1.84 2006/07/20 21:53:00 debug Exp $ * * CPU-related definitions. */ @@ -54,6 +54,17 @@ * instruction can "nullify" (skip) the delay-slot. If the end-of-page * slot is skipped, then we end up one step after that. That's where the * end_of_page2 slot is. :) + * + * next_ofs points to the next page in a chain of possible pages. + * (several pages can be in the same chain, but only one matches the + * specific physaddr.) + * + * flags contains special flags. Currently only COMBINATIONS, which indicates + * that the page has instruction combinations. + * + * translations is a tiny bitmap indicating which parts of the page have + * actual translations. Bit 0 corresponds to the lowest 1/32th of the page, + * bit 1 to the second-lowest 1/32th, and so on. */ #define DYNTRANS_MISC_DECLARATIONS(arch,ARCH,addrtype) struct \ arch ## _instr_call { \ @@ -65,6 +76,7 @@ struct arch ## _tc_physpage { \ struct arch ## _instr_call ics[ARCH ## _IC_ENTRIES_PER_PAGE+2];\ uint32_t next_ofs; /* (0 for end of chain) */ \ + uint32_t translations; \ int flags; \ addrtype physaddr; \ }; \ @@ -148,9 +160,6 @@ * * phys_page points to translation cache physpages. * - * phystranslation is a bitmap which tells us whether a physical page has - * a code translation. - * * vaddr_to_tlbindex is a virtual address to tlb index hint table. * The values in this array are the tlb index plus 1, so a value of, say, * 3 means tlb index 2. A value of 0 would mean a tlb index of -1, which @@ -162,7 +171,6 @@ unsigned char *host_store[N_VPH32_ENTRIES]; \ paddrtype phys_addr[N_VPH32_ENTRIES]; \ struct arch ## _tc_physpage *phys_page[N_VPH32_ENTRIES]; \ - uint32_t phystranslation[N_VPH32_ENTRIES/32]; \ tlbindextype vaddr_to_tlbindex[N_VPH32_ENTRIES]; /* @@ -199,6 +207,7 @@ #include "cpu_ppc.h" #include "cpu_sh.h" #include "cpu_sparc.h" +#include "cpu_transputer.h" #include "cpu_x86.h" struct cpu; @@ -225,8 +234,6 @@ uint64_t dumpaddr); void (*register_dump)(struct cpu *cpu, int gprs, int coprocs); - int (*run_instr)(struct emul *emul, - struct cpu *cpu); void (*dumpinfo)(struct cpu *cpu); void (*tlbdump)(struct machine *m, int x, int rawflag); @@ -248,8 +255,7 @@ */ /* Physpage flags: */ -#define TRANSLATIONS 1 -#define COMBINATIONS 2 +#define COMBINATIONS 1 /* Meaning of delay_slot: */ #define NOT_DELAYED 0 @@ -260,7 +266,7 @@ #define N_SAFE_DYNTRANS_LIMIT_SHIFT 14 #define N_SAFE_DYNTRANS_LIMIT ((1 << (N_SAFE_DYNTRANS_LIMIT_SHIFT - 1)) - 1) -#define DYNTRANS_CACHE_SIZE (24*1048576) +#define DYNTRANS_CACHE_SIZE (32*1048576) #define DYNTRANS_CACHE_MARGIN 350000 #define N_BASE_TABLE_ENTRIES 32768 @@ -284,6 +290,8 @@ char *name; struct memory *mem; + + int (*run_instr)(struct cpu *cpu); int (*memory_rw)(struct cpu *cpu, struct memory *mem, uint64_t vaddr, unsigned char *data, size_t len, @@ -320,18 +328,19 @@ * CPU-family dependent: */ union { - struct alpha_cpu alpha; - struct arm_cpu arm; - struct avr_cpu avr; - struct hppa_cpu hppa; - struct i960_cpu i960; - struct ia64_cpu ia64; - struct m68k_cpu m68k; - struct mips_cpu mips; - struct ppc_cpu ppc; - struct sh_cpu sh; - struct sparc_cpu sparc; - struct x86_cpu x86; + struct alpha_cpu alpha; + struct arm_cpu arm; + struct avr_cpu avr; + struct hppa_cpu hppa; + struct i960_cpu i960; + struct ia64_cpu ia64; + struct m68k_cpu m68k; + struct mips_cpu mips; + struct ppc_cpu ppc; + struct sh_cpu sh; + struct sparc_cpu sparc; + struct transputer_cpu transputer; + struct x86_cpu x86; } cd; }; @@ -383,7 +392,6 @@ fp->functioncall_trace = n ## _cpu_functioncall_trace; \ fp->gdb_stub = n ## _cpu_gdb_stub; \ fp->tlbdump = n ## _cpu_tlbdump; \ - fp->run_instr = n ## _cpu_run_instr; \ fp->init_tables = n ## _cpu_init_tables; \ return 1; \ }