/[gxemul]/trunk/src/include/cpu.h
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revision 6 by dpavlin, Mon Oct 8 16:18:11 2007 UTC revision 22 by dpavlin, Mon Oct 8 16:19:37 2007 UTC
# Line 2  Line 2 
2  #define CPU_H  #define CPU_H
3    
4  /*  /*
5   *  Copyright (C) 2005  Anders Gavare.  All rights reserved.   *  Copyright (C) 2005-2006  Anders Gavare.  All rights reserved.
6   *   *
7   *  Redistribution and use in source and binary forms, with or without   *  Redistribution and use in source and binary forms, with or without
8   *  modification, are permitted provided that the following conditions are met:   *  modification, are permitted provided that the following conditions are met:
# Line 28  Line 28 
28   *  SUCH DAMAGE.   *  SUCH DAMAGE.
29   *   *
30   *   *
31   *  $Id: cpu.h,v 1.23 2005/06/02 00:08:43 debug Exp $   *  $Id: cpu.h,v 1.62 2006/02/09 22:40:27 debug Exp $
32   *   *
33   *  See cpu.c.   *  CPU-related definitions.
34   */   */
35    
36    
# Line 38  Line 38 
38  #include <inttypes.h>  #include <inttypes.h>
39  #include <sys/time.h>  #include <sys/time.h>
40    
41  /*  This is needed for undefining 'mips' or 'ppc', on weird systems:  */  /*  This is needed for undefining 'mips', 'ppc' etc. on weird systems:  */
42  #include "../../config.h"  #include "../../config.h"
43    
44    /*
45     *  Dyntrans misc declarations, used throughout the dyntrans code.
46     */
47    #define DYNTRANS_MISC_DECLARATIONS(arch,ARCH,addrtype)  struct \
48            arch ## _instr_call {                                   \
49                    void    (*f)(struct cpu *, struct arch ## _instr_call *); \
50                    size_t  arg[ARCH ## _N_IC_ARGS];                        \
51            };                                                              \
52                                                                            \
53            /*  Translation cache struct for each physical page:  */        \
54            struct arch ## _tc_physpage {                                   \
55                    struct arch ## _instr_call ics[ARCH ## _IC_ENTRIES_PER_PAGE+1];\
56                    uint32_t        next_ofs;       /*  (0 for end of chain)  */ \
57                    int             flags;                                  \
58                    addrtype        physaddr;                               \
59            };                                                              \
60                                                                            \
61            struct arch ## _vpg_tlb_entry {                                 \
62                    uint8_t         valid;                                  \
63                    uint8_t         writeflag;                              \
64                    addrtype        vaddr_page;                             \
65                    addrtype        paddr_page;                             \
66                    unsigned char   *host_page;                             \
67                    int64_t         timestamp;                              \
68            };
69    
70    /*
71     *  Dyntrans "Instruction Translation Cache":
72     *
73     *  cur_physpage is a pointer to the current physpage. (It _HAPPENS_ to
74     *  be the same as cur_ic_page, because all the instrcalls should be placed
75     *  first in the physpage struct!)
76     *
77     *  cur_ic_page is a pointer to an array of xxx_IC_ENTRIES_PER_PAGE
78     *  instruction call entries.
79     *
80     *  next_ic points to the next such instruction call to be executed.
81     *
82     *  combination_check, when set to non-NULL, is executed automatically after
83     *  an instruction has been translated. (It check for combinations of
84     *  instructions; low_addr is the offset of the translated instruction in the
85     *  current page, NOT shifted right.)
86     */
87    #define DYNTRANS_ITC(arch)      struct arch ## _tc_physpage *cur_physpage;  \
88                                    struct arch ## _instr_call  *cur_ic_page;   \
89                                    struct arch ## _instr_call  *next_ic;       \
90                                    void (*combination_check)(struct cpu *,     \
91                                        struct arch ## _instr_call *, int low_addr);
92    
93    /*
94     *  Virtual -> physical -> host address translation TLB entries:
95     *  ------------------------------------------------------------
96     *
97     *  Regardless of whether 32-bit or 64-bit address translation is used, the
98     *  same TLB entry structure is used.
99     */
100    #define VPH_TLBS(arch,ARCH)                                             \
101            struct arch ## _vpg_tlb_entry                                   \
102                vph_tlb_entry[ARCH ## _MAX_VPH_TLB_ENTRIES];
103    
104    /*
105     *  32-bit dyntrans emulated Virtual -> physical -> host address translation:
106     *  -------------------------------------------------------------------------
107     *
108     *  This stuff assumes that 4 KB pages are used. 20 bits to select a page
109     *  means just 1 M entries needed. This is small enough that a couple of
110     *  full-size tables can fit in virtual memory on modern hosts (both 32-bit
111     *  and 64-bit hosts). :-)
112     *
113     *  Usage: e.g. VPH32(arm,ARM,uint32_t,uint8_t)
114     *           or VPH32(sparc,SPARC,uint64_t,uint16_t)
115     *
116     *  The vph_tlb_entry entries are cpu dependent tlb entries.
117     *
118     *  The host_load and host_store entries point to host pages; the phys_addr
119     *  entries are uint32_t or uint64_t (emulated physical addresses).
120     *
121     *  phys_page points to translation cache physpages.
122     *
123     *  phystranslation is a bitmap which tells us whether a physical page has
124     *  a code translation.
125     *
126     *  vaddr_to_tlbindex is a virtual address to tlb index hint table.
127     *  The values in this array are the tlb index plus 1, so a value of, say,
128     *  3 means tlb index 2. A value of 0 would mean a tlb index of -1, which
129     *  is not a valid index. (I.e. no hit.)
130     */
131    #define N_VPH32_ENTRIES         1048576
132    #define VPH32(arch,ARCH,paddrtype,tlbindextype)                         \
133            unsigned char           *host_load[N_VPH32_ENTRIES];            \
134            unsigned char           *host_store[N_VPH32_ENTRIES];           \
135            paddrtype               phys_addr[N_VPH32_ENTRIES];             \
136            struct arch ## _tc_physpage  *phys_page[N_VPH32_ENTRIES];       \
137            uint32_t                phystranslation[N_VPH32_ENTRIES/32];    \
138            tlbindextype            vaddr_to_tlbindex[N_VPH32_ENTRIES];
139    
140    /*
141     *  64-bit dyntrans emulated Virtual -> physical -> host address translation:
142     *  -------------------------------------------------------------------------
143     *
144     *  Usage: e.g. VPH64(alpha,ALPHA,uint8_t)
145     *           or VPH64(sparc,SPARC,uint16_t)
146     *
147     *  TODO
148     */
149    #define VPH64(arch,ARCH,tlbindextype)                   \
150            int dummy;
151    
152  #include "cpu_alpha.h"  #include "cpu_alpha.h"
153  #include "cpu_arm.h"  #include "cpu_arm.h"
154    #include "cpu_avr.h"
155  #include "cpu_hppa.h"  #include "cpu_hppa.h"
156    #include "cpu_i960.h"
157    #include "cpu_ia64.h"
158    #include "cpu_m68k.h"
159  #include "cpu_mips.h"  #include "cpu_mips.h"
160  #include "cpu_ppc.h"  #include "cpu_ppc.h"
161    #include "cpu_sh.h"
162  #include "cpu_sparc.h"  #include "cpu_sparc.h"
 #include "cpu_urisc.h"  
163  #include "cpu_x86.h"  #include "cpu_x86.h"
164    
165  struct cpu;  struct cpu;
# Line 62  struct cpu_family { Line 174  struct cpu_family {
174    
175          /*  These are filled in by each CPU family's init function:  */          /*  These are filled in by each CPU family's init function:  */
176          char                    *name;          char                    *name;
177          struct cpu              *(*cpu_new)(struct memory *mem,          int                     (*cpu_new)(struct cpu *cpu, struct memory *mem,
178                                      struct machine *machine,                                      struct machine *machine,
179                                      int cpu_id, char *cpu_type_name);                                      int cpu_id, char *cpu_type_name);
180          void                    (*list_available_types)(void);          void                    (*list_available_types)(void);
# Line 83  struct cpu_family { Line 195  struct cpu_family {
195          int                     (*interrupt)(struct cpu *cpu, uint64_t irq_nr);          int                     (*interrupt)(struct cpu *cpu, uint64_t irq_nr);
196          int                     (*interrupt_ack)(struct cpu *cpu,          int                     (*interrupt_ack)(struct cpu *cpu,
197                                      uint64_t irq_nr);                                      uint64_t irq_nr);
198            void                    (*functioncall_trace)(struct cpu *,
199                                        uint64_t f, int n_args);
200    };
201    
202    
203    /*
204     *  More dyntrans stuff:
205     *
206     *  The translation cache begins with N_BASE_TABLE_ENTRIES uint32_t offsets
207     *  into the cache, for possible translation cache structs for physical pages.
208     */
209    
210    /*  Physpage flags:  */
211    #define TRANSLATIONS                    1
212    #define COMBINATIONS                    2
213    
214    #define DYNTRANS_CACHE_SIZE             (16*1048576)
215    #define DYNTRANS_CACHE_MARGIN           300000
216    
217    #define N_BASE_TABLE_ENTRIES            32768
218    #define PAGENR_TO_TABLE_INDEX(a)        ((a) & (N_BASE_TABLE_ENTRIES-1))
219    
220    
221    #ifdef DYNTRANS_BACKEND
222    
223    /*  TODO: convert this into a fixed-size array? Might increase performace.  */
224    struct dtb_fixup {
225            struct dtb_fixup        *next;
226            int                     type;   /*  Fixup type [optional]  */
227            void                    *addr;  /*  Address of the instruction
228                                                (in host memory)  */
229            size_t                  data;   /*  Emulation data.  */
230  };  };
231    
232    struct translation_context {
233            /*  Current address of where to emit host instructions:  */
234            /*  (NULL means no translation is currently being done.)  */
235            void                    *p;
236    
237            /*  index of the instr_call of the first translated instruction:  */
238            void                    *ic_page;
239            int                     start_instr_call_index;
240    
241            /*  Fixups needed after first translation pass:  */
242            struct dtb_fixup        *fixups;
243    
244            int                     n_simple;
245    
246            /*  translation_buffer should have room for max_size bytes,
247                plus some margin.  */
248            unsigned char           *translation_buffer;
249            size_t                  cur_size;
250    };
251    
252    #define DTB_TRANSLATION_SIZE_MAX        3072
253    #define DTB_TRANSLATION_SIZE_MARGIN     1024
254    
255    void cpu_dtb_add_fixup(struct cpu *cpu, int type, void *addr, size_t data);
256    void cpu_dtb_do_fixups(struct cpu *cpu);
257    
258    void dtb_host_cacheinvalidate(void *p, size_t len);
259    int dtb_function_prologue(struct translation_context *ctx, size_t *sizep);
260    int dtb_function_epilogue(struct translation_context *ctx, size_t *sizep);
261    int dtb_generate_fcall(struct cpu *cpu, struct translation_context *ctx,
262            size_t *sizep, size_t f, size_t instr_call_ptr);
263    int dtb_generate_ptr_inc(struct cpu *cpu, struct translation_context *ctx,
264            size_t *sizep, void *ptr, int amount);
265    
266    #endif  /*  DYNTRANS_BACKEND  */
267    
268    
269    
270    /*
271     *  The generic CPU struct:
272     */
273    
274  struct cpu {  struct cpu {
275          /*  Pointer back to the machine this CPU is in:  */          /*  Pointer back to the machine this CPU is in:  */
# Line 95  struct cpu { Line 280  struct cpu {
280          int             dead;          int             dead;
281          int             bootstrap_cpu_flag;          int             bootstrap_cpu_flag;
282          int             cpu_id;          int             cpu_id;
283            int             is_32bit;       /*  0 for 64-bit, 1 for 32-bit  */
284          char            *name;          char            *name;
285    
286          struct memory   *mem;          struct memory   *mem;
# Line 104  struct cpu { Line 290  struct cpu {
290                              int writeflag, int cache_flags);                              int writeflag, int cache_flags);
291          int             (*translate_address)(struct cpu *, uint64_t vaddr,          int             (*translate_address)(struct cpu *, uint64_t vaddr,
292                              uint64_t *return_addr, int flags);                              uint64_t *return_addr, int flags);
293          void            (*useremul_syscall)(struct cpu *cpu,          void            (*update_translation_table)(struct cpu *,
294                              uint32_t code);                              uint64_t vaddr_page, unsigned char *host_page,
295                                int writeflag, uint64_t paddr_page);
296            void            (*invalidate_translation_caches)(struct cpu *,
297                                uint64_t paddr, int flags);
298            void            (*invalidate_code_translation)(struct cpu *,
299                                uint64_t paddr, int flags);
300            void            (*useremul_syscall)(struct cpu *cpu, uint32_t code);
301    
         /*  Things that all CPU families have:  */  
302          uint64_t        pc;          uint64_t        pc;
303    
304          /*  CPU-family dependant:  */  #ifdef TRACE_NULL_CRASHES
305            /*  TODO: remove this, it's MIPS only  */
306            int             trace_null_index;
307            uint64_t        trace_null_addr[TRACE_NULL_N_ENTRIES];
308    #endif  
309    
310            int             trace_tree_depth;
311    
312            /*
313             *  Dynamic translation:
314             */
315            int             running_translated;
316            int             n_translated_instrs;
317            unsigned char   *translation_cache;
318            size_t          translation_cache_cur_ofs;
319    #ifdef DYNTRANS_BACKEND
320            struct translation_context translation_context;
321    #endif
322    
323            /*
324             *  CPU-family dependent:
325             */
326          union {          union {
327                  struct alpha_cpu   alpha;                  struct alpha_cpu   alpha;
328                  struct arm_cpu     arm;                  struct arm_cpu     arm;
329                    struct avr_cpu     avr;
330                  struct hppa_cpu    hppa;                  struct hppa_cpu    hppa;
331                    struct i960_cpu    i960;
332                    struct ia64_cpu    ia64;
333                    struct m68k_cpu    m68k;
334                  struct mips_cpu    mips;                  struct mips_cpu    mips;
335                  struct ppc_cpu     ppc;                  struct ppc_cpu     ppc;
336                    struct sh_cpu      sh;
337                  struct sparc_cpu   sparc;                  struct sparc_cpu   sparc;
                 struct urisc_cpu   urisc;  
338                  struct x86_cpu     x86;                  struct x86_cpu     x86;
339          } cd;          } cd;
340  };  };
# Line 137  int cpu_disassemble_instr(struct machine Line 353  int cpu_disassemble_instr(struct machine
353          unsigned char *instr, int running, uint64_t addr, int bintrans);          unsigned char *instr, int running, uint64_t addr, int bintrans);
354  int cpu_interrupt(struct cpu *cpu, uint64_t irq_nr);  int cpu_interrupt(struct cpu *cpu, uint64_t irq_nr);
355  int cpu_interrupt_ack(struct cpu *cpu, uint64_t irq_nr);  int cpu_interrupt_ack(struct cpu *cpu, uint64_t irq_nr);
356  void cpu_run_init(struct emul *emul, struct machine *machine);  void cpu_functioncall_trace(struct cpu *cpu, uint64_t f);
357    void cpu_functioncall_trace_return(struct cpu *cpu);
358    void cpu_create_or_reset_tc(struct cpu *cpu);
359    void cpu_run_init(struct machine *machine);
360  int cpu_run(struct emul *emul, struct machine *machine);  int cpu_run(struct emul *emul, struct machine *machine);
361  void cpu_run_deinit(struct emul *emul, struct machine *machine);  void cpu_run_deinit(struct machine *machine);
362  void cpu_dumpinfo(struct machine *m, struct cpu *cpu);  void cpu_dumpinfo(struct machine *m, struct cpu *cpu);
363  void cpu_list_available_types(void);  void cpu_list_available_types(void);
364  void cpu_show_cycles(struct machine *machine,  void cpu_show_cycles(struct machine *machine, int forced);
         struct timeval *starttime, int64_t ncycles, int forced);  
365  struct cpu_family *cpu_family_ptr_by_number(int arch);  struct cpu_family *cpu_family_ptr_by_number(int arch);
366  void cpu_init(void);  void cpu_init(void);
367    
368    
369    #define JUST_MARK_AS_NON_WRITABLE       1
370    #define INVALIDATE_ALL                  2
371    #define INVALIDATE_PADDR                4
372    #define INVALIDATE_VADDR                8
373    #define INVALIDATE_VADDR_UPPER4         16      /*  useful for PPC emulation  */
374    
375    #define TLB_CODE                        0x02
376    
377    
378    #define CPU_FAMILY_INIT(n,s)    int n ## _cpu_family_init(              \
379            struct cpu_family *fp) {                                        \
380            /*  Fill in the cpu_family struct with valid data for this arch.  */ \
381            fp->name = s;                                                   \
382            fp->cpu_new = n ## _cpu_new;                                    \
383            fp->list_available_types = n ## _cpu_list_available_types;      \
384            fp->register_match = n ## _cpu_register_match;                  \
385            fp->disassemble_instr = n ## _cpu_disassemble_instr;            \
386            fp->register_dump = n ## _cpu_register_dump;                    \
387            fp->run = n ## _cpu_run;                                        \
388            fp->dumpinfo = n ## _cpu_dumpinfo;                              \
389            fp->interrupt = n ## _cpu_interrupt;                            \
390            fp->interrupt_ack = n ## _cpu_interrupt_ack;                    \
391            fp->functioncall_trace = n ## _cpu_functioncall_trace;          \
392            return 1;                                                       \
393            }
394    
395    #define CPU_OLD_FAMILY_INIT(n,s)        int n ## _cpu_family_init(      \
396            struct cpu_family *fp) {                                        \
397            /*  Fill in the cpu_family struct with valid data for this arch.  */ \
398            fp->name = s;                                                   \
399            fp->cpu_new = n ## _cpu_new;                                    \
400            fp->list_available_types = n ## _cpu_list_available_types;      \
401            fp->register_match = n ## _cpu_register_match;                  \
402            fp->disassemble_instr = n ## _cpu_disassemble_instr;            \
403            fp->register_dump = n ## _cpu_register_dump;                    \
404            fp->run = n ## _OLD_cpu_run;                                    \
405            fp->dumpinfo = n ## _cpu_dumpinfo;                              \
406            fp->show_full_statistics = n ## _cpu_show_full_statistics;      \
407            fp->tlbdump = n ## _cpu_tlbdump;                                \
408            fp->interrupt = n ## _cpu_interrupt;                            \
409            fp->interrupt_ack = n ## _cpu_interrupt_ack;                    \
410            fp->functioncall_trace = n ## _cpu_functioncall_trace;          \
411            return 1;                                                       \
412            }
413    
414    
415  #endif  /*  CPU_H  */  #endif  /*  CPU_H  */
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