28 |
* SUCH DAMAGE. |
* SUCH DAMAGE. |
29 |
* |
* |
30 |
* |
* |
31 |
* $Id: cpu.h,v 1.62 2006/02/09 22:40:27 debug Exp $ |
* $Id: cpu.h,v 1.84 2006/07/20 21:53:00 debug Exp $ |
32 |
* |
* |
33 |
* CPU-related definitions. |
* CPU-related definitions. |
34 |
*/ |
*/ |
43 |
|
|
44 |
/* |
/* |
45 |
* Dyntrans misc declarations, used throughout the dyntrans code. |
* Dyntrans misc declarations, used throughout the dyntrans code. |
46 |
|
* |
47 |
|
* Note that there is place for all instruction calls within a page, |
48 |
|
* and then 2 more. The first one of these "extra" instruction slots is |
49 |
|
* the end-of-page slot. It transfers control to the first instruction |
50 |
|
* slot on the next (virtual) page. |
51 |
|
* |
52 |
|
* The second of these extra instruction slots is an additional |
53 |
|
* end-of-page slot for delay-slot architectures. On e.g. MIPS, a branch |
54 |
|
* instruction can "nullify" (skip) the delay-slot. If the end-of-page |
55 |
|
* slot is skipped, then we end up one step after that. That's where the |
56 |
|
* end_of_page2 slot is. :) |
57 |
|
* |
58 |
|
* next_ofs points to the next page in a chain of possible pages. |
59 |
|
* (several pages can be in the same chain, but only one matches the |
60 |
|
* specific physaddr.) |
61 |
|
* |
62 |
|
* flags contains special flags. Currently only COMBINATIONS, which indicates |
63 |
|
* that the page has instruction combinations. |
64 |
|
* |
65 |
|
* translations is a tiny bitmap indicating which parts of the page have |
66 |
|
* actual translations. Bit 0 corresponds to the lowest 1/32th of the page, |
67 |
|
* bit 1 to the second-lowest 1/32th, and so on. |
68 |
*/ |
*/ |
69 |
#define DYNTRANS_MISC_DECLARATIONS(arch,ARCH,addrtype) struct \ |
#define DYNTRANS_MISC_DECLARATIONS(arch,ARCH,addrtype) struct \ |
70 |
arch ## _instr_call { \ |
arch ## _instr_call { \ |
74 |
\ |
\ |
75 |
/* Translation cache struct for each physical page: */ \ |
/* Translation cache struct for each physical page: */ \ |
76 |
struct arch ## _tc_physpage { \ |
struct arch ## _tc_physpage { \ |
77 |
struct arch ## _instr_call ics[ARCH ## _IC_ENTRIES_PER_PAGE+1];\ |
struct arch ## _instr_call ics[ARCH ## _IC_ENTRIES_PER_PAGE+2];\ |
78 |
uint32_t next_ofs; /* (0 for end of chain) */ \ |
uint32_t next_ofs; /* (0 for end of chain) */ \ |
79 |
|
uint32_t translations; \ |
80 |
int flags; \ |
int flags; \ |
81 |
addrtype physaddr; \ |
addrtype physaddr; \ |
82 |
}; \ |
}; \ |
90 |
int64_t timestamp; \ |
int64_t timestamp; \ |
91 |
}; |
}; |
92 |
|
|
93 |
|
#define DYNTRANS_MISC64_DECLARATIONS(arch,ARCH,tlbindextype) \ |
94 |
|
struct arch ## _l3_64_table { \ |
95 |
|
unsigned char *host_load[1 << ARCH ## _L3N]; \ |
96 |
|
unsigned char *host_store[1 << ARCH ## _L3N]; \ |
97 |
|
uint64_t phys_addr[1 << ARCH ## _L3N]; \ |
98 |
|
tlbindextype vaddr_to_tlbindex[1 << ARCH ## _L3N]; \ |
99 |
|
struct arch ## _tc_physpage *phys_page[1 << ARCH ## _L3N]; \ |
100 |
|
struct arch ## _l3_64_table *next; \ |
101 |
|
int refcount; \ |
102 |
|
}; \ |
103 |
|
struct arch ## _l2_64_table { \ |
104 |
|
struct arch ## _l3_64_table *l3[1 << ARCH ## _L2N]; \ |
105 |
|
struct arch ## _l2_64_table *next; \ |
106 |
|
int refcount; \ |
107 |
|
}; |
108 |
|
|
109 |
/* |
/* |
110 |
* Dyntrans "Instruction Translation Cache": |
* Dyntrans "Instruction Translation Cache": |
111 |
* |
* |
126 |
#define DYNTRANS_ITC(arch) struct arch ## _tc_physpage *cur_physpage; \ |
#define DYNTRANS_ITC(arch) struct arch ## _tc_physpage *cur_physpage; \ |
127 |
struct arch ## _instr_call *cur_ic_page; \ |
struct arch ## _instr_call *cur_ic_page; \ |
128 |
struct arch ## _instr_call *next_ic; \ |
struct arch ## _instr_call *next_ic; \ |
129 |
|
struct arch ## _tc_physpage *physpage_template;\ |
130 |
void (*combination_check)(struct cpu *, \ |
void (*combination_check)(struct cpu *, \ |
131 |
struct arch ## _instr_call *, int low_addr); |
struct arch ## _instr_call *, int low_addr); |
132 |
|
|
160 |
* |
* |
161 |
* phys_page points to translation cache physpages. |
* phys_page points to translation cache physpages. |
162 |
* |
* |
|
* phystranslation is a bitmap which tells us whether a physical page has |
|
|
* a code translation. |
|
|
* |
|
163 |
* vaddr_to_tlbindex is a virtual address to tlb index hint table. |
* vaddr_to_tlbindex is a virtual address to tlb index hint table. |
164 |
* The values in this array are the tlb index plus 1, so a value of, say, |
* The values in this array are the tlb index plus 1, so a value of, say, |
165 |
* 3 means tlb index 2. A value of 0 would mean a tlb index of -1, which |
* 3 means tlb index 2. A value of 0 would mean a tlb index of -1, which |
171 |
unsigned char *host_store[N_VPH32_ENTRIES]; \ |
unsigned char *host_store[N_VPH32_ENTRIES]; \ |
172 |
paddrtype phys_addr[N_VPH32_ENTRIES]; \ |
paddrtype phys_addr[N_VPH32_ENTRIES]; \ |
173 |
struct arch ## _tc_physpage *phys_page[N_VPH32_ENTRIES]; \ |
struct arch ## _tc_physpage *phys_page[N_VPH32_ENTRIES]; \ |
|
uint32_t phystranslation[N_VPH32_ENTRIES/32]; \ |
|
174 |
tlbindextype vaddr_to_tlbindex[N_VPH32_ENTRIES]; |
tlbindextype vaddr_to_tlbindex[N_VPH32_ENTRIES]; |
175 |
|
|
176 |
/* |
/* |
180 |
* Usage: e.g. VPH64(alpha,ALPHA,uint8_t) |
* Usage: e.g. VPH64(alpha,ALPHA,uint8_t) |
181 |
* or VPH64(sparc,SPARC,uint16_t) |
* or VPH64(sparc,SPARC,uint16_t) |
182 |
* |
* |
183 |
* TODO |
* l1_64 is an array containing poiners to l2 tables. |
184 |
|
* |
185 |
|
* l2_64_dummy is a pointer to a "dummy l2 table". Instead of having NULL |
186 |
|
* pointers in l1_64 for unused slots, a pointer to the dummy table can be |
187 |
|
* used. |
188 |
*/ |
*/ |
189 |
#define VPH64(arch,ARCH,tlbindextype) \ |
#define DYNTRANS_L1N 17 |
190 |
int dummy; |
#define VPH64(arch,ARCH,tlbindextype) \ |
191 |
|
struct arch ## _l3_64_table *l3_64_dummy; \ |
192 |
|
struct arch ## _l3_64_table *next_free_l3; \ |
193 |
|
struct arch ## _l2_64_table *l2_64_dummy; \ |
194 |
|
struct arch ## _l2_64_table *next_free_l2; \ |
195 |
|
struct arch ## _l2_64_table *l1_64[1 << DYNTRANS_L1N]; |
196 |
|
|
197 |
|
|
198 |
|
/* Include all CPUs' header files here: */ |
199 |
#include "cpu_alpha.h" |
#include "cpu_alpha.h" |
200 |
#include "cpu_arm.h" |
#include "cpu_arm.h" |
201 |
#include "cpu_avr.h" |
#include "cpu_avr.h" |
207 |
#include "cpu_ppc.h" |
#include "cpu_ppc.h" |
208 |
#include "cpu_sh.h" |
#include "cpu_sh.h" |
209 |
#include "cpu_sparc.h" |
#include "cpu_sparc.h" |
210 |
|
#include "cpu_transputer.h" |
211 |
#include "cpu_x86.h" |
#include "cpu_x86.h" |
212 |
|
|
213 |
struct cpu; |
struct cpu; |
231 |
uint64_t *valuep, int *match_register); |
uint64_t *valuep, int *match_register); |
232 |
int (*disassemble_instr)(struct cpu *cpu, |
int (*disassemble_instr)(struct cpu *cpu, |
233 |
unsigned char *instr, int running, |
unsigned char *instr, int running, |
234 |
uint64_t dumpaddr, int bintrans); |
uint64_t dumpaddr); |
235 |
void (*register_dump)(struct cpu *cpu, |
void (*register_dump)(struct cpu *cpu, |
236 |
int gprs, int coprocs); |
int gprs, int coprocs); |
|
int (*run)(struct emul *emul, |
|
|
struct machine *machine); |
|
237 |
void (*dumpinfo)(struct cpu *cpu); |
void (*dumpinfo)(struct cpu *cpu); |
|
void (*show_full_statistics)(struct machine *m); |
|
238 |
void (*tlbdump)(struct machine *m, int x, |
void (*tlbdump)(struct machine *m, int x, |
239 |
int rawflag); |
int rawflag); |
240 |
int (*interrupt)(struct cpu *cpu, uint64_t irq_nr); |
int (*interrupt)(struct cpu *cpu, uint64_t irq_nr); |
242 |
uint64_t irq_nr); |
uint64_t irq_nr); |
243 |
void (*functioncall_trace)(struct cpu *, |
void (*functioncall_trace)(struct cpu *, |
244 |
uint64_t f, int n_args); |
uint64_t f, int n_args); |
245 |
|
char *(*gdb_stub)(struct cpu *, char *cmd); |
246 |
|
void (*init_tables)(struct cpu *cpu); |
247 |
}; |
}; |
248 |
|
|
249 |
|
|
255 |
*/ |
*/ |
256 |
|
|
257 |
/* Physpage flags: */ |
/* Physpage flags: */ |
258 |
#define TRANSLATIONS 1 |
#define COMBINATIONS 1 |
|
#define COMBINATIONS 2 |
|
|
|
|
|
#define DYNTRANS_CACHE_SIZE (16*1048576) |
|
|
#define DYNTRANS_CACHE_MARGIN 300000 |
|
|
|
|
|
#define N_BASE_TABLE_ENTRIES 32768 |
|
|
#define PAGENR_TO_TABLE_INDEX(a) ((a) & (N_BASE_TABLE_ENTRIES-1)) |
|
|
|
|
|
|
|
|
#ifdef DYNTRANS_BACKEND |
|
|
|
|
|
/* TODO: convert this into a fixed-size array? Might increase performace. */ |
|
|
struct dtb_fixup { |
|
|
struct dtb_fixup *next; |
|
|
int type; /* Fixup type [optional] */ |
|
|
void *addr; /* Address of the instruction |
|
|
(in host memory) */ |
|
|
size_t data; /* Emulation data. */ |
|
|
}; |
|
259 |
|
|
260 |
struct translation_context { |
/* Meaning of delay_slot: */ |
261 |
/* Current address of where to emit host instructions: */ |
#define NOT_DELAYED 0 |
262 |
/* (NULL means no translation is currently being done.) */ |
#define DELAYED 1 |
263 |
void *p; |
#define TO_BE_DELAYED 2 |
264 |
|
#define EXCEPTION_IN_DELAY_SLOT 0x100 |
|
/* index of the instr_call of the first translated instruction: */ |
|
|
void *ic_page; |
|
|
int start_instr_call_index; |
|
|
|
|
|
/* Fixups needed after first translation pass: */ |
|
|
struct dtb_fixup *fixups; |
|
|
|
|
|
int n_simple; |
|
|
|
|
|
/* translation_buffer should have room for max_size bytes, |
|
|
plus some margin. */ |
|
|
unsigned char *translation_buffer; |
|
|
size_t cur_size; |
|
|
}; |
|
|
|
|
|
#define DTB_TRANSLATION_SIZE_MAX 3072 |
|
|
#define DTB_TRANSLATION_SIZE_MARGIN 1024 |
|
|
|
|
|
void cpu_dtb_add_fixup(struct cpu *cpu, int type, void *addr, size_t data); |
|
|
void cpu_dtb_do_fixups(struct cpu *cpu); |
|
265 |
|
|
266 |
void dtb_host_cacheinvalidate(void *p, size_t len); |
#define N_SAFE_DYNTRANS_LIMIT_SHIFT 14 |
267 |
int dtb_function_prologue(struct translation_context *ctx, size_t *sizep); |
#define N_SAFE_DYNTRANS_LIMIT ((1 << (N_SAFE_DYNTRANS_LIMIT_SHIFT - 1)) - 1) |
|
int dtb_function_epilogue(struct translation_context *ctx, size_t *sizep); |
|
|
int dtb_generate_fcall(struct cpu *cpu, struct translation_context *ctx, |
|
|
size_t *sizep, size_t f, size_t instr_call_ptr); |
|
|
int dtb_generate_ptr_inc(struct cpu *cpu, struct translation_context *ctx, |
|
|
size_t *sizep, void *ptr, int amount); |
|
268 |
|
|
269 |
#endif /* DYNTRANS_BACKEND */ |
#define DYNTRANS_CACHE_SIZE (32*1048576) |
270 |
|
#define DYNTRANS_CACHE_MARGIN 350000 |
271 |
|
|
272 |
|
#define N_BASE_TABLE_ENTRIES 32768 |
273 |
|
#define PAGENR_TO_TABLE_INDEX(a) ((a) & (N_BASE_TABLE_ENTRIES-1)) |
274 |
|
|
275 |
|
|
276 |
/* |
/* |
290 |
char *name; |
char *name; |
291 |
|
|
292 |
struct memory *mem; |
struct memory *mem; |
293 |
|
|
294 |
|
int (*run_instr)(struct cpu *cpu); |
295 |
int (*memory_rw)(struct cpu *cpu, |
int (*memory_rw)(struct cpu *cpu, |
296 |
struct memory *mem, uint64_t vaddr, |
struct memory *mem, uint64_t vaddr, |
297 |
unsigned char *data, size_t len, |
unsigned char *data, size_t len, |
298 |
int writeflag, int cache_flags); |
int writeflag, int cache_flags); |
299 |
int (*translate_address)(struct cpu *, uint64_t vaddr, |
int (*translate_v2p)(struct cpu *, uint64_t vaddr, |
300 |
uint64_t *return_addr, int flags); |
uint64_t *return_paddr, int flags); |
301 |
void (*update_translation_table)(struct cpu *, |
void (*update_translation_table)(struct cpu *, |
302 |
uint64_t vaddr_page, unsigned char *host_page, |
uint64_t vaddr_page, unsigned char *host_page, |
303 |
int writeflag, uint64_t paddr_page); |
int writeflag, uint64_t paddr_page); |
306 |
void (*invalidate_code_translation)(struct cpu *, |
void (*invalidate_code_translation)(struct cpu *, |
307 |
uint64_t paddr, int flags); |
uint64_t paddr, int flags); |
308 |
void (*useremul_syscall)(struct cpu *cpu, uint32_t code); |
void (*useremul_syscall)(struct cpu *cpu, uint32_t code); |
309 |
|
int (*instruction_has_delayslot)(struct cpu *cpu, |
310 |
|
unsigned char *ib); |
311 |
|
|
312 |
uint64_t pc; |
uint64_t pc; |
313 |
|
|
|
#ifdef TRACE_NULL_CRASHES |
|
|
/* TODO: remove this, it's MIPS only */ |
|
|
int trace_null_index; |
|
|
uint64_t trace_null_addr[TRACE_NULL_N_ENTRIES]; |
|
|
#endif |
|
|
|
|
314 |
int trace_tree_depth; |
int trace_tree_depth; |
315 |
|
|
316 |
/* |
/* |
320 |
int n_translated_instrs; |
int n_translated_instrs; |
321 |
unsigned char *translation_cache; |
unsigned char *translation_cache; |
322 |
size_t translation_cache_cur_ofs; |
size_t translation_cache_cur_ofs; |
323 |
#ifdef DYNTRANS_BACKEND |
|
324 |
struct translation_context translation_context; |
uint64_t delay_jmpaddr; /* only used if delay_slot > 0 */ |
325 |
#endif |
int delay_slot; |
326 |
|
|
327 |
/* |
/* |
328 |
* CPU-family dependent: |
* CPU-family dependent: |
329 |
*/ |
*/ |
330 |
union { |
union { |
331 |
struct alpha_cpu alpha; |
struct alpha_cpu alpha; |
332 |
struct arm_cpu arm; |
struct arm_cpu arm; |
333 |
struct avr_cpu avr; |
struct avr_cpu avr; |
334 |
struct hppa_cpu hppa; |
struct hppa_cpu hppa; |
335 |
struct i960_cpu i960; |
struct i960_cpu i960; |
336 |
struct ia64_cpu ia64; |
struct ia64_cpu ia64; |
337 |
struct m68k_cpu m68k; |
struct m68k_cpu m68k; |
338 |
struct mips_cpu mips; |
struct mips_cpu mips; |
339 |
struct ppc_cpu ppc; |
struct ppc_cpu ppc; |
340 |
struct sh_cpu sh; |
struct sh_cpu sh; |
341 |
struct sparc_cpu sparc; |
struct sparc_cpu sparc; |
342 |
struct x86_cpu x86; |
struct transputer_cpu transputer; |
343 |
|
struct x86_cpu x86; |
344 |
} cd; |
} cd; |
345 |
}; |
}; |
346 |
|
|
348 |
/* cpu.c: */ |
/* cpu.c: */ |
349 |
struct cpu *cpu_new(struct memory *mem, struct machine *machine, |
struct cpu *cpu_new(struct memory *mem, struct machine *machine, |
350 |
int cpu_id, char *cpu_type_name); |
int cpu_id, char *cpu_type_name); |
|
void cpu_show_full_statistics(struct machine *m); |
|
351 |
void cpu_tlbdump(struct machine *m, int x, int rawflag); |
void cpu_tlbdump(struct machine *m, int x, int rawflag); |
352 |
void cpu_register_match(struct machine *m, char *name, |
void cpu_register_match(struct machine *m, char *name, |
353 |
int writeflag, uint64_t *valuep, int *match_register); |
int writeflag, uint64_t *valuep, int *match_register); |
354 |
void cpu_register_dump(struct machine *m, struct cpu *cpu, |
void cpu_register_dump(struct machine *m, struct cpu *cpu, |
355 |
int gprs, int coprocs); |
int gprs, int coprocs); |
356 |
int cpu_disassemble_instr(struct machine *m, struct cpu *cpu, |
int cpu_disassemble_instr(struct machine *m, struct cpu *cpu, |
357 |
unsigned char *instr, int running, uint64_t addr, int bintrans); |
unsigned char *instr, int running, uint64_t addr); |
358 |
|
char *cpu_gdb_stub(struct cpu *cpu, char *cmd); |
359 |
int cpu_interrupt(struct cpu *cpu, uint64_t irq_nr); |
int cpu_interrupt(struct cpu *cpu, uint64_t irq_nr); |
360 |
int cpu_interrupt_ack(struct cpu *cpu, uint64_t irq_nr); |
int cpu_interrupt_ack(struct cpu *cpu, uint64_t irq_nr); |
361 |
void cpu_functioncall_trace(struct cpu *cpu, uint64_t f); |
void cpu_functioncall_trace(struct cpu *cpu, uint64_t f); |
362 |
void cpu_functioncall_trace_return(struct cpu *cpu); |
void cpu_functioncall_trace_return(struct cpu *cpu); |
363 |
void cpu_create_or_reset_tc(struct cpu *cpu); |
void cpu_create_or_reset_tc(struct cpu *cpu); |
364 |
void cpu_run_init(struct machine *machine); |
void cpu_run_init(struct machine *machine); |
|
int cpu_run(struct emul *emul, struct machine *machine); |
|
365 |
void cpu_run_deinit(struct machine *machine); |
void cpu_run_deinit(struct machine *machine); |
366 |
void cpu_dumpinfo(struct machine *m, struct cpu *cpu); |
void cpu_dumpinfo(struct machine *m, struct cpu *cpu); |
367 |
void cpu_list_available_types(void); |
void cpu_list_available_types(void); |
376 |
#define INVALIDATE_VADDR 8 |
#define INVALIDATE_VADDR 8 |
377 |
#define INVALIDATE_VADDR_UPPER4 16 /* useful for PPC emulation */ |
#define INVALIDATE_VADDR_UPPER4 16 /* useful for PPC emulation */ |
378 |
|
|
|
#define TLB_CODE 0x02 |
|
|
|
|
379 |
|
|
380 |
#define CPU_FAMILY_INIT(n,s) int n ## _cpu_family_init( \ |
#define CPU_FAMILY_INIT(n,s) int n ## _cpu_family_init( \ |
381 |
struct cpu_family *fp) { \ |
struct cpu_family *fp) { \ |
386 |
fp->register_match = n ## _cpu_register_match; \ |
fp->register_match = n ## _cpu_register_match; \ |
387 |
fp->disassemble_instr = n ## _cpu_disassemble_instr; \ |
fp->disassemble_instr = n ## _cpu_disassemble_instr; \ |
388 |
fp->register_dump = n ## _cpu_register_dump; \ |
fp->register_dump = n ## _cpu_register_dump; \ |
|
fp->run = n ## _cpu_run; \ |
|
389 |
fp->dumpinfo = n ## _cpu_dumpinfo; \ |
fp->dumpinfo = n ## _cpu_dumpinfo; \ |
390 |
fp->interrupt = n ## _cpu_interrupt; \ |
fp->interrupt = n ## _cpu_interrupt; \ |
391 |
fp->interrupt_ack = n ## _cpu_interrupt_ack; \ |
fp->interrupt_ack = n ## _cpu_interrupt_ack; \ |
392 |
fp->functioncall_trace = n ## _cpu_functioncall_trace; \ |
fp->functioncall_trace = n ## _cpu_functioncall_trace; \ |
393 |
return 1; \ |
fp->gdb_stub = n ## _cpu_gdb_stub; \ |
|
} |
|
|
|
|
|
#define CPU_OLD_FAMILY_INIT(n,s) int n ## _cpu_family_init( \ |
|
|
struct cpu_family *fp) { \ |
|
|
/* Fill in the cpu_family struct with valid data for this arch. */ \ |
|
|
fp->name = s; \ |
|
|
fp->cpu_new = n ## _cpu_new; \ |
|
|
fp->list_available_types = n ## _cpu_list_available_types; \ |
|
|
fp->register_match = n ## _cpu_register_match; \ |
|
|
fp->disassemble_instr = n ## _cpu_disassemble_instr; \ |
|
|
fp->register_dump = n ## _cpu_register_dump; \ |
|
|
fp->run = n ## _OLD_cpu_run; \ |
|
|
fp->dumpinfo = n ## _cpu_dumpinfo; \ |
|
|
fp->show_full_statistics = n ## _cpu_show_full_statistics; \ |
|
394 |
fp->tlbdump = n ## _cpu_tlbdump; \ |
fp->tlbdump = n ## _cpu_tlbdump; \ |
395 |
fp->interrupt = n ## _cpu_interrupt; \ |
fp->init_tables = n ## _cpu_init_tables; \ |
|
fp->interrupt_ack = n ## _cpu_interrupt_ack; \ |
|
|
fp->functioncall_trace = n ## _cpu_functioncall_trace; \ |
|
396 |
return 1; \ |
return 1; \ |
397 |
} |
} |
398 |
|
|