--- trunk/src/include/cpu.h 2007/10/08 16:18:27 10 +++ trunk/src/include/cpu.h 2007/10/08 16:19:11 18 @@ -28,7 +28,7 @@ * SUCH DAMAGE. * * - * $Id: cpu.h,v 1.27 2005/06/27 10:43:17 debug Exp $ + * $Id: cpu.h,v 1.51 2005/10/27 14:01:15 debug Exp $ * * See cpu.c. */ @@ -41,10 +41,17 @@ /* This is needed for undefining 'mips' or 'ppc', on weird systems: */ #include "../../config.h" +#include "cpu_alpha.h" #include "cpu_arm.h" +#include "cpu_avr.h" +#include "cpu_hppa.h" +#include "cpu_i960.h" +#include "cpu_ia64.h" +#include "cpu_m68k.h" #include "cpu_mips.h" #include "cpu_ppc.h" -#include "cpu_urisc.h" +#include "cpu_sh.h" +#include "cpu_sparc.h" #include "cpu_x86.h" struct cpu; @@ -80,12 +87,37 @@ int (*interrupt)(struct cpu *cpu, uint64_t irq_nr); int (*interrupt_ack)(struct cpu *cpu, uint64_t irq_nr); + void (*functioncall_trace)(struct cpu *, + uint64_t f, int n_args); }; #ifdef TRACE_NULL_CRASHES #define TRACE_NULL_N_ENTRIES 16 #endif + +/* + * Dynamic translation definitions: + * + * The translation cache begins with N_BASE_TABLE_ENTRIES uint32_t offsets + * into the cache, for possible translation cache structs for physical pages. + */ + +/* Physpage flags: */ +#define TRANSLATIONS 1 +#define COMBINATIONS 2 + +#define DYNTRANS_CACHE_SIZE (20*1048576) +#define DYNTRANS_CACHE_MARGIN 300000 + +#define N_BASE_TABLE_ENTRIES 32768 +#define PAGENR_TO_TABLE_INDEX(a) ((a) & (N_BASE_TABLE_ENTRIES-1)) + + +/* + * The generic CPU struct: + */ + struct cpu { /* Pointer back to the machine this CPU is in: */ struct machine *machine; @@ -95,6 +127,7 @@ int dead; int bootstrap_cpu_flag; int cpu_id; + int is_32bit; /* 0 for 64-bit, 1 for 32-bit */ char *name; struct memory *mem; @@ -104,23 +137,50 @@ int writeflag, int cache_flags); int (*translate_address)(struct cpu *, uint64_t vaddr, uint64_t *return_addr, int flags); - void (*useremul_syscall)(struct cpu *cpu, - uint32_t code); + void (*update_translation_table)(struct cpu *, + uint64_t vaddr_page, unsigned char *host_page, + int writeflag, uint64_t paddr_page); + void (*invalidate_translation_caches)(struct cpu *, + uint64_t paddr, int flags); + void (*invalidate_code_translation)(struct cpu *, + uint64_t paddr, int flags); + void (*useremul_syscall)(struct cpu *cpu, uint32_t code); - /* Things that all CPU families have: */ uint64_t pc; #ifdef TRACE_NULL_CRASHES - uint64_t trace_null_addr[TRACE_NULL_N_ENTRIES]; + /* TODO: remove this, it's MIPS only */ int trace_null_index; + uint64_t trace_null_addr[TRACE_NULL_N_ENTRIES]; #endif - /* CPU-family dependant: */ + int trace_tree_depth; + + /* + * Dynamic translation: + */ + int running_translated; + int n_translated_instrs; + unsigned char *translation_cache; + size_t translation_cache_cur_ofs; + void (*combination_check)(struct cpu *, + void * /* instr call ptr */, int low_addr); + + /* + * CPU-family dependent: + */ union { + struct alpha_cpu alpha; struct arm_cpu arm; + struct avr_cpu avr; + struct hppa_cpu hppa; + struct i960_cpu i960; + struct ia64_cpu ia64; + struct m68k_cpu m68k; struct mips_cpu mips; struct ppc_cpu ppc; - struct urisc_cpu urisc; + struct sh_cpu sh; + struct sparc_cpu sparc; struct x86_cpu x86; } cd; }; @@ -139,9 +199,12 @@ unsigned char *instr, int running, uint64_t addr, int bintrans); int cpu_interrupt(struct cpu *cpu, uint64_t irq_nr); int cpu_interrupt_ack(struct cpu *cpu, uint64_t irq_nr); -void cpu_run_init(struct emul *emul, struct machine *machine); +void cpu_functioncall_trace(struct cpu *cpu, uint64_t f); +void cpu_functioncall_trace_return(struct cpu *cpu); +void cpu_create_or_reset_tc(struct cpu *cpu); +void cpu_run_init(struct machine *machine); int cpu_run(struct emul *emul, struct machine *machine); -void cpu_run_deinit(struct emul *emul, struct machine *machine); +void cpu_run_deinit(struct machine *machine); void cpu_dumpinfo(struct machine *m, struct cpu *cpu); void cpu_list_available_types(void); void cpu_show_cycles(struct machine *machine, int forced); @@ -149,4 +212,32 @@ void cpu_init(void); +#define JUST_MARK_AS_NON_WRITABLE 1 +#define INVALIDATE_ALL 2 +#define INVALIDATE_PADDR 4 +#define INVALIDATE_VADDR 8 + +#define TLB_CODE 0x02 + + +#define CPU_FAMILY_INIT(n,s) int n ## _cpu_family_init( \ + struct cpu_family *fp) { \ + /* Fill in the cpu_family struct with valid data for this arch. */ \ + fp->name = s; \ + fp->cpu_new = n ## _cpu_new; \ + fp->list_available_types = n ## _cpu_list_available_types; \ + fp->register_match = n ## _cpu_register_match; \ + fp->disassemble_instr = n ## _cpu_disassemble_instr; \ + fp->register_dump = n ## _cpu_register_dump; \ + fp->run = n ## _cpu_run; \ + fp->dumpinfo = n ## _cpu_dumpinfo; \ + fp->show_full_statistics = n ## _cpu_show_full_statistics; \ + fp->tlbdump = n ## _cpu_tlbdump; \ + fp->interrupt = n ## _cpu_interrupt; \ + fp->interrupt_ack = n ## _cpu_interrupt_ack; \ + fp->functioncall_trace = n ## _cpu_functioncall_trace; \ + return 1; \ + } + + #endif /* CPU_H */