28 |
* SUCH DAMAGE. |
* SUCH DAMAGE. |
29 |
* |
* |
30 |
* |
* |
31 |
* $Id: cpu.h,v 1.79 2006/06/25 00:27:36 debug Exp $ |
* $Id: cpu.h,v 1.90 2006/08/12 11:43:13 debug Exp $ |
32 |
* |
* |
33 |
* CPU-related definitions. |
* CPU-related definitions. |
34 |
*/ |
*/ |
54 |
* instruction can "nullify" (skip) the delay-slot. If the end-of-page |
* instruction can "nullify" (skip) the delay-slot. If the end-of-page |
55 |
* slot is skipped, then we end up one step after that. That's where the |
* slot is skipped, then we end up one step after that. That's where the |
56 |
* end_of_page2 slot is. :) |
* end_of_page2 slot is. :) |
57 |
|
* |
58 |
|
* next_ofs points to the next page in a chain of possible pages. |
59 |
|
* (several pages can be in the same chain, but only one matches the |
60 |
|
* specific physaddr.) |
61 |
|
* |
62 |
|
* translations is a tiny bitmap indicating which parts of the page have |
63 |
|
* actual translations. Bit 0 corresponds to the lowest 1/32th of the page, |
64 |
|
* bit 1 to the second-lowest 1/32th, and so on. |
65 |
*/ |
*/ |
66 |
#define DYNTRANS_MISC_DECLARATIONS(arch,ARCH,addrtype) struct \ |
#define DYNTRANS_MISC_DECLARATIONS(arch,ARCH,addrtype) struct \ |
67 |
arch ## _instr_call { \ |
arch ## _instr_call { \ |
73 |
struct arch ## _tc_physpage { \ |
struct arch ## _tc_physpage { \ |
74 |
struct arch ## _instr_call ics[ARCH ## _IC_ENTRIES_PER_PAGE+2];\ |
struct arch ## _instr_call ics[ARCH ## _IC_ENTRIES_PER_PAGE+2];\ |
75 |
uint32_t next_ofs; /* (0 for end of chain) */ \ |
uint32_t next_ofs; /* (0 for end of chain) */ \ |
76 |
int flags; \ |
uint32_t translations; \ |
77 |
addrtype physaddr; \ |
addrtype physaddr; \ |
78 |
}; \ |
}; \ |
79 |
\ |
\ |
83 |
addrtype vaddr_page; \ |
addrtype vaddr_page; \ |
84 |
addrtype paddr_page; \ |
addrtype paddr_page; \ |
85 |
unsigned char *host_page; \ |
unsigned char *host_page; \ |
|
int64_t timestamp; \ |
|
86 |
}; |
}; |
87 |
|
|
88 |
#define DYNTRANS_MISC64_DECLARATIONS(arch,ARCH,tlbindextype) \ |
#define DYNTRANS_MISC64_DECLARATIONS(arch,ARCH,tlbindextype) \ |
155 |
* |
* |
156 |
* phys_page points to translation cache physpages. |
* phys_page points to translation cache physpages. |
157 |
* |
* |
|
* phystranslation is a bitmap which tells us whether a physical page has |
|
|
* a code translation. |
|
|
* |
|
158 |
* vaddr_to_tlbindex is a virtual address to tlb index hint table. |
* vaddr_to_tlbindex is a virtual address to tlb index hint table. |
159 |
* The values in this array are the tlb index plus 1, so a value of, say, |
* The values in this array are the tlb index plus 1, so a value of, say, |
160 |
* 3 means tlb index 2. A value of 0 would mean a tlb index of -1, which |
* 3 means tlb index 2. A value of 0 would mean a tlb index of -1, which |
166 |
unsigned char *host_store[N_VPH32_ENTRIES]; \ |
unsigned char *host_store[N_VPH32_ENTRIES]; \ |
167 |
paddrtype phys_addr[N_VPH32_ENTRIES]; \ |
paddrtype phys_addr[N_VPH32_ENTRIES]; \ |
168 |
struct arch ## _tc_physpage *phys_page[N_VPH32_ENTRIES]; \ |
struct arch ## _tc_physpage *phys_page[N_VPH32_ENTRIES]; \ |
|
uint32_t phystranslation[N_VPH32_ENTRIES/32]; \ |
|
169 |
tlbindextype vaddr_to_tlbindex[N_VPH32_ENTRIES]; |
tlbindextype vaddr_to_tlbindex[N_VPH32_ENTRIES]; |
170 |
|
|
171 |
/* |
/* |
202 |
#include "cpu_ppc.h" |
#include "cpu_ppc.h" |
203 |
#include "cpu_sh.h" |
#include "cpu_sh.h" |
204 |
#include "cpu_sparc.h" |
#include "cpu_sparc.h" |
205 |
|
#include "cpu_transputer.h" |
206 |
#include "cpu_x86.h" |
#include "cpu_x86.h" |
207 |
|
|
208 |
struct cpu; |
struct cpu; |
211 |
struct memory; |
struct memory; |
212 |
|
|
213 |
|
|
214 |
|
/* |
215 |
|
* cpu_family |
216 |
|
* ---------- |
217 |
|
* |
218 |
|
* This structure consists of various pointers to functions, performing |
219 |
|
* architecture-specific functions. |
220 |
|
* |
221 |
|
* Except for the next and arch fields at the top, all fields in the |
222 |
|
* cpu_family struct are filled in by ecah CPU family's init function. |
223 |
|
*/ |
224 |
struct cpu_family { |
struct cpu_family { |
225 |
struct cpu_family *next; |
struct cpu_family *next; |
226 |
int arch; |
int arch; |
227 |
|
|
228 |
/* These are filled in by each CPU family's init function: */ |
/* Familty name, e.g. "MIPS", "Alpha" etc. */ |
229 |
char *name; |
char *name; |
230 |
|
|
231 |
|
/* Fill in architecture specific parts of a struct cpu. */ |
232 |
int (*cpu_new)(struct cpu *cpu, struct memory *mem, |
int (*cpu_new)(struct cpu *cpu, struct memory *mem, |
233 |
struct machine *machine, |
struct machine *machine, |
234 |
int cpu_id, char *cpu_type_name); |
int cpu_id, char *cpu_type_name); |
235 |
|
|
236 |
|
/* Initialize various translation tables. */ |
237 |
|
void (*init_tables)(struct cpu *cpu); |
238 |
|
|
239 |
|
/* List available CPU types for this architecture. */ |
240 |
void (*list_available_types)(void); |
void (*list_available_types)(void); |
241 |
|
|
242 |
|
/* Read or write a CPU register, given a name. */ |
243 |
void (*register_match)(struct machine *m, |
void (*register_match)(struct machine *m, |
244 |
char *name, int writeflag, |
char *name, int writeflag, |
245 |
uint64_t *valuep, int *match_register); |
uint64_t *valuep, int *match_register); |
246 |
|
|
247 |
|
/* Disassemble an instruction. */ |
248 |
int (*disassemble_instr)(struct cpu *cpu, |
int (*disassemble_instr)(struct cpu *cpu, |
249 |
unsigned char *instr, int running, |
unsigned char *instr, int running, |
250 |
uint64_t dumpaddr); |
uint64_t dumpaddr); |
251 |
|
|
252 |
|
/* Dump CPU registers in readable format. */ |
253 |
void (*register_dump)(struct cpu *cpu, |
void (*register_dump)(struct cpu *cpu, |
254 |
int gprs, int coprocs); |
int gprs, int coprocs); |
255 |
int (*run_instr)(struct emul *emul, |
|
256 |
struct cpu *cpu); |
/* Dump generic CPU info in readable format. */ |
257 |
void (*dumpinfo)(struct cpu *cpu); |
void (*dumpinfo)(struct cpu *cpu); |
258 |
|
|
259 |
|
/* Dump TLB data for CPU id x. */ |
260 |
void (*tlbdump)(struct machine *m, int x, |
void (*tlbdump)(struct machine *m, int x, |
261 |
int rawflag); |
int rawflag); |
262 |
|
|
263 |
|
/* Assert an interrupt. */ |
264 |
int (*interrupt)(struct cpu *cpu, uint64_t irq_nr); |
int (*interrupt)(struct cpu *cpu, uint64_t irq_nr); |
265 |
|
|
266 |
|
/* De-assert an interrupt. */ |
267 |
int (*interrupt_ack)(struct cpu *cpu, |
int (*interrupt_ack)(struct cpu *cpu, |
268 |
uint64_t irq_nr); |
uint64_t irq_nr); |
269 |
|
|
270 |
|
/* Print architecture-specific function call arguments. |
271 |
|
(This is called for each function call, if running with -t.) */ |
272 |
void (*functioncall_trace)(struct cpu *, |
void (*functioncall_trace)(struct cpu *, |
273 |
uint64_t f, int n_args); |
uint64_t f, int n_args); |
274 |
|
|
275 |
|
/* GDB command handler. */ |
276 |
char *(*gdb_stub)(struct cpu *, char *cmd); |
char *(*gdb_stub)(struct cpu *, char *cmd); |
|
void (*init_tables)(struct cpu *cpu); |
|
277 |
}; |
}; |
278 |
|
|
279 |
|
|
284 |
* into the cache, for possible translation cache structs for physical pages. |
* into the cache, for possible translation cache structs for physical pages. |
285 |
*/ |
*/ |
286 |
|
|
|
/* Physpage flags: */ |
|
|
#define TRANSLATIONS 1 |
|
|
#define COMBINATIONS 2 |
|
|
|
|
287 |
/* Meaning of delay_slot: */ |
/* Meaning of delay_slot: */ |
288 |
#define NOT_DELAYED 0 |
#define NOT_DELAYED 0 |
289 |
#define DELAYED 1 |
#define DELAYED 1 |
290 |
#define TO_BE_DELAYED 2 |
#define TO_BE_DELAYED 2 |
291 |
#define EXCEPTION_IN_DELAY_SLOT 0x100 |
#define EXCEPTION_IN_DELAY_SLOT 8 |
292 |
|
|
293 |
#define N_SAFE_DYNTRANS_LIMIT_SHIFT 14 |
#define N_SAFE_DYNTRANS_LIMIT_SHIFT 14 |
294 |
#define N_SAFE_DYNTRANS_LIMIT ((1 << (N_SAFE_DYNTRANS_LIMIT_SHIFT - 1)) - 1) |
#define N_SAFE_DYNTRANS_LIMIT ((1 << (N_SAFE_DYNTRANS_LIMIT_SHIFT - 1)) - 1) |
295 |
|
|
296 |
#define DYNTRANS_CACHE_SIZE (24*1048576) |
#define DYNTRANS_CACHE_SIZE (24*1048576) |
297 |
#define DYNTRANS_CACHE_MARGIN 350000 |
#define DYNTRANS_CACHE_MARGIN 300000 |
298 |
|
|
299 |
#define N_BASE_TABLE_ENTRIES 32768 |
#define N_BASE_TABLE_ENTRIES 32768 |
300 |
#define PAGENR_TO_TABLE_INDEX(a) ((a) & (N_BASE_TABLE_ENTRIES-1)) |
#define PAGENR_TO_TABLE_INDEX(a) ((a) & (N_BASE_TABLE_ENTRIES-1)) |
308 |
/* Pointer back to the machine this CPU is in: */ |
/* Pointer back to the machine this CPU is in: */ |
309 |
struct machine *machine; |
struct machine *machine; |
310 |
|
|
311 |
|
/* CPU-specific name, e.g. "R2000", "21164PC", etc. */ |
312 |
|
char *name; |
313 |
|
|
314 |
|
/* EMUL_LITTLE_ENDIAN or EMUL_BIG_ENDIAN. */ |
315 |
int byte_order; |
int byte_order; |
316 |
int running; |
|
317 |
int dead; |
/* 0-based CPU id, in an emulated SMP system. */ |
|
int bootstrap_cpu_flag; |
|
318 |
int cpu_id; |
int cpu_id; |
|
int is_32bit; /* 0 for 64-bit, 1 for 32-bit */ |
|
|
char *name; |
|
319 |
|
|
320 |
|
/* 0 for emulated 64-bit CPUs, 1 for 32-bit. */ |
321 |
|
int is_32bit; |
322 |
|
|
323 |
|
/* 1 while running, 0 when paused/stopped. */ |
324 |
|
int running; |
325 |
|
|
326 |
|
/* A pointer to the main memory connected to this CPU. */ |
327 |
struct memory *mem; |
struct memory *mem; |
328 |
|
|
329 |
|
int (*run_instr)(struct cpu *cpu); |
330 |
int (*memory_rw)(struct cpu *cpu, |
int (*memory_rw)(struct cpu *cpu, |
331 |
struct memory *mem, uint64_t vaddr, |
struct memory *mem, uint64_t vaddr, |
332 |
unsigned char *data, size_t len, |
unsigned char *data, size_t len, |
344 |
int (*instruction_has_delayslot)(struct cpu *cpu, |
int (*instruction_has_delayslot)(struct cpu *cpu, |
345 |
unsigned char *ib); |
unsigned char *ib); |
346 |
|
|
347 |
|
/* The program counter. (For 32-bit modes, not all bits are used.) */ |
348 |
uint64_t pc; |
uint64_t pc; |
349 |
|
|
350 |
|
/* See comment further up. */ |
351 |
|
int delay_slot; |
352 |
|
|
353 |
|
/* The current depth of function call tracing. */ |
354 |
int trace_tree_depth; |
int trace_tree_depth; |
355 |
|
|
356 |
/* |
/* |
357 |
|
* If is_halted is true when an interrupt trap occurs, the pointer |
358 |
|
* to the next instruction to execute will be the instruction |
359 |
|
* following the halt instruction, not the halt instrucion itself. |
360 |
|
*/ |
361 |
|
int is_halted; |
362 |
|
|
363 |
|
/* |
364 |
* Dynamic translation: |
* Dynamic translation: |
365 |
|
* |
366 |
|
* The number of translated instructions is assumed to be 1 per |
367 |
|
* instruction call. For each case where this differs from the |
368 |
|
* truth, n_translated_instrs should be modified. E.g. if 1000 |
369 |
|
* instruction calls are done, and n_translated_instrs is 50, then |
370 |
|
* 1050 emulated instructions were actually executed. |
371 |
|
* |
372 |
|
* Note that it can also be adjusted negatively, that is, the way |
373 |
|
* to "get out" of a dyntrans loop is to set the current instruction |
374 |
|
* call pointer to the "nothing" instruction. This instruction |
375 |
|
* _decreases_ n_translated_instrs. That way, once the dyntrans loop |
376 |
|
* exits, only real instructions will be counted, and not the |
377 |
|
* "nothing" instructions. |
378 |
*/ |
*/ |
|
int running_translated; |
|
379 |
int n_translated_instrs; |
int n_translated_instrs; |
380 |
unsigned char *translation_cache; |
unsigned char *translation_cache; |
381 |
size_t translation_cache_cur_ofs; |
size_t translation_cache_cur_ofs; |
382 |
|
|
|
uint64_t delay_jmpaddr; /* only used if delay_slot > 0 */ |
|
|
int delay_slot; |
|
|
|
|
383 |
/* |
/* |
384 |
* CPU-family dependent: |
* CPU-family dependent: |
385 |
|
* |
386 |
|
* These contain everything ranging from registers, memory management, |
387 |
|
* status words, etc. |
388 |
*/ |
*/ |
389 |
union { |
union { |
390 |
struct alpha_cpu alpha; |
struct alpha_cpu alpha; |
391 |
struct arm_cpu arm; |
struct arm_cpu arm; |
392 |
struct avr_cpu avr; |
struct avr_cpu avr; |
393 |
struct hppa_cpu hppa; |
struct hppa_cpu hppa; |
394 |
struct i960_cpu i960; |
struct i960_cpu i960; |
395 |
struct ia64_cpu ia64; |
struct ia64_cpu ia64; |
396 |
struct m68k_cpu m68k; |
struct m68k_cpu m68k; |
397 |
struct mips_cpu mips; |
struct mips_cpu mips; |
398 |
struct ppc_cpu ppc; |
struct ppc_cpu ppc; |
399 |
struct sh_cpu sh; |
struct sh_cpu sh; |
400 |
struct sparc_cpu sparc; |
struct sparc_cpu sparc; |
401 |
struct x86_cpu x86; |
struct transputer_cpu transputer; |
402 |
|
struct x86_cpu x86; |
403 |
} cd; |
} cd; |
404 |
}; |
}; |
405 |
|
|
451 |
fp->functioncall_trace = n ## _cpu_functioncall_trace; \ |
fp->functioncall_trace = n ## _cpu_functioncall_trace; \ |
452 |
fp->gdb_stub = n ## _cpu_gdb_stub; \ |
fp->gdb_stub = n ## _cpu_gdb_stub; \ |
453 |
fp->tlbdump = n ## _cpu_tlbdump; \ |
fp->tlbdump = n ## _cpu_tlbdump; \ |
|
fp->run_instr = n ## _cpu_run_instr; \ |
|
454 |
fp->init_tables = n ## _cpu_init_tables; \ |
fp->init_tables = n ## _cpu_init_tables; \ |
455 |
return 1; \ |
return 1; \ |
456 |
} |
} |