--- trunk/src/include/cpu.h	2007/10/08 16:18:38	12
+++ trunk/src/include/cpu.h	2007/10/08 16:19:23	20
@@ -28,7 +28,7 @@
  *  SUCH DAMAGE.
  *
  *
- *  $Id: cpu.h,v 1.43 2005/08/16 05:37:13 debug Exp $
+ *  $Id: cpu.h,v 1.54 2005/11/16 21:15:19 debug Exp $
  *
  *  See cpu.c.
  */
@@ -41,12 +41,17 @@
 /*  This is needed for undefining 'mips' or 'ppc', on weird systems:  */
 #include "../../config.h"
 
-#include "cpu_arm.h"
 #include "cpu_alpha.h"
+#include "cpu_arm.h"
+#include "cpu_avr.h"
+#include "cpu_hppa.h"
+#include "cpu_i960.h"
 #include "cpu_ia64.h"
 #include "cpu_m68k.h"
 #include "cpu_mips.h"
+#include "cpu_newmips.h"
 #include "cpu_ppc.h"
+#include "cpu_sh.h"
 #include "cpu_sparc.h"
 #include "cpu_x86.h"
 
@@ -103,7 +108,7 @@
 #define	TRANSLATIONS			1
 #define	COMBINATIONS			2
 
-#define	DYNTRANS_CACHE_SIZE		(16*1048576)
+#define	DYNTRANS_CACHE_SIZE		(20*1048576)
 #define	DYNTRANS_CACHE_MARGIN		300000
 
 #define	N_BASE_TABLE_ENTRIES		32768
@@ -136,14 +141,16 @@
 	void		(*update_translation_table)(struct cpu *,
 			    uint64_t vaddr_page, unsigned char *host_page,
 			    int writeflag, uint64_t paddr_page);
-	void		(*invalidate_translation_caches_paddr)(struct cpu *,
-			    uint64_t paddr);
-	void		(*invalidate_code_translation_caches)(struct cpu *);
+	void		(*invalidate_translation_caches)(struct cpu *,
+			    uint64_t paddr, int flags);
+	void		(*invalidate_code_translation)(struct cpu *,
+			    uint64_t paddr, int flags);
 	void		(*useremul_syscall)(struct cpu *cpu, uint32_t code);
 
 	uint64_t	pc;
 
 #ifdef TRACE_NULL_CRASHES
+	/*  TODO: remove this, it's MIPS only  */
 	int		trace_null_index;
 	uint64_t	trace_null_addr[TRACE_NULL_N_ENTRIES];
 #endif  
@@ -164,10 +171,15 @@
 	union {
 		struct alpha_cpu   alpha;
 		struct arm_cpu     arm;
+		struct avr_cpu     avr;
+		struct hppa_cpu    hppa;
+		struct i960_cpu    i960;
 		struct ia64_cpu    ia64;
 		struct m68k_cpu    m68k;
 		struct mips_cpu    mips;
+		struct newmips_cpu newmips;
 		struct ppc_cpu     ppc;
+		struct sh_cpu      sh;
 		struct sparc_cpu   sparc;
 		struct x86_cpu     x86;
 	} cd;
@@ -200,10 +212,35 @@
 void cpu_init(void);
 
 
+#define	JUST_MARK_AS_NON_WRITABLE	1
+#define	INVALIDATE_ALL			2
+#define	INVALIDATE_PADDR		4
+#define	INVALIDATE_VADDR		8
+
+#define	TLB_CODE			0x02
+
+
 #define CPU_FAMILY_INIT(n,s)	int n ## _cpu_family_init(		\
 	struct cpu_family *fp) {					\
 	/*  Fill in the cpu_family struct with valid data for this arch.  */ \
 	fp->name = s;							\
+	fp->cpu_new = n ## _cpu_new;					\
+	fp->list_available_types = n ## _cpu_list_available_types;	\
+	fp->register_match = n ## _cpu_register_match;			\
+	fp->disassemble_instr = n ## _cpu_disassemble_instr;		\
+	fp->register_dump = n ## _cpu_register_dump;			\
+	fp->run = n ## _cpu_run;					\
+	fp->dumpinfo = n ## _cpu_dumpinfo;				\
+	fp->interrupt = n ## _cpu_interrupt; 				\
+	fp->interrupt_ack = n ## _cpu_interrupt_ack;			\
+	fp->functioncall_trace = n ## _cpu_functioncall_trace;		\
+	return 1;							\
+	}
+
+#define CPU_OLD_FAMILY_INIT(n,s)	int n ## _cpu_family_init(	\
+	struct cpu_family *fp) {					\
+	/*  Fill in the cpu_family struct with valid data for this arch.  */ \
+	fp->name = s;							\
 	fp->cpu_new = n ## _cpu_new;					\
 	fp->list_available_types = n ## _cpu_list_available_types;	\
 	fp->register_match = n ## _cpu_register_match;			\