/[gxemul]/trunk/src/include/cpu.h
This is repository of my old source code which isn't updated any more. Go to git.rot13.org for current projects!
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revision 41 by dpavlin, Mon Oct 8 16:22:11 2007 UTC revision 42 by dpavlin, Mon Oct 8 16:22:32 2007 UTC
# Line 28  Line 28 
28   *  SUCH DAMAGE.   *  SUCH DAMAGE.
29   *   *
30   *   *
31   *  $Id: cpu.h,v 1.116 2007/04/19 15:18:16 debug Exp $   *  $Id: cpu.h,v 1.128 2007/06/14 04:53:14 debug Exp $
32   *   *
33   *  CPU-related definitions.   *  CPU-related definitions.
34   */   */
# Line 41  Line 41 
41  /*  This is needed for undefining 'mips', 'ppc' etc. on weird systems:  */  /*  This is needed for undefining 'mips', 'ppc' etc. on weird systems:  */
42  #include "../../config.h"  #include "../../config.h"
43    
44    #include "timer.h"
45    
46    
47  /*  /*
48   *  Dyntrans misc declarations, used throughout the dyntrans code.   *  Dyntrans misc declarations, used throughout the dyntrans code.
49   *   *
50   *  Note that there is place for all instruction calls within a page,   *  Note that there is space for all instruction calls within a page,
51   *  and then 2 more. The first one of these "extra" instruction slots is   *  and then 2 more. The first one of these "extra" instruction slots is
52   *  the end-of-page slot. It transfers control to the first instruction   *  the end-of-page slot. It transfers control to the first instruction
53   *  slot on the next (virtual) page.   *  slot on the next (virtual) page.
# Line 61  Line 64 
64   *   *
65   *  translations is a tiny bitmap indicating which parts of the page have   *  translations is a tiny bitmap indicating which parts of the page have
66   *  actual translations. Bit 0 corresponds to the lowest 1/32th of the page,   *  actual translations. Bit 0 corresponds to the lowest 1/32th of the page,
67   *  bit 1 to the second-lowest 1/32th, and so on.   *  bit 1 to the second-lowest 1/32th, and so on. This speeds up page
68     *  invalidations, since only part of the page need to be reset.
69   */   */
70  #define DYNTRANS_MISC_DECLARATIONS(arch,ARCH,addrtype)  struct \  #define DYNTRANS_MISC_DECLARATIONS(arch,ARCH,addrtype)  struct \
71          arch ## _instr_call {                                   \          arch ## _instr_call {                                   \
# Line 145  Line 149 
149   *  full-size tables can fit in virtual memory on modern hosts (both 32-bit   *  full-size tables can fit in virtual memory on modern hosts (both 32-bit
150   *  and 64-bit hosts). :-)   *  and 64-bit hosts). :-)
151   *   *
152   *  Usage: e.g. VPH32(arm,ARM,uint32_t,uint8_t)   *  Usage: e.g. VPH32(arm,ARM)
153   *           or VPH32(sparc,SPARC,uint64_t,uint16_t)   *           or VPH32(sparc,SPARC)
154   *   *
155   *  The vph_tlb_entry entries are cpu dependent tlb entries.   *  The vph_tlb_entry entries are cpu dependent tlb entries.
156   *   *
157   *  The host_load and host_store entries point to host pages; the phys_addr   *  The host_load and host_store entries point to host pages; the phys_addr
158   *  entries are uint32_t or uint64_t (emulated physical addresses).   *  entries are uint32_t (emulated physical addresses).
159   *   *
160   *  phys_page points to translation cache physpages.   *  phys_page points to translation cache physpages.
161   *   *
# Line 159  Line 163 
163   *  The values in this array are the tlb index plus 1, so a value of, say,   *  The values in this array are the tlb index plus 1, so a value of, say,
164   *  3 means tlb index 2. A value of 0 would mean a tlb index of -1, which   *  3 means tlb index 2. A value of 0 would mean a tlb index of -1, which
165   *  is not a valid index. (I.e. no hit.)   *  is not a valid index. (I.e. no hit.)
166     *
167     *  The VPH32EXTENDED variant adds an additional postfix to the array
168     *  names. Used so far only for usermode addresses in M88K emulation.
169   */   */
170  #define N_VPH32_ENTRIES         1048576  #define N_VPH32_ENTRIES         1048576
171  #define VPH32(arch,ARCH,paddrtype,tlbindextype)                         \  #define VPH32(arch,ARCH)                                                \
172          unsigned char           *host_load[N_VPH32_ENTRIES];            \          unsigned char           *host_load[N_VPH32_ENTRIES];            \
173          unsigned char           *host_store[N_VPH32_ENTRIES];           \          unsigned char           *host_store[N_VPH32_ENTRIES];           \
174          paddrtype               phys_addr[N_VPH32_ENTRIES];             \          uint32_t                phys_addr[N_VPH32_ENTRIES];             \
175          struct arch ## _tc_physpage  *phys_page[N_VPH32_ENTRIES];       \          struct arch ## _tc_physpage  *phys_page[N_VPH32_ENTRIES];       \
176          tlbindextype            vaddr_to_tlbindex[N_VPH32_ENTRIES];          uint8_t                 vaddr_to_tlbindex[N_VPH32_ENTRIES];
177    #define VPH32_16BITVPHENTRIES(arch,ARCH)                                \
178            unsigned char           *host_load[N_VPH32_ENTRIES];            \
179            unsigned char           *host_store[N_VPH32_ENTRIES];           \
180            uint32_t                phys_addr[N_VPH32_ENTRIES];             \
181            struct arch ## _tc_physpage  *phys_page[N_VPH32_ENTRIES];       \
182            uint16_t                vaddr_to_tlbindex[N_VPH32_ENTRIES];
183    #define VPH32EXTENDED(arch,ARCH,ex)                                     \
184            unsigned char           *host_load_ ## ex[N_VPH32_ENTRIES];     \
185            unsigned char           *host_store_ ## ex[N_VPH32_ENTRIES];    \
186            uint32_t                phys_addr_ ## ex[N_VPH32_ENTRIES];      \
187            struct arch ## _tc_physpage  *phys_page_ ## ex[N_VPH32_ENTRIES];\
188            uint8_t                 vaddr_to_tlbindex_ ## ex[N_VPH32_ENTRIES];
189    
190    
191  /*  /*
192   *  64-bit dyntrans emulated Virtual -> physical -> host address translation:   *  64-bit dyntrans emulated Virtual -> physical -> host address translation:
193   *  -------------------------------------------------------------------------   *  -------------------------------------------------------------------------
194   *   *
195   *  Usage: e.g. VPH64(alpha,ALPHA,uint8_t)   *  Usage: e.g. VPH64(alpha,ALPHA)
196   *           or VPH64(sparc,SPARC,uint16_t)   *           or VPH64(sparc,SPARC)
197   *   *
198   *  l1_64 is an array containing poiners to l2 tables.   *  l1_64 is an array containing poiners to l2 tables.
199   *   *
# Line 182  Line 202 
202   *  used.   *  used.
203   */   */
204  #define DYNTRANS_L1N            17  #define DYNTRANS_L1N            17
205  #define VPH64(arch,ARCH,tlbindextype)                                   \  #define VPH64(arch,ARCH)                                                \
206          struct arch ## _l3_64_table     *l3_64_dummy;                   \          struct arch ## _l3_64_table     *l3_64_dummy;                   \
207          struct arch ## _l3_64_table     *next_free_l3;                  \          struct arch ## _l3_64_table     *next_free_l3;                  \
208          struct arch ## _l2_64_table     *l2_64_dummy;                   \          struct arch ## _l2_64_table     *l2_64_dummy;                   \
# Line 193  Line 213 
213  /*  Include all CPUs' header files here:  */  /*  Include all CPUs' header files here:  */
214  #include "cpu_alpha.h"  #include "cpu_alpha.h"
215  #include "cpu_arm.h"  #include "cpu_arm.h"
 #include "cpu_avr.h"  
216  #include "cpu_m88k.h"  #include "cpu_m88k.h"
217  #include "cpu_mips.h"  #include "cpu_mips.h"
218  #include "cpu_ppc.h"  #include "cpu_ppc.h"
# Line 274  struct cpu_family { Line 293  struct cpu_family {
293  #define N_SAFE_DYNTRANS_LIMIT_SHIFT     14  #define N_SAFE_DYNTRANS_LIMIT_SHIFT     14
294  #define N_SAFE_DYNTRANS_LIMIT   ((1 << (N_SAFE_DYNTRANS_LIMIT_SHIFT - 1)) - 1)  #define N_SAFE_DYNTRANS_LIMIT   ((1 << (N_SAFE_DYNTRANS_LIMIT_SHIFT - 1)) - 1)
295    
296  #define DEFAULT_DYNTRANS_CACHE_SIZE     (40*1048576)  #define MAX_DYNTRANS_READAHEAD          1024
297    
298    #define DEFAULT_DYNTRANS_CACHE_SIZE     (48*1048576)
299  #define DYNTRANS_CACHE_MARGIN           200000  #define DYNTRANS_CACHE_MARGIN           200000
300    
301  #define N_BASE_TABLE_ENTRIES            65536  #define N_BASE_TABLE_ENTRIES            65536
302  #define PAGENR_TO_TABLE_INDEX(a)        ((a) & (N_BASE_TABLE_ENTRIES-1))  #define PAGENR_TO_TABLE_INDEX(a)        ((a) & (N_BASE_TABLE_ENTRIES-1))
303    
304    #define CPU_SAMPLE_TIMER_HZ             TIMER_BASE_FREQUENCY
305  #ifdef NATIVE_CODE_GENERATION  #define N_PADDR_SAMPLES                 64
 /*  
  *  Intermediate Native Representation (INR).  
  *  Used for native code generation.  
  */  
 #include "inr.h"  
 #endif  
306    
307    
308  /*  /*
# Line 307  struct cpu { Line 322  struct cpu {
322          /*  Full "path" to the CPU, e.g. "emul[0].machine[0].cpu[0]":  */          /*  Full "path" to the CPU, e.g. "emul[0].machine[0].cpu[0]":  */
323          char            *path;          char            *path;
324    
325          /*  EMUL_LITTLE_ENDIAN or EMUL_BIG_ENDIAN.  */          /*  Nr of instructions executed, etc.:  */
326          int             byte_order;          int64_t         ninstrs;
327            int64_t         ninstrs_show;
328            int64_t         ninstrs_flush;
329            int64_t         ninstrs_since_gettimeofday;
330            struct timeval  starttime;
331    
332          /*  0-based CPU id, in an emulated SMP system.  */          /*
333          int             cpu_id;           *  Periodic sampling of the physical address corresponding to the
334             *  emulated program counter:
335             *
336             *  (Used to decide whether or not native code generation is worth
337             *  the effort.)
338             */
339            struct timer    *sampling_timer;
340            uint8_t         sampling;       /*  1 = turned on  */
341            int16_t         sampling_curindex;
342            uint64_t        *sampling_paddr;
343    
344            /*  EMUL_LITTLE_ENDIAN or EMUL_BIG_ENDIAN.  */
345            uint8_t         byte_order;
346    
347          /*  0 for emulated 64-bit CPUs, 1 for 32-bit.  */          /*  0 for emulated 64-bit CPUs, 1 for 32-bit.  */
348          int             is_32bit;          uint8_t         is_32bit;
349    
350          /*  1 while running, 0 when paused/stopped.  */          /*  1 while running, 0 when paused/stopped.  */
351          int             running;          uint8_t         running;
352    
353            /*  See comment further up.  */
354            uint8_t         delay_slot;
355    
356            /*  0-based CPU id, in an emulated SMP system.  */
357            int             cpu_id;
358    
359          /*  A pointer to the main memory connected to this CPU.  */          /*  A pointer to the main memory connected to this CPU.  */
360          struct memory   *mem;          struct memory   *mem;
# Line 343  struct cpu { Line 380  struct cpu {
380          /*  The program counter. (For 32-bit modes, not all bits are used.)  */          /*  The program counter. (For 32-bit modes, not all bits are used.)  */
381          uint64_t        pc;          uint64_t        pc;
382    
         /*  See comment further up.  */  
         int             delay_slot;  
   
383          /*  The current depth of function call tracing.  */          /*  The current depth of function call tracing.  */
384          int             trace_tree_depth;          int             trace_tree_depth;
385    
# Line 358  struct cpu { Line 392  struct cpu {
392           *  instructions per second, "idling" is printed instead. (The number           *  instructions per second, "idling" is printed instead. (The number
393           *  of instrs per second when idling is meaningless anyway.)           *  of instrs per second when idling is meaningless anyway.)
394           */           */
395          int             is_halted;          char            is_halted;
396          int             has_been_idling;          char            has_been_idling;
397    
398          /*          /*
399           *  Dynamic translation:           *  Dynamic translation:
# Line 381  struct cpu { Line 415  struct cpu {
415           *  32 MB) which is used for translations. When it has been used up,           *  32 MB) which is used for translations. When it has been used up,
416           *  everything restarts from scratch.           *  everything restarts from scratch.
417           *           *
418           *  The INR struct contains the Intermediate Native Representation,           *  translation_readahead is non-zero when translating instructions
419           *  used during native code generation.           *  ahead of the current (emulated) instruction pointer.
420           */           */
421    
422            /*  Non-zero when translating ahead of the current instruction:  */
423            int             translation_readahead;
424    
425            /*  Instruction translation cache:  */
426          int             n_translated_instrs;          int             n_translated_instrs;
427          unsigned char   *translation_cache;          unsigned char   *translation_cache;
428          size_t          translation_cache_cur_ofs;          size_t          translation_cache_cur_ofs;
429    
 #ifdef NATIVE_CODE_GENERATION  
         struct inr      inr;  
 #endif  
430    
431          /*          /*
432           *  CPU-family dependent:           *  CPU-family dependent:
433           *           *
434           *  These contain everything ranging from registers, memory management,           *  These contain everything ranging from general purpose registers,
435           *  status words, etc.           *  control registers, memory management, status words, interrupt
436             *  specifics, etc.
437           */           */
438          union {          union {
439                  struct alpha_cpu      alpha;                  struct alpha_cpu      alpha;
440                  struct arm_cpu        arm;                  struct arm_cpu        arm;
                 struct avr_cpu        avr;  
441                  struct m88k_cpu       m88k;                  struct m88k_cpu       m88k;
442                  struct mips_cpu       mips;                  struct mips_cpu       mips;
443                  struct ppc_cpu        ppc;                  struct ppc_cpu        ppc;
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