/[gxemul]/trunk/src/include/cpu.h
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revision 22 by dpavlin, Mon Oct 8 16:19:37 2007 UTC revision 42 by dpavlin, Mon Oct 8 16:22:32 2007 UTC
# Line 2  Line 2 
2  #define CPU_H  #define CPU_H
3    
4  /*  /*
5   *  Copyright (C) 2005-2006  Anders Gavare.  All rights reserved.   *  Copyright (C) 2005-2007  Anders Gavare.  All rights reserved.
6   *   *
7   *  Redistribution and use in source and binary forms, with or without   *  Redistribution and use in source and binary forms, with or without
8   *  modification, are permitted provided that the following conditions are met:   *  modification, are permitted provided that the following conditions are met:
# Line 28  Line 28 
28   *  SUCH DAMAGE.   *  SUCH DAMAGE.
29   *   *
30   *   *
31   *  $Id: cpu.h,v 1.62 2006/02/09 22:40:27 debug Exp $   *  $Id: cpu.h,v 1.128 2007/06/14 04:53:14 debug Exp $
32   *   *
33   *  CPU-related definitions.   *  CPU-related definitions.
34   */   */
# Line 41  Line 41 
41  /*  This is needed for undefining 'mips', 'ppc' etc. on weird systems:  */  /*  This is needed for undefining 'mips', 'ppc' etc. on weird systems:  */
42  #include "../../config.h"  #include "../../config.h"
43    
44    #include "timer.h"
45    
46    
47  /*  /*
48   *  Dyntrans misc declarations, used throughout the dyntrans code.   *  Dyntrans misc declarations, used throughout the dyntrans code.
49     *
50     *  Note that there is space for all instruction calls within a page,
51     *  and then 2 more. The first one of these "extra" instruction slots is
52     *  the end-of-page slot. It transfers control to the first instruction
53     *  slot on the next (virtual) page.
54     *
55     *  The second of these extra instruction slots is an additional
56     *  end-of-page slot for delay-slot architectures. On e.g. MIPS, a branch
57     *  instruction can "nullify" (skip) the delay-slot. If the end-of-page
58     *  slot is skipped, then we end up one step after that. That's where the
59     *  end_of_page2 slot is. :)
60     *
61     *  next_ofs points to the next page in a chain of possible pages.
62     *  (several pages can be in the same chain, but only one matches the
63     *  specific physaddr.)
64     *
65     *  translations is a tiny bitmap indicating which parts of the page have
66     *  actual translations. Bit 0 corresponds to the lowest 1/32th of the page,
67     *  bit 1 to the second-lowest 1/32th, and so on. This speeds up page
68     *  invalidations, since only part of the page need to be reset.
69   */   */
70  #define DYNTRANS_MISC_DECLARATIONS(arch,ARCH,addrtype)  struct \  #define DYNTRANS_MISC_DECLARATIONS(arch,ARCH,addrtype)  struct \
71          arch ## _instr_call {                                   \          arch ## _instr_call {                                   \
# Line 52  Line 75 
75                                                                          \                                                                          \
76          /*  Translation cache struct for each physical page:  */        \          /*  Translation cache struct for each physical page:  */        \
77          struct arch ## _tc_physpage {                                   \          struct arch ## _tc_physpage {                                   \
78                  struct arch ## _instr_call ics[ARCH ## _IC_ENTRIES_PER_PAGE+1];\                  struct arch ## _instr_call ics[ARCH ## _IC_ENTRIES_PER_PAGE+2];\
79                  uint32_t        next_ofs;       /*  (0 for end of chain)  */ \                  uint32_t        next_ofs;       /*  (0 for end of chain)  */ \
80                  int             flags;                                  \                  uint32_t        translations;                           \
81                  addrtype        physaddr;                               \                  addrtype        physaddr;                               \
82          };                                                              \          };                                                              \
83                                                                          \                                                                          \
# Line 64  Line 87 
87                  addrtype        vaddr_page;                             \                  addrtype        vaddr_page;                             \
88                  addrtype        paddr_page;                             \                  addrtype        paddr_page;                             \
89                  unsigned char   *host_page;                             \                  unsigned char   *host_page;                             \
90                  int64_t         timestamp;                              \          };
91    
92    #define DYNTRANS_MISC64_DECLARATIONS(arch,ARCH,tlbindextype)            \
93            struct arch ## _l3_64_table {                                   \
94                    unsigned char   *host_load[1 << ARCH ## _L3N];          \
95                    unsigned char   *host_store[1 << ARCH ## _L3N];         \
96                    uint64_t        phys_addr[1 << ARCH ## _L3N];           \
97                    tlbindextype    vaddr_to_tlbindex[1 << ARCH ## _L3N];   \
98                    struct arch ## _tc_physpage *phys_page[1 << ARCH ## _L3N]; \
99                    struct arch ## _l3_64_table     *next;                  \
100                    int             refcount;                               \
101            };                                                              \
102            struct arch ## _l2_64_table {                                   \
103                    struct arch ## _l3_64_table     *l3[1 << ARCH ## _L2N]; \
104                    struct arch ## _l2_64_table     *next;                  \
105                    int                             refcount;               \
106          };          };
107    
108  /*  /*
# Line 87  Line 125 
125  #define DYNTRANS_ITC(arch)      struct arch ## _tc_physpage *cur_physpage;  \  #define DYNTRANS_ITC(arch)      struct arch ## _tc_physpage *cur_physpage;  \
126                                  struct arch ## _instr_call  *cur_ic_page;   \                                  struct arch ## _instr_call  *cur_ic_page;   \
127                                  struct arch ## _instr_call  *next_ic;       \                                  struct arch ## _instr_call  *next_ic;       \
128                                    struct arch ## _tc_physpage *physpage_template;\
129                                  void (*combination_check)(struct cpu *,     \                                  void (*combination_check)(struct cpu *,     \
130                                      struct arch ## _instr_call *, int low_addr);                                      struct arch ## _instr_call *, int low_addr);
131    
# Line 110  Line 149 
149   *  full-size tables can fit in virtual memory on modern hosts (both 32-bit   *  full-size tables can fit in virtual memory on modern hosts (both 32-bit
150   *  and 64-bit hosts). :-)   *  and 64-bit hosts). :-)
151   *   *
152   *  Usage: e.g. VPH32(arm,ARM,uint32_t,uint8_t)   *  Usage: e.g. VPH32(arm,ARM)
153   *           or VPH32(sparc,SPARC,uint64_t,uint16_t)   *           or VPH32(sparc,SPARC)
154   *   *
155   *  The vph_tlb_entry entries are cpu dependent tlb entries.   *  The vph_tlb_entry entries are cpu dependent tlb entries.
156   *   *
157   *  The host_load and host_store entries point to host pages; the phys_addr   *  The host_load and host_store entries point to host pages; the phys_addr
158   *  entries are uint32_t or uint64_t (emulated physical addresses).   *  entries are uint32_t (emulated physical addresses).
159   *   *
160   *  phys_page points to translation cache physpages.   *  phys_page points to translation cache physpages.
161   *   *
  *  phystranslation is a bitmap which tells us whether a physical page has  
  *  a code translation.  
  *  
162   *  vaddr_to_tlbindex is a virtual address to tlb index hint table.   *  vaddr_to_tlbindex is a virtual address to tlb index hint table.
163   *  The values in this array are the tlb index plus 1, so a value of, say,   *  The values in this array are the tlb index plus 1, so a value of, say,
164   *  3 means tlb index 2. A value of 0 would mean a tlb index of -1, which   *  3 means tlb index 2. A value of 0 would mean a tlb index of -1, which
165   *  is not a valid index. (I.e. no hit.)   *  is not a valid index. (I.e. no hit.)
166     *
167     *  The VPH32EXTENDED variant adds an additional postfix to the array
168     *  names. Used so far only for usermode addresses in M88K emulation.
169   */   */
170  #define N_VPH32_ENTRIES         1048576  #define N_VPH32_ENTRIES         1048576
171  #define VPH32(arch,ARCH,paddrtype,tlbindextype)                         \  #define VPH32(arch,ARCH)                                                \
172          unsigned char           *host_load[N_VPH32_ENTRIES];            \          unsigned char           *host_load[N_VPH32_ENTRIES];            \
173          unsigned char           *host_store[N_VPH32_ENTRIES];           \          unsigned char           *host_store[N_VPH32_ENTRIES];           \
174          paddrtype               phys_addr[N_VPH32_ENTRIES];             \          uint32_t                phys_addr[N_VPH32_ENTRIES];             \
175          struct arch ## _tc_physpage  *phys_page[N_VPH32_ENTRIES];       \          struct arch ## _tc_physpage  *phys_page[N_VPH32_ENTRIES];       \
176          uint32_t                phystranslation[N_VPH32_ENTRIES/32];    \          uint8_t                 vaddr_to_tlbindex[N_VPH32_ENTRIES];
177          tlbindextype            vaddr_to_tlbindex[N_VPH32_ENTRIES];  #define VPH32_16BITVPHENTRIES(arch,ARCH)                                \
178            unsigned char           *host_load[N_VPH32_ENTRIES];            \
179            unsigned char           *host_store[N_VPH32_ENTRIES];           \
180            uint32_t                phys_addr[N_VPH32_ENTRIES];             \
181            struct arch ## _tc_physpage  *phys_page[N_VPH32_ENTRIES];       \
182            uint16_t                vaddr_to_tlbindex[N_VPH32_ENTRIES];
183    #define VPH32EXTENDED(arch,ARCH,ex)                                     \
184            unsigned char           *host_load_ ## ex[N_VPH32_ENTRIES];     \
185            unsigned char           *host_store_ ## ex[N_VPH32_ENTRIES];    \
186            uint32_t                phys_addr_ ## ex[N_VPH32_ENTRIES];      \
187            struct arch ## _tc_physpage  *phys_page_ ## ex[N_VPH32_ENTRIES];\
188            uint8_t                 vaddr_to_tlbindex_ ## ex[N_VPH32_ENTRIES];
189    
190    
191  /*  /*
192   *  64-bit dyntrans emulated Virtual -> physical -> host address translation:   *  64-bit dyntrans emulated Virtual -> physical -> host address translation:
193   *  -------------------------------------------------------------------------   *  -------------------------------------------------------------------------
194   *   *
195   *  Usage: e.g. VPH64(alpha,ALPHA,uint8_t)   *  Usage: e.g. VPH64(alpha,ALPHA)
196   *           or VPH64(sparc,SPARC,uint16_t)   *           or VPH64(sparc,SPARC)
197     *
198     *  l1_64 is an array containing poiners to l2 tables.
199   *   *
200   *  TODO   *  l2_64_dummy is a pointer to a "dummy l2 table". Instead of having NULL
201     *  pointers in l1_64 for unused slots, a pointer to the dummy table can be
202     *  used.
203   */   */
204  #define VPH64(arch,ARCH,tlbindextype)                   \  #define DYNTRANS_L1N            17
205          int dummy;  #define VPH64(arch,ARCH)                                                \
206            struct arch ## _l3_64_table     *l3_64_dummy;                   \
207            struct arch ## _l3_64_table     *next_free_l3;                  \
208            struct arch ## _l2_64_table     *l2_64_dummy;                   \
209            struct arch ## _l2_64_table     *next_free_l2;                  \
210            struct arch ## _l2_64_table     *l1_64[1 << DYNTRANS_L1N];
211    
212    
213    /*  Include all CPUs' header files here:  */
214  #include "cpu_alpha.h"  #include "cpu_alpha.h"
215  #include "cpu_arm.h"  #include "cpu_arm.h"
216  #include "cpu_avr.h"  #include "cpu_m88k.h"
 #include "cpu_hppa.h"  
 #include "cpu_i960.h"  
 #include "cpu_ia64.h"  
 #include "cpu_m68k.h"  
217  #include "cpu_mips.h"  #include "cpu_mips.h"
218  #include "cpu_ppc.h"  #include "cpu_ppc.h"
219  #include "cpu_sh.h"  #include "cpu_sh.h"
220  #include "cpu_sparc.h"  #include "cpu_sparc.h"
 #include "cpu_x86.h"  
221    
222  struct cpu;  struct cpu;
223  struct emul;  struct emul;
224  struct machine;  struct machine;
225  struct memory;  struct memory;
226    struct settings;
227    
228    
229    /*
230     *  cpu_family
231     *  ----------
232     *
233     *  This structure consists of various pointers to functions, performing
234     *  architecture-specific functions.
235     *
236     *  Except for the next and arch fields at the top, all fields in the
237     *  cpu_family struct are filled in by ecah CPU family's init function.
238     */
239  struct cpu_family {  struct cpu_family {
240          struct cpu_family       *next;          struct cpu_family       *next;
241          int                     arch;          int                     arch;
242    
243          /*  These are filled in by each CPU family's init function:  */          /*  Familty name, e.g. "MIPS", "Alpha" etc.  */
244          char                    *name;          char                    *name;
245    
246            /*  Fill in architecture specific parts of a struct cpu.  */
247          int                     (*cpu_new)(struct cpu *cpu, struct memory *mem,          int                     (*cpu_new)(struct cpu *cpu, struct memory *mem,
248                                      struct machine *machine,                                      struct machine *machine,
249                                      int cpu_id, char *cpu_type_name);                                      int cpu_id, char *cpu_type_name);
250    
251            /*  Initialize various translation tables.  */
252            void                    (*init_tables)(struct cpu *cpu);
253    
254            /*  List available CPU types for this architecture.  */
255          void                    (*list_available_types)(void);          void                    (*list_available_types)(void);
256          void                    (*register_match)(struct machine *m,  
257                                      char *name, int writeflag,          /*  Disassemble an instruction.  */
                                     uint64_t *valuep, int *match_register);  
258          int                     (*disassemble_instr)(struct cpu *cpu,          int                     (*disassemble_instr)(struct cpu *cpu,
259                                      unsigned char *instr, int running,                                      unsigned char *instr, int running,
260                                      uint64_t dumpaddr, int bintrans);                                      uint64_t dumpaddr);
261    
262            /*  Dump CPU registers in readable format.  */
263          void                    (*register_dump)(struct cpu *cpu,          void                    (*register_dump)(struct cpu *cpu,
264                                      int gprs, int coprocs);                                      int gprs, int coprocs);
265          int                     (*run)(struct emul *emul,  
266                                      struct machine *machine);          /*  Dump generic CPU info in readable format.  */
267          void                    (*dumpinfo)(struct cpu *cpu);          void                    (*dumpinfo)(struct cpu *cpu);
268          void                    (*show_full_statistics)(struct machine *m);  
269            /*  Dump TLB data for CPU id x.  */
270          void                    (*tlbdump)(struct machine *m, int x,          void                    (*tlbdump)(struct machine *m, int x,
271                                      int rawflag);                                      int rawflag);
272          int                     (*interrupt)(struct cpu *cpu, uint64_t irq_nr);  
273          int                     (*interrupt_ack)(struct cpu *cpu,          /*  Print architecture-specific function call arguments.
274                                      uint64_t irq_nr);              (This is called for each function call, if running with -t.)  */
275          void                    (*functioncall_trace)(struct cpu *,          void                    (*functioncall_trace)(struct cpu *,
276                                      uint64_t f, int n_args);                                      uint64_t f, int n_args);
277  };  };
# Line 207  struct cpu_family { Line 284  struct cpu_family {
284   *  into the cache, for possible translation cache structs for physical pages.   *  into the cache, for possible translation cache structs for physical pages.
285   */   */
286    
287  /*  Physpage flags:  */  /*  Meaning of delay_slot:  */
288  #define TRANSLATIONS                    1  #define NOT_DELAYED                     0
289  #define COMBINATIONS                    2  #define DELAYED                         1
290    #define TO_BE_DELAYED                   2
291    #define EXCEPTION_IN_DELAY_SLOT         8
292    
293    #define N_SAFE_DYNTRANS_LIMIT_SHIFT     14
294    #define N_SAFE_DYNTRANS_LIMIT   ((1 << (N_SAFE_DYNTRANS_LIMIT_SHIFT - 1)) - 1)
295    
296    #define MAX_DYNTRANS_READAHEAD          1024
297    
298  #define DYNTRANS_CACHE_SIZE             (16*1048576)  #define DEFAULT_DYNTRANS_CACHE_SIZE     (48*1048576)
299  #define DYNTRANS_CACHE_MARGIN           300000  #define DYNTRANS_CACHE_MARGIN           200000
300    
301  #define N_BASE_TABLE_ENTRIES            32768  #define N_BASE_TABLE_ENTRIES            65536
302  #define PAGENR_TO_TABLE_INDEX(a)        ((a) & (N_BASE_TABLE_ENTRIES-1))  #define PAGENR_TO_TABLE_INDEX(a)        ((a) & (N_BASE_TABLE_ENTRIES-1))
303    
304    #define CPU_SAMPLE_TIMER_HZ             TIMER_BASE_FREQUENCY
305    #define N_PADDR_SAMPLES                 64
306    
 #ifdef DYNTRANS_BACKEND  
307    
308  /*  TODO: convert this into a fixed-size array? Might increase performace.  */  /*
309  struct dtb_fixup {   *  The generic CPU struct:
310          struct dtb_fixup        *next;   */
         int                     type;   /*  Fixup type [optional]  */  
         void                    *addr;  /*  Address of the instruction  
                                             (in host memory)  */  
         size_t                  data;   /*  Emulation data.  */  
 };  
311    
312  struct translation_context {  struct cpu {
313          /*  Current address of where to emit host instructions:  */          /*  Pointer back to the machine this CPU is in:  */
314          /*  (NULL means no translation is currently being done.)  */          struct machine  *machine;
315          void                    *p;  
316            /*  Settings:  */
317          /*  index of the instr_call of the first translated instruction:  */          struct settings *settings;
         void                    *ic_page;  
         int                     start_instr_call_index;  
   
         /*  Fixups needed after first translation pass:  */  
         struct dtb_fixup        *fixups;  
   
         int                     n_simple;  
   
         /*  translation_buffer should have room for max_size bytes,  
             plus some margin.  */  
         unsigned char           *translation_buffer;  
         size_t                  cur_size;  
 };  
318    
319  #define DTB_TRANSLATION_SIZE_MAX        3072          /*  CPU-specific name, e.g. "R2000", "21164PC", etc.  */
320  #define DTB_TRANSLATION_SIZE_MARGIN     1024          char            *name;
321    
322  void cpu_dtb_add_fixup(struct cpu *cpu, int type, void *addr, size_t data);          /*  Full "path" to the CPU, e.g. "emul[0].machine[0].cpu[0]":  */
323  void cpu_dtb_do_fixups(struct cpu *cpu);          char            *path;
324    
325  void dtb_host_cacheinvalidate(void *p, size_t len);          /*  Nr of instructions executed, etc.:  */
326  int dtb_function_prologue(struct translation_context *ctx, size_t *sizep);          int64_t         ninstrs;
327  int dtb_function_epilogue(struct translation_context *ctx, size_t *sizep);          int64_t         ninstrs_show;
328  int dtb_generate_fcall(struct cpu *cpu, struct translation_context *ctx,          int64_t         ninstrs_flush;
329          size_t *sizep, size_t f, size_t instr_call_ptr);          int64_t         ninstrs_since_gettimeofday;
330  int dtb_generate_ptr_inc(struct cpu *cpu, struct translation_context *ctx,          struct timeval  starttime;
         size_t *sizep, void *ptr, int amount);  
331    
332  #endif  /*  DYNTRANS_BACKEND  */          /*
333             *  Periodic sampling of the physical address corresponding to the
334             *  emulated program counter:
335             *
336             *  (Used to decide whether or not native code generation is worth
337             *  the effort.)
338             */
339            struct timer    *sampling_timer;
340            uint8_t         sampling;       /*  1 = turned on  */
341            int16_t         sampling_curindex;
342            uint64_t        *sampling_paddr;
343    
344            /*  EMUL_LITTLE_ENDIAN or EMUL_BIG_ENDIAN.  */
345            uint8_t         byte_order;
346    
347            /*  0 for emulated 64-bit CPUs, 1 for 32-bit.  */
348            uint8_t         is_32bit;
349    
350  /*          /*  1 while running, 0 when paused/stopped.  */
351   *  The generic CPU struct:          uint8_t         running;
  */  
352    
353  struct cpu {          /*  See comment further up.  */
354          /*  Pointer back to the machine this CPU is in:  */          uint8_t         delay_slot;
         struct machine  *machine;  
355    
356          int             byte_order;          /*  0-based CPU id, in an emulated SMP system.  */
         int             running;  
         int             dead;  
         int             bootstrap_cpu_flag;  
357          int             cpu_id;          int             cpu_id;
         int             is_32bit;       /*  0 for 64-bit, 1 for 32-bit  */  
         char            *name;  
358    
359            /*  A pointer to the main memory connected to this CPU.  */
360          struct memory   *mem;          struct memory   *mem;
361    
362            int             (*run_instr)(struct cpu *cpu);
363          int             (*memory_rw)(struct cpu *cpu,          int             (*memory_rw)(struct cpu *cpu,
364                              struct memory *mem, uint64_t vaddr,                              struct memory *mem, uint64_t vaddr,
365                              unsigned char *data, size_t len,                              unsigned char *data, size_t len,
366                              int writeflag, int cache_flags);                              int writeflag, int cache_flags);
367          int             (*translate_address)(struct cpu *, uint64_t vaddr,          int             (*translate_v2p)(struct cpu *, uint64_t vaddr,
368                              uint64_t *return_addr, int flags);                              uint64_t *return_paddr, int flags);
369          void            (*update_translation_table)(struct cpu *,          void            (*update_translation_table)(struct cpu *,
370                              uint64_t vaddr_page, unsigned char *host_page,                              uint64_t vaddr_page, unsigned char *host_page,
371                              int writeflag, uint64_t paddr_page);                              int writeflag, uint64_t paddr_page);
# Line 298  struct cpu { Line 374  struct cpu {
374          void            (*invalidate_code_translation)(struct cpu *,          void            (*invalidate_code_translation)(struct cpu *,
375                              uint64_t paddr, int flags);                              uint64_t paddr, int flags);
376          void            (*useremul_syscall)(struct cpu *cpu, uint32_t code);          void            (*useremul_syscall)(struct cpu *cpu, uint32_t code);
377            int             (*instruction_has_delayslot)(struct cpu *cpu,
378                                unsigned char *ib);
379    
380            /*  The program counter. (For 32-bit modes, not all bits are used.)  */
381          uint64_t        pc;          uint64_t        pc;
382    
383  #ifdef TRACE_NULL_CRASHES          /*  The current depth of function call tracing.  */
         /*  TODO: remove this, it's MIPS only  */  
         int             trace_null_index;  
         uint64_t        trace_null_addr[TRACE_NULL_N_ENTRIES];  
 #endif    
   
384          int             trace_tree_depth;          int             trace_tree_depth;
385    
386          /*          /*
387             *  If is_halted is true when an interrupt trap occurs, the pointer
388             *  to the next instruction to execute will be the instruction
389             *  following the halt instruction, not the halt instrucion itself.
390             *
391             *  If has_been_idling is true when printing the number of executed
392             *  instructions per second, "idling" is printed instead. (The number
393             *  of instrs per second when idling is meaningless anyway.)
394             */
395            char            is_halted;
396            char            has_been_idling;
397    
398            /*
399           *  Dynamic translation:           *  Dynamic translation:
400             *
401             *  The number of translated instructions is assumed to be 1 per
402             *  instruction call. For each case where this differs from the
403             *  truth, n_translated_instrs should be modified. E.g. if 1000
404             *  instruction calls are done, and n_translated_instrs is 50, then
405             *  1050 emulated instructions were actually executed.
406             *
407             *  Note that it can also be adjusted negatively, that is, the way
408             *  to "get out" of a dyntrans loop is to set the current instruction
409             *  call pointer to the "nothing" instruction. This instruction
410             *  _decreases_ n_translated_instrs by 1. That way, once the dyntrans
411             *  loop exits, only real instructions will be counted, and not the
412             *  "nothing" instructions.
413             *
414             *  The translation cache is a relative large chunk of memory (say,
415             *  32 MB) which is used for translations. When it has been used up,
416             *  everything restarts from scratch.
417             *
418             *  translation_readahead is non-zero when translating instructions
419             *  ahead of the current (emulated) instruction pointer.
420           */           */
421          int             running_translated;  
422            /*  Non-zero when translating ahead of the current instruction:  */
423            int             translation_readahead;
424    
425            /*  Instruction translation cache:  */
426          int             n_translated_instrs;          int             n_translated_instrs;
427          unsigned char   *translation_cache;          unsigned char   *translation_cache;
428          size_t          translation_cache_cur_ofs;          size_t          translation_cache_cur_ofs;
429  #ifdef DYNTRANS_BACKEND  
         struct translation_context translation_context;  
 #endif  
430    
431          /*          /*
432           *  CPU-family dependent:           *  CPU-family dependent:
433             *
434             *  These contain everything ranging from general purpose registers,
435             *  control registers, memory management, status words, interrupt
436             *  specifics, etc.
437           */           */
438          union {          union {
439                  struct alpha_cpu   alpha;                  struct alpha_cpu      alpha;
440                  struct arm_cpu     arm;                  struct arm_cpu        arm;
441                  struct avr_cpu     avr;                  struct m88k_cpu       m88k;
442                  struct hppa_cpu    hppa;                  struct mips_cpu       mips;
443                  struct i960_cpu    i960;                  struct ppc_cpu        ppc;
444                  struct ia64_cpu    ia64;                  struct sh_cpu         sh;
445                  struct m68k_cpu    m68k;                  struct sparc_cpu      sparc;
                 struct mips_cpu    mips;  
                 struct ppc_cpu     ppc;  
                 struct sh_cpu      sh;  
                 struct sparc_cpu   sparc;  
                 struct x86_cpu     x86;  
446          } cd;          } cd;
447  };  };
448    
# Line 343  struct cpu { Line 450  struct cpu {
450  /*  cpu.c:  */  /*  cpu.c:  */
451  struct cpu *cpu_new(struct memory *mem, struct machine *machine,  struct cpu *cpu_new(struct memory *mem, struct machine *machine,
452          int cpu_id, char *cpu_type_name);          int cpu_id, char *cpu_type_name);
453  void cpu_show_full_statistics(struct machine *m);  void cpu_destroy(struct cpu *cpu);
454    
455  void cpu_tlbdump(struct machine *m, int x, int rawflag);  void cpu_tlbdump(struct machine *m, int x, int rawflag);
 void cpu_register_match(struct machine *m, char *name,  
         int writeflag, uint64_t *valuep, int *match_register);  
456  void cpu_register_dump(struct machine *m, struct cpu *cpu,  void cpu_register_dump(struct machine *m, struct cpu *cpu,
457          int gprs, int coprocs);          int gprs, int coprocs);
458  int cpu_disassemble_instr(struct machine *m, struct cpu *cpu,  int cpu_disassemble_instr(struct machine *m, struct cpu *cpu,
459          unsigned char *instr, int running, uint64_t addr, int bintrans);          unsigned char *instr, int running, uint64_t addr);
460  int cpu_interrupt(struct cpu *cpu, uint64_t irq_nr);  
 int cpu_interrupt_ack(struct cpu *cpu, uint64_t irq_nr);  
461  void cpu_functioncall_trace(struct cpu *cpu, uint64_t f);  void cpu_functioncall_trace(struct cpu *cpu, uint64_t f);
462  void cpu_functioncall_trace_return(struct cpu *cpu);  void cpu_functioncall_trace_return(struct cpu *cpu);
463    
464  void cpu_create_or_reset_tc(struct cpu *cpu);  void cpu_create_or_reset_tc(struct cpu *cpu);
465    
466  void cpu_run_init(struct machine *machine);  void cpu_run_init(struct machine *machine);
 int cpu_run(struct emul *emul, struct machine *machine);  
467  void cpu_run_deinit(struct machine *machine);  void cpu_run_deinit(struct machine *machine);
468    
469  void cpu_dumpinfo(struct machine *m, struct cpu *cpu);  void cpu_dumpinfo(struct machine *m, struct cpu *cpu);
470  void cpu_list_available_types(void);  void cpu_list_available_types(void);
471  void cpu_show_cycles(struct machine *machine, int forced);  void cpu_show_cycles(struct machine *machine, int forced);
472    
473  struct cpu_family *cpu_family_ptr_by_number(int arch);  struct cpu_family *cpu_family_ptr_by_number(int arch);
474  void cpu_init(void);  void cpu_init(void);
475    
# Line 372  void cpu_init(void); Line 480  void cpu_init(void);
480  #define INVALIDATE_VADDR                8  #define INVALIDATE_VADDR                8
481  #define INVALIDATE_VADDR_UPPER4         16      /*  useful for PPC emulation  */  #define INVALIDATE_VADDR_UPPER4         16      /*  useful for PPC emulation  */
482    
483  #define TLB_CODE                        0x02  
484    /*  Note: 64-bit processors running in 32-bit mode use a 32-bit
485        display format, even though the underlying data is 64-bits.  */
486    #define CPU_SETTINGS_ADD_REGISTER64(name, var)                             \
487            settings_add(cpu->settings, name, 1, SETTINGS_TYPE_UINT64,         \
488                cpu->is_32bit? SETTINGS_FORMAT_HEX32 : SETTINGS_FORMAT_HEX64,  \
489                (void *) &(var));
490    #define CPU_SETTINGS_ADD_REGISTER32(name, var)                             \
491            settings_add(cpu->settings, name, 1, SETTINGS_TYPE_UINT32,         \
492                SETTINGS_FORMAT_HEX32, (void *) &(var));
493    #define CPU_SETTINGS_ADD_REGISTER16(name, var)                             \
494            settings_add(cpu->settings, name, 1, SETTINGS_TYPE_UINT16,         \
495                SETTINGS_FORMAT_HEX16, (void *) &(var));
496    #define CPU_SETTINGS_ADD_REGISTER8(name, var)                              \
497            settings_add(cpu->settings, name, 1, SETTINGS_TYPE_UINT8,          \
498                SETTINGS_FORMAT_HEX8, (void *) &(var));
499    
500    
501  #define CPU_FAMILY_INIT(n,s)    int n ## _cpu_family_init(              \  #define CPU_FAMILY_INIT(n,s)    int n ## _cpu_family_init(              \
# Line 381  void cpu_init(void); Line 504  void cpu_init(void);
504          fp->name = s;                                                   \          fp->name = s;                                                   \
505          fp->cpu_new = n ## _cpu_new;                                    \          fp->cpu_new = n ## _cpu_new;                                    \
506          fp->list_available_types = n ## _cpu_list_available_types;      \          fp->list_available_types = n ## _cpu_list_available_types;      \
         fp->register_match = n ## _cpu_register_match;                  \  
507          fp->disassemble_instr = n ## _cpu_disassemble_instr;            \          fp->disassemble_instr = n ## _cpu_disassemble_instr;            \
508          fp->register_dump = n ## _cpu_register_dump;                    \          fp->register_dump = n ## _cpu_register_dump;                    \
         fp->run = n ## _cpu_run;                                        \  
509          fp->dumpinfo = n ## _cpu_dumpinfo;                              \          fp->dumpinfo = n ## _cpu_dumpinfo;                              \
         fp->interrupt = n ## _cpu_interrupt;                            \  
         fp->interrupt_ack = n ## _cpu_interrupt_ack;                    \  
510          fp->functioncall_trace = n ## _cpu_functioncall_trace;          \          fp->functioncall_trace = n ## _cpu_functioncall_trace;          \
         return 1;                                                       \  
         }  
   
 #define CPU_OLD_FAMILY_INIT(n,s)        int n ## _cpu_family_init(      \  
         struct cpu_family *fp) {                                        \  
         /*  Fill in the cpu_family struct with valid data for this arch.  */ \  
         fp->name = s;                                                   \  
         fp->cpu_new = n ## _cpu_new;                                    \  
         fp->list_available_types = n ## _cpu_list_available_types;      \  
         fp->register_match = n ## _cpu_register_match;                  \  
         fp->disassemble_instr = n ## _cpu_disassemble_instr;            \  
         fp->register_dump = n ## _cpu_register_dump;                    \  
         fp->run = n ## _OLD_cpu_run;                                    \  
         fp->dumpinfo = n ## _cpu_dumpinfo;                              \  
         fp->show_full_statistics = n ## _cpu_show_full_statistics;      \  
511          fp->tlbdump = n ## _cpu_tlbdump;                                \          fp->tlbdump = n ## _cpu_tlbdump;                                \
512          fp->interrupt = n ## _cpu_interrupt;                            \          fp->init_tables = n ## _cpu_init_tables;                        \
         fp->interrupt_ack = n ## _cpu_interrupt_ack;                    \  
         fp->functioncall_trace = n ## _cpu_functioncall_trace;          \  
513          return 1;                                                       \          return 1;                                                       \
514          }          }
515    
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