/[gxemul]/trunk/src/include/cpu.h
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revision 4 by dpavlin, Mon Oct 8 16:18:00 2007 UTC revision 32 by dpavlin, Mon Oct 8 16:20:58 2007 UTC
# Line 2  Line 2 
2  #define CPU_H  #define CPU_H
3    
4  /*  /*
5   *  Copyright (C) 2005  Anders Gavare.  All rights reserved.   *  Copyright (C) 2005-2006  Anders Gavare.  All rights reserved.
6   *   *
7   *  Redistribution and use in source and binary forms, with or without   *  Redistribution and use in source and binary forms, with or without
8   *  modification, are permitted provided that the following conditions are met:   *  modification, are permitted provided that the following conditions are met:
# Line 28  Line 28 
28   *  SUCH DAMAGE.   *  SUCH DAMAGE.
29   *   *
30   *   *
31   *  $Id: cpu.h,v 1.22 2005/04/15 21:56:25 debug Exp $   *  $Id: cpu.h,v 1.100 2006/10/25 09:24:06 debug Exp $
32   *   *
33   *  See cpu.c.   *  CPU-related definitions.
34   */   */
35    
36    
# Line 38  Line 38 
38  #include <inttypes.h>  #include <inttypes.h>
39  #include <sys/time.h>  #include <sys/time.h>
40    
41  /*  This is needed for undefining 'mips' or 'ppc', on weird systems:  */  /*  This is needed for undefining 'mips', 'ppc' etc. on weird systems:  */
42  #include "../../config.h"  #include "../../config.h"
43    
44    /*
45     *  Dyntrans misc declarations, used throughout the dyntrans code.
46     *
47     *  Note that there is place for all instruction calls within a page,
48     *  and then 2 more. The first one of these "extra" instruction slots is
49     *  the end-of-page slot. It transfers control to the first instruction
50     *  slot on the next (virtual) page.
51     *
52     *  The second of these extra instruction slots is an additional
53     *  end-of-page slot for delay-slot architectures. On e.g. MIPS, a branch
54     *  instruction can "nullify" (skip) the delay-slot. If the end-of-page
55     *  slot is skipped, then we end up one step after that. That's where the
56     *  end_of_page2 slot is. :)
57     *
58     *  next_ofs points to the next page in a chain of possible pages.
59     *  (several pages can be in the same chain, but only one matches the
60     *  specific physaddr.)
61     *
62     *  translations is a tiny bitmap indicating which parts of the page have
63     *  actual translations. Bit 0 corresponds to the lowest 1/32th of the page,
64     *  bit 1 to the second-lowest 1/32th, and so on.
65     */
66    #define DYNTRANS_MISC_DECLARATIONS(arch,ARCH,addrtype)  struct \
67            arch ## _instr_call {                                   \
68                    void    (*f)(struct cpu *, struct arch ## _instr_call *); \
69                    size_t  arg[ARCH ## _N_IC_ARGS];                        \
70            };                                                              \
71                                                                            \
72            /*  Translation cache struct for each physical page:  */        \
73            struct arch ## _tc_physpage {                                   \
74                    struct arch ## _instr_call ics[ARCH ## _IC_ENTRIES_PER_PAGE+2];\
75                    uint32_t        next_ofs;       /*  (0 for end of chain)  */ \
76                    uint32_t        translations;                           \
77                    addrtype        physaddr;                               \
78            };                                                              \
79                                                                            \
80            struct arch ## _vpg_tlb_entry {                                 \
81                    uint8_t         valid;                                  \
82                    uint8_t         writeflag;                              \
83                    addrtype        vaddr_page;                             \
84                    addrtype        paddr_page;                             \
85                    unsigned char   *host_page;                             \
86            };
87    
88    #define DYNTRANS_MISC64_DECLARATIONS(arch,ARCH,tlbindextype)            \
89            struct arch ## _l3_64_table {                                   \
90                    unsigned char   *host_load[1 << ARCH ## _L3N];          \
91                    unsigned char   *host_store[1 << ARCH ## _L3N];         \
92                    uint64_t        phys_addr[1 << ARCH ## _L3N];           \
93                    tlbindextype    vaddr_to_tlbindex[1 << ARCH ## _L3N];   \
94                    struct arch ## _tc_physpage *phys_page[1 << ARCH ## _L3N]; \
95                    struct arch ## _l3_64_table     *next;                  \
96                    int             refcount;                               \
97            };                                                              \
98            struct arch ## _l2_64_table {                                   \
99                    struct arch ## _l3_64_table     *l3[1 << ARCH ## _L2N]; \
100                    struct arch ## _l2_64_table     *next;                  \
101                    int                             refcount;               \
102            };
103    
104    /*
105     *  Dyntrans "Instruction Translation Cache":
106     *
107     *  cur_physpage is a pointer to the current physpage. (It _HAPPENS_ to
108     *  be the same as cur_ic_page, because all the instrcalls should be placed
109     *  first in the physpage struct!)
110     *
111     *  cur_ic_page is a pointer to an array of xxx_IC_ENTRIES_PER_PAGE
112     *  instruction call entries.
113     *
114     *  next_ic points to the next such instruction call to be executed.
115     *
116     *  combination_check, when set to non-NULL, is executed automatically after
117     *  an instruction has been translated. (It check for combinations of
118     *  instructions; low_addr is the offset of the translated instruction in the
119     *  current page, NOT shifted right.)
120     */
121    #define DYNTRANS_ITC(arch)      struct arch ## _tc_physpage *cur_physpage;  \
122                                    struct arch ## _instr_call  *cur_ic_page;   \
123                                    struct arch ## _instr_call  *next_ic;       \
124                                    struct arch ## _tc_physpage *physpage_template;\
125                                    void (*combination_check)(struct cpu *,     \
126                                        struct arch ## _instr_call *, int low_addr);
127    
128    /*
129     *  Virtual -> physical -> host address translation TLB entries:
130     *  ------------------------------------------------------------
131     *
132     *  Regardless of whether 32-bit or 64-bit address translation is used, the
133     *  same TLB entry structure is used.
134     */
135    #define VPH_TLBS(arch,ARCH)                                             \
136            struct arch ## _vpg_tlb_entry                                   \
137                vph_tlb_entry[ARCH ## _MAX_VPH_TLB_ENTRIES];
138    
139    /*
140     *  32-bit dyntrans emulated Virtual -> physical -> host address translation:
141     *  -------------------------------------------------------------------------
142     *
143     *  This stuff assumes that 4 KB pages are used. 20 bits to select a page
144     *  means just 1 M entries needed. This is small enough that a couple of
145     *  full-size tables can fit in virtual memory on modern hosts (both 32-bit
146     *  and 64-bit hosts). :-)
147     *
148     *  Usage: e.g. VPH32(arm,ARM,uint32_t,uint8_t)
149     *           or VPH32(sparc,SPARC,uint64_t,uint16_t)
150     *
151     *  The vph_tlb_entry entries are cpu dependent tlb entries.
152     *
153     *  The host_load and host_store entries point to host pages; the phys_addr
154     *  entries are uint32_t or uint64_t (emulated physical addresses).
155     *
156     *  phys_page points to translation cache physpages.
157     *
158     *  vaddr_to_tlbindex is a virtual address to tlb index hint table.
159     *  The values in this array are the tlb index plus 1, so a value of, say,
160     *  3 means tlb index 2. A value of 0 would mean a tlb index of -1, which
161     *  is not a valid index. (I.e. no hit.)
162     */
163    #define N_VPH32_ENTRIES         1048576
164    #define VPH32(arch,ARCH,paddrtype,tlbindextype)                         \
165            unsigned char           *host_load[N_VPH32_ENTRIES];            \
166            unsigned char           *host_store[N_VPH32_ENTRIES];           \
167            paddrtype               phys_addr[N_VPH32_ENTRIES];             \
168            struct arch ## _tc_physpage  *phys_page[N_VPH32_ENTRIES];       \
169            tlbindextype            vaddr_to_tlbindex[N_VPH32_ENTRIES];
170    
171    /*
172     *  64-bit dyntrans emulated Virtual -> physical -> host address translation:
173     *  -------------------------------------------------------------------------
174     *
175     *  Usage: e.g. VPH64(alpha,ALPHA,uint8_t)
176     *           or VPH64(sparc,SPARC,uint16_t)
177     *
178     *  l1_64 is an array containing poiners to l2 tables.
179     *
180     *  l2_64_dummy is a pointer to a "dummy l2 table". Instead of having NULL
181     *  pointers in l1_64 for unused slots, a pointer to the dummy table can be
182     *  used.
183     */
184    #define DYNTRANS_L1N            17
185    #define VPH64(arch,ARCH,tlbindextype)                                   \
186            struct arch ## _l3_64_table     *l3_64_dummy;                   \
187            struct arch ## _l3_64_table     *next_free_l3;                  \
188            struct arch ## _l2_64_table     *l2_64_dummy;                   \
189            struct arch ## _l2_64_table     *next_free_l2;                  \
190            struct arch ## _l2_64_table     *l1_64[1 << DYNTRANS_L1N];
191    
192    
193    /*  Include all CPUs' header files here:  */
194  #include "cpu_alpha.h"  #include "cpu_alpha.h"
195    #include "cpu_arm.h"
196    #include "cpu_avr.h"
197    #include "cpu_avr32.h"
198  #include "cpu_hppa.h"  #include "cpu_hppa.h"
199    #include "cpu_i960.h"
200    #include "cpu_ia64.h"
201    #include "cpu_m68k.h"
202  #include "cpu_mips.h"  #include "cpu_mips.h"
203  #include "cpu_ppc.h"  #include "cpu_ppc.h"
204    #include "cpu_rca180x.h"
205    #include "cpu_sh.h"
206  #include "cpu_sparc.h"  #include "cpu_sparc.h"
207  #include "cpu_urisc.h"  #include "cpu_transputer.h"
208  #include "cpu_x86.h"  #include "cpu_x86.h"
209    
210  struct cpu;  struct cpu;
211  struct emul;  struct emul;
212  struct machine;  struct machine;
213  struct memory;  struct memory;
214    struct settings;
215    
216    
217    /*
218     *  cpu_family
219     *  ----------
220     *
221     *  This structure consists of various pointers to functions, performing
222     *  architecture-specific functions.
223     *
224     *  Except for the next and arch fields at the top, all fields in the
225     *  cpu_family struct are filled in by ecah CPU family's init function.
226     */
227  struct cpu_family {  struct cpu_family {
228          struct cpu_family       *next;          struct cpu_family       *next;
229          int                     arch;          int                     arch;
230    
231          /*  These are filled in by each CPU family's init function:  */          /*  Familty name, e.g. "MIPS", "Alpha" etc.  */
232          char                    *name;          char                    *name;
233          struct cpu              *(*cpu_new)(struct memory *mem,  
234            /*  Fill in architecture specific parts of a struct cpu.  */
235            int                     (*cpu_new)(struct cpu *cpu, struct memory *mem,
236                                      struct machine *machine,                                      struct machine *machine,
237                                      int cpu_id, char *cpu_type_name);                                      int cpu_id, char *cpu_type_name);
238    
239            /*  Initialize various translation tables.  */
240            void                    (*init_tables)(struct cpu *cpu);
241    
242            /*  List available CPU types for this architecture.  */
243          void                    (*list_available_types)(void);          void                    (*list_available_types)(void);
244          void                    (*register_match)(struct machine *m,  
245                                      char *name, int writeflag,          /*  Disassemble an instruction.  */
                                     uint64_t *valuep, int *match_register);  
246          int                     (*disassemble_instr)(struct cpu *cpu,          int                     (*disassemble_instr)(struct cpu *cpu,
247                                      unsigned char *instr, int running,                                      unsigned char *instr, int running,
248                                      uint64_t dumpaddr, int bintrans);                                      uint64_t dumpaddr);
249    
250            /*  Dump CPU registers in readable format.  */
251          void                    (*register_dump)(struct cpu *cpu,          void                    (*register_dump)(struct cpu *cpu,
252                                      int gprs, int coprocs);                                      int gprs, int coprocs);
253          int                     (*run)(struct emul *emul,  
254                                      struct machine *machine);          /*  Dump generic CPU info in readable format.  */
255          void                    (*dumpinfo)(struct cpu *cpu);          void                    (*dumpinfo)(struct cpu *cpu);
256          void                    (*show_full_statistics)(struct machine *m);  
257            /*  Dump TLB data for CPU id x.  */
258          void                    (*tlbdump)(struct machine *m, int x,          void                    (*tlbdump)(struct machine *m, int x,
259                                      int rawflag);                                      int rawflag);
260    
261            /*  Assert an interrupt.  */
262          int                     (*interrupt)(struct cpu *cpu, uint64_t irq_nr);          int                     (*interrupt)(struct cpu *cpu, uint64_t irq_nr);
263    
264            /*  De-assert an interrupt.  */
265          int                     (*interrupt_ack)(struct cpu *cpu,          int                     (*interrupt_ack)(struct cpu *cpu,
266                                      uint64_t irq_nr);                                      uint64_t irq_nr);
267    
268            /*  Print architecture-specific function call arguments.
269                (This is called for each function call, if running with -t.)  */
270            void                    (*functioncall_trace)(struct cpu *,
271                                        uint64_t f, int n_args);
272    
273            /*  GDB command handler.  */
274            char                    *(*gdb_stub)(struct cpu *, char *cmd);
275  };  };
276    
277    
278    /*
279     *  More dyntrans stuff:
280     *
281     *  The translation cache begins with N_BASE_TABLE_ENTRIES uint32_t offsets
282     *  into the cache, for possible translation cache structs for physical pages.
283     */
284    
285    /*  Meaning of delay_slot:  */
286    #define NOT_DELAYED                     0
287    #define DELAYED                         1
288    #define TO_BE_DELAYED                   2
289    #define EXCEPTION_IN_DELAY_SLOT         8
290    
291    #define N_SAFE_DYNTRANS_LIMIT_SHIFT     14
292    #define N_SAFE_DYNTRANS_LIMIT   ((1 << (N_SAFE_DYNTRANS_LIMIT_SHIFT - 1)) - 1)
293    
294    #define DYNTRANS_CACHE_SIZE             (32*1048576)
295    #define DYNTRANS_CACHE_MARGIN           200000
296    
297    #define N_BASE_TABLE_ENTRIES            32768
298    #define PAGENR_TO_TABLE_INDEX(a)        ((a) & (N_BASE_TABLE_ENTRIES-1))
299    
300    
301    /*
302     *  The generic CPU struct:
303     */
304    
305  struct cpu {  struct cpu {
306          /*  Pointer back to the machine this CPU is in:  */          /*  Pointer back to the machine this CPU is in:  */
307          struct machine  *machine;          struct machine  *machine;
308    
309            /*  Settings:  */
310            struct settings *settings;
311    
312            /*  CPU-specific name, e.g. "R2000", "21164PC", etc.  */
313            char            *name;
314    
315            /*  EMUL_LITTLE_ENDIAN or EMUL_BIG_ENDIAN.  */
316          int             byte_order;          int             byte_order;
317          int             running;  
318          int             dead;          /*  0-based CPU id, in an emulated SMP system.  */
         int             bootstrap_cpu_flag;  
319          int             cpu_id;          int             cpu_id;
         char            *name;  
320    
321            /*  0 for emulated 64-bit CPUs, 1 for 32-bit.  */
322            int             is_32bit;
323    
324            /*  1 while running, 0 when paused/stopped.  */
325            int             running;
326    
327            /*  A pointer to the main memory connected to this CPU.  */
328          struct memory   *mem;          struct memory   *mem;
329    
330            int             (*run_instr)(struct cpu *cpu);
331          int             (*memory_rw)(struct cpu *cpu,          int             (*memory_rw)(struct cpu *cpu,
332                              struct memory *mem, uint64_t vaddr,                              struct memory *mem, uint64_t vaddr,
333                              unsigned char *data, size_t len,                              unsigned char *data, size_t len,
334                              int writeflag, int cache_flags);                              int writeflag, int cache_flags);
335          int             (*translate_address)(struct cpu *, uint64_t vaddr,          int             (*translate_v2p)(struct cpu *, uint64_t vaddr,
336                              uint64_t *return_addr, int flags);                              uint64_t *return_paddr, int flags);
337          void            (*useremul_syscall)(struct cpu *cpu,          void            (*update_translation_table)(struct cpu *,
338                              uint32_t code);                              uint64_t vaddr_page, unsigned char *host_page,
339                                int writeflag, uint64_t paddr_page);
340            void            (*invalidate_translation_caches)(struct cpu *,
341                                uint64_t paddr, int flags);
342            void            (*invalidate_code_translation)(struct cpu *,
343                                uint64_t paddr, int flags);
344            void            (*useremul_syscall)(struct cpu *cpu, uint32_t code);
345            int             (*instruction_has_delayslot)(struct cpu *cpu,
346                                unsigned char *ib);
347    
348          /*  Things that all CPU families have:  */          /*  The program counter. (For 32-bit modes, not all bits are used.)  */
349          uint64_t        pc;          uint64_t        pc;
350    
351          /*  CPU-family dependant:  */          /*  See comment further up.  */
352            int             delay_slot;
353    
354            /*  The current depth of function call tracing.  */
355            int             trace_tree_depth;
356    
357            /*
358             *  If is_halted is true when an interrupt trap occurs, the pointer
359             *  to the next instruction to execute will be the instruction
360             *  following the halt instruction, not the halt instrucion itself.
361             *
362             *  If has_been_idling is true when printing the number of executed
363             *  instructions per second, "idling" is printed instead. (The number
364             *  of instrs per second when idling is meaningless anyway.)
365             */
366            int             is_halted;
367            int             has_been_idling;
368    
369            /*
370             *  Dynamic translation:
371             *
372             *  The number of translated instructions is assumed to be 1 per
373             *  instruction call. For each case where this differs from the
374             *  truth, n_translated_instrs should be modified. E.g. if 1000
375             *  instruction calls are done, and n_translated_instrs is 50, then
376             *  1050 emulated instructions were actually executed.
377             *
378             *  Note that it can also be adjusted negatively, that is, the way
379             *  to "get out" of a dyntrans loop is to set the current instruction
380             *  call pointer to the "nothing" instruction. This instruction
381             *  _decreases_ n_translated_instrs. That way, once the dyntrans loop
382             *  exits, only real instructions will be counted, and not the
383             *  "nothing" instructions.
384             */
385            int             n_translated_instrs;
386            unsigned char   *translation_cache;
387            size_t          translation_cache_cur_ofs;
388    
389            /*
390             *  CPU-family dependent:
391             *
392             *  These contain everything ranging from registers, memory management,
393             *  status words, etc.
394             */
395          union {          union {
396                  struct alpha_cpu   alpha;                  struct alpha_cpu      alpha;
397                  struct hppa_cpu    hppa;                  struct arm_cpu        arm;
398                  struct mips_cpu    mips;                  struct avr_cpu        avr;
399                  struct ppc_cpu     ppc;                  struct avr32_cpu      avr32;
400                  struct sparc_cpu   sparc;                  struct hppa_cpu       hppa;
401                  struct urisc_cpu   urisc;                  struct i960_cpu       i960;
402                  struct x86_cpu     x86;                  struct ia64_cpu       ia64;
403                    struct m68k_cpu       m68k;
404                    struct mips_cpu       mips;
405                    struct ppc_cpu        ppc;
406                    struct rca180x_cpu    rca180x;
407                    struct sh_cpu         sh;
408                    struct sparc_cpu      sparc;
409                    struct transputer_cpu transputer;
410                    struct x86_cpu        x86;
411          } cd;          } cd;
412  };  };
413    
# Line 125  struct cpu { Line 415  struct cpu {
415  /*  cpu.c:  */  /*  cpu.c:  */
416  struct cpu *cpu_new(struct memory *mem, struct machine *machine,  struct cpu *cpu_new(struct memory *mem, struct machine *machine,
417          int cpu_id, char *cpu_type_name);          int cpu_id, char *cpu_type_name);
418  void cpu_show_full_statistics(struct machine *m);  void cpu_destroy(struct cpu *cpu);
419    
420  void cpu_tlbdump(struct machine *m, int x, int rawflag);  void cpu_tlbdump(struct machine *m, int x, int rawflag);
 void cpu_register_match(struct machine *m, char *name,  
         int writeflag, uint64_t *valuep, int *match_register);  
421  void cpu_register_dump(struct machine *m, struct cpu *cpu,  void cpu_register_dump(struct machine *m, struct cpu *cpu,
422          int gprs, int coprocs);          int gprs, int coprocs);
423  int cpu_disassemble_instr(struct machine *m, struct cpu *cpu,  int cpu_disassemble_instr(struct machine *m, struct cpu *cpu,
424          unsigned char *instr, int running, uint64_t addr, int bintrans);          unsigned char *instr, int running, uint64_t addr);
425    char *cpu_gdb_stub(struct cpu *cpu, char *cmd);
426    
427  int cpu_interrupt(struct cpu *cpu, uint64_t irq_nr);  int cpu_interrupt(struct cpu *cpu, uint64_t irq_nr);
428  int cpu_interrupt_ack(struct cpu *cpu, uint64_t irq_nr);  int cpu_interrupt_ack(struct cpu *cpu, uint64_t irq_nr);
429  void cpu_run_init(struct emul *emul, struct machine *machine);  void cpu_functioncall_trace(struct cpu *cpu, uint64_t f);
430  int cpu_run(struct emul *emul, struct machine *machine);  void cpu_functioncall_trace_return(struct cpu *cpu);
431  void cpu_run_deinit(struct emul *emul, struct machine *machine);  
432    void cpu_create_or_reset_tc(struct cpu *cpu);
433    
434    void cpu_run_init(struct machine *machine);
435    void cpu_run_deinit(struct machine *machine);
436    
437  void cpu_dumpinfo(struct machine *m, struct cpu *cpu);  void cpu_dumpinfo(struct machine *m, struct cpu *cpu);
438  void cpu_list_available_types(void);  void cpu_list_available_types(void);
439  void cpu_show_cycles(struct machine *machine,  void cpu_show_cycles(struct machine *machine, int forced);
440          struct timeval *starttime, int64_t ncycles, int forced);  
441  struct cpu_family *cpu_family_ptr_by_number(int arch);  struct cpu_family *cpu_family_ptr_by_number(int arch);
442  void cpu_init(void);  void cpu_init(void);
443    
444    
445    #define JUST_MARK_AS_NON_WRITABLE       1
446    #define INVALIDATE_ALL                  2
447    #define INVALIDATE_PADDR                4
448    #define INVALIDATE_VADDR                8
449    #define INVALIDATE_VADDR_UPPER4         16      /*  useful for PPC emulation  */
450    
451    
452    /*  Note: 64-bit processors running in 32-bit mode use a 32-bit
453        display format, even though the underlying data is 64-bits.  */
454    #define CPU_SETTINGS_ADD_REGISTER64(name, var)                             \
455            settings_add(cpu->settings, name, 1, SETTINGS_TYPE_UINT64,         \
456                cpu->is_32bit? SETTINGS_FORMAT_HEX32 : SETTINGS_FORMAT_HEX64,  \
457                (void *) &(var));
458    #define CPU_SETTINGS_ADD_REGISTER32(name, var)                             \
459            settings_add(cpu->settings, name, 1, SETTINGS_TYPE_UINT32,         \
460                SETTINGS_FORMAT_HEX32, (void *) &(var));
461    #define CPU_SETTINGS_ADD_REGISTER16(name, var)                             \
462            settings_add(cpu->settings, name, 1, SETTINGS_TYPE_UINT16,         \
463                SETTINGS_FORMAT_HEX16, (void *) &(var));
464    #define CPU_SETTINGS_ADD_REGISTER8(name, var)                              \
465            settings_add(cpu->settings, name, 1, SETTINGS_TYPE_UINT8,          \
466                SETTINGS_FORMAT_HEX8, (void *) &(var));
467    
468    
469    #define CPU_FAMILY_INIT(n,s)    int n ## _cpu_family_init(              \
470            struct cpu_family *fp) {                                        \
471            /*  Fill in the cpu_family struct with valid data for this arch.  */ \
472            fp->name = s;                                                   \
473            fp->cpu_new = n ## _cpu_new;                                    \
474            fp->list_available_types = n ## _cpu_list_available_types;      \
475            fp->disassemble_instr = n ## _cpu_disassemble_instr;            \
476            fp->register_dump = n ## _cpu_register_dump;                    \
477            fp->dumpinfo = n ## _cpu_dumpinfo;                              \
478            fp->interrupt = n ## _cpu_interrupt;                            \
479            fp->interrupt_ack = n ## _cpu_interrupt_ack;                    \
480            fp->functioncall_trace = n ## _cpu_functioncall_trace;          \
481            fp->gdb_stub = n ## _cpu_gdb_stub;                              \
482            fp->tlbdump = n ## _cpu_tlbdump;                                \
483            fp->init_tables = n ## _cpu_init_tables;                        \
484            return 1;                                                       \
485            }
486    
487    
488  #endif  /*  CPU_H  */  #endif  /*  CPU_H  */
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