/[gxemul]/trunk/src/include/cpu.h
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Annotation of /trunk/src/include/cpu.h

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Revision 18 - (hide annotations)
Mon Oct 8 16:19:11 2007 UTC (13 years, 3 months ago) by dpavlin
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File size: 7650 byte(s)
++ trunk/HISTORY	(local)
$Id: HISTORY,v 1.1004 2005/10/27 14:01:10 debug Exp $
20051011        Passing -A as the default boot arg for CATS (works fine with
                OpenBSD/cats).
20051012	Fixing the VGA cursor offset bug, and speeding up framebuffer
		redraws if character cells contain the same thing as during
		the last redraw.
20051013	Adding a slow strd ARM instruction hack.
20051017	Minor updates: Adding a dummy i80321 Verde controller (for
		XScale emulation), fixing the disassembly of the ARM "ldrd"
		instruction, adding "support" for less-than-4KB pages for ARM
		(by not adding them to translation tables).
20051020	Continuing on some HPCarm stuff. A NetBSD/hpcarm kernel prints
		some boot messages on an emulated Jornada 720.
		Making dev_ram work better with dyntrans (speeds up some things
		quite a bit).
20051021	Automatically generating some of the most common ARM load/store
		multiple instructions.
20051022	Better statistics gathering for the ARM load/store multiple.
		Various other dyntrans and device updates.
20051023	Various minor updates.
20051024	Continuing; minor device and dyntrans fine-tuning. Adding the
		first "reasonable" instruction combination hacks for ARM (the
		cores of NetBSD/cats' memset and memcpy).
20051025	Fixing a dyntrans-related bug in dev_vga. Also changing the
		dyntrans low/high access notification to only be updated on
		writes, not reads. Hopefully it will be enough. (dev_vga in
		charcell mode now seems to work correctly with both reads and
		writes.)
		Experimenting with gathering dyntrans statistics (which parts
		of emulated RAM that are actually executed), and adding
		instruction combination hacks for cache cleaning and a part of
		NetBSD's scanc() function.
20051026	Adding a bitmap for ARM emulation which indicates if a page is
		(specifically) user accessible; loads and stores with the t-
		flag set can now use the translation arrays, which results in
		a measurable speedup.
20051027	Dyntrans updates; adding an extra bitmap array for 32-bit
		emulation modes, speeding up the check whether a physical page
		has any code translations or not (O(n) -> O(1)). Doing a
		similar reduction of O(n) to O(1) by avoiding the scan through
		the translation entries on a translation update (32-bit mode
		only).
		Various other minor hacks.
20051029	Quick release, without any testing at all.

==============  RELEASE 0.3.6.2  ==============


1 dpavlin 4 #ifndef CPU_H
2     #define CPU_H
3    
4     /*
5     * Copyright (C) 2005 Anders Gavare. All rights reserved.
6     *
7     * Redistribution and use in source and binary forms, with or without
8     * modification, are permitted provided that the following conditions are met:
9     *
10     * 1. Redistributions of source code must retain the above copyright
11     * notice, this list of conditions and the following disclaimer.
12     * 2. Redistributions in binary form must reproduce the above copyright
13     * notice, this list of conditions and the following disclaimer in the
14     * documentation and/or other materials provided with the distribution.
15     * 3. The name of the author may not be used to endorse or promote products
16     * derived from this software without specific prior written permission.
17     *
18     * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
19     * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20     * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21     * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
22     * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
23     * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
24     * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
25     * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
26     * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
27     * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28     * SUCH DAMAGE.
29     *
30     *
31 dpavlin 18 * $Id: cpu.h,v 1.51 2005/10/27 14:01:15 debug Exp $
32 dpavlin 4 *
33     * See cpu.c.
34     */
35    
36    
37     #include <sys/types.h>
38     #include <inttypes.h>
39     #include <sys/time.h>
40    
41     /* This is needed for undefining 'mips' or 'ppc', on weird systems: */
42     #include "../../config.h"
43    
44 dpavlin 14 #include "cpu_alpha.h"
45 dpavlin 6 #include "cpu_arm.h"
46 dpavlin 14 #include "cpu_avr.h"
47     #include "cpu_hppa.h"
48     #include "cpu_i960.h"
49 dpavlin 12 #include "cpu_ia64.h"
50     #include "cpu_m68k.h"
51 dpavlin 4 #include "cpu_mips.h"
52     #include "cpu_ppc.h"
53 dpavlin 14 #include "cpu_sh.h"
54 dpavlin 12 #include "cpu_sparc.h"
55 dpavlin 4 #include "cpu_x86.h"
56    
57     struct cpu;
58     struct emul;
59     struct machine;
60     struct memory;
61    
62    
63     struct cpu_family {
64     struct cpu_family *next;
65     int arch;
66    
67     /* These are filled in by each CPU family's init function: */
68     char *name;
69 dpavlin 10 int (*cpu_new)(struct cpu *cpu, struct memory *mem,
70 dpavlin 4 struct machine *machine,
71     int cpu_id, char *cpu_type_name);
72     void (*list_available_types)(void);
73     void (*register_match)(struct machine *m,
74     char *name, int writeflag,
75     uint64_t *valuep, int *match_register);
76     int (*disassemble_instr)(struct cpu *cpu,
77     unsigned char *instr, int running,
78     uint64_t dumpaddr, int bintrans);
79     void (*register_dump)(struct cpu *cpu,
80     int gprs, int coprocs);
81     int (*run)(struct emul *emul,
82     struct machine *machine);
83     void (*dumpinfo)(struct cpu *cpu);
84     void (*show_full_statistics)(struct machine *m);
85     void (*tlbdump)(struct machine *m, int x,
86     int rawflag);
87     int (*interrupt)(struct cpu *cpu, uint64_t irq_nr);
88     int (*interrupt_ack)(struct cpu *cpu,
89     uint64_t irq_nr);
90 dpavlin 12 void (*functioncall_trace)(struct cpu *,
91     uint64_t f, int n_args);
92 dpavlin 4 };
93    
94 dpavlin 8 #ifdef TRACE_NULL_CRASHES
95     #define TRACE_NULL_N_ENTRIES 16
96     #endif
97 dpavlin 4
98 dpavlin 12
99     /*
100     * Dynamic translation definitions:
101     *
102     * The translation cache begins with N_BASE_TABLE_ENTRIES uint32_t offsets
103     * into the cache, for possible translation cache structs for physical pages.
104     */
105    
106     /* Physpage flags: */
107     #define TRANSLATIONS 1
108     #define COMBINATIONS 2
109    
110 dpavlin 18 #define DYNTRANS_CACHE_SIZE (20*1048576)
111 dpavlin 12 #define DYNTRANS_CACHE_MARGIN 300000
112    
113     #define N_BASE_TABLE_ENTRIES 32768
114     #define PAGENR_TO_TABLE_INDEX(a) ((a) & (N_BASE_TABLE_ENTRIES-1))
115    
116    
117     /*
118     * The generic CPU struct:
119     */
120    
121 dpavlin 4 struct cpu {
122     /* Pointer back to the machine this CPU is in: */
123     struct machine *machine;
124    
125     int byte_order;
126     int running;
127     int dead;
128     int bootstrap_cpu_flag;
129     int cpu_id;
130 dpavlin 12 int is_32bit; /* 0 for 64-bit, 1 for 32-bit */
131 dpavlin 4 char *name;
132    
133     struct memory *mem;
134     int (*memory_rw)(struct cpu *cpu,
135     struct memory *mem, uint64_t vaddr,
136     unsigned char *data, size_t len,
137     int writeflag, int cache_flags);
138     int (*translate_address)(struct cpu *, uint64_t vaddr,
139     uint64_t *return_addr, int flags);
140 dpavlin 12 void (*update_translation_table)(struct cpu *,
141     uint64_t vaddr_page, unsigned char *host_page,
142     int writeflag, uint64_t paddr_page);
143 dpavlin 18 void (*invalidate_translation_caches)(struct cpu *,
144 dpavlin 14 uint64_t paddr, int flags);
145     void (*invalidate_code_translation)(struct cpu *,
146     uint64_t paddr, int flags);
147 dpavlin 12 void (*useremul_syscall)(struct cpu *cpu, uint32_t code);
148 dpavlin 4
149     uint64_t pc;
150    
151 dpavlin 8 #ifdef TRACE_NULL_CRASHES
152 dpavlin 14 /* TODO: remove this, it's MIPS only */
153 dpavlin 12 int trace_null_index;
154 dpavlin 8 uint64_t trace_null_addr[TRACE_NULL_N_ENTRIES];
155     #endif
156    
157 dpavlin 12 int trace_tree_depth;
158    
159     /*
160     * Dynamic translation:
161     */
162     int running_translated;
163     int n_translated_instrs;
164     unsigned char *translation_cache;
165     size_t translation_cache_cur_ofs;
166 dpavlin 18 void (*combination_check)(struct cpu *,
167     void * /* instr call ptr */, int low_addr);
168 dpavlin 12
169     /*
170     * CPU-family dependent:
171     */
172 dpavlin 4 union {
173 dpavlin 12 struct alpha_cpu alpha;
174 dpavlin 6 struct arm_cpu arm;
175 dpavlin 14 struct avr_cpu avr;
176     struct hppa_cpu hppa;
177     struct i960_cpu i960;
178 dpavlin 12 struct ia64_cpu ia64;
179     struct m68k_cpu m68k;
180 dpavlin 4 struct mips_cpu mips;
181     struct ppc_cpu ppc;
182 dpavlin 14 struct sh_cpu sh;
183 dpavlin 12 struct sparc_cpu sparc;
184 dpavlin 4 struct x86_cpu x86;
185     } cd;
186     };
187    
188    
189     /* cpu.c: */
190     struct cpu *cpu_new(struct memory *mem, struct machine *machine,
191     int cpu_id, char *cpu_type_name);
192     void cpu_show_full_statistics(struct machine *m);
193     void cpu_tlbdump(struct machine *m, int x, int rawflag);
194     void cpu_register_match(struct machine *m, char *name,
195     int writeflag, uint64_t *valuep, int *match_register);
196     void cpu_register_dump(struct machine *m, struct cpu *cpu,
197     int gprs, int coprocs);
198     int cpu_disassemble_instr(struct machine *m, struct cpu *cpu,
199     unsigned char *instr, int running, uint64_t addr, int bintrans);
200     int cpu_interrupt(struct cpu *cpu, uint64_t irq_nr);
201     int cpu_interrupt_ack(struct cpu *cpu, uint64_t irq_nr);
202 dpavlin 12 void cpu_functioncall_trace(struct cpu *cpu, uint64_t f);
203     void cpu_functioncall_trace_return(struct cpu *cpu);
204     void cpu_create_or_reset_tc(struct cpu *cpu);
205     void cpu_run_init(struct machine *machine);
206 dpavlin 4 int cpu_run(struct emul *emul, struct machine *machine);
207 dpavlin 12 void cpu_run_deinit(struct machine *machine);
208 dpavlin 4 void cpu_dumpinfo(struct machine *m, struct cpu *cpu);
209     void cpu_list_available_types(void);
210 dpavlin 10 void cpu_show_cycles(struct machine *machine, int forced);
211 dpavlin 4 struct cpu_family *cpu_family_ptr_by_number(int arch);
212     void cpu_init(void);
213    
214    
215 dpavlin 14 #define JUST_MARK_AS_NON_WRITABLE 1
216     #define INVALIDATE_ALL 2
217     #define INVALIDATE_PADDR 4
218     #define INVALIDATE_VADDR 8
219    
220 dpavlin 18 #define TLB_CODE 0x02
221 dpavlin 14
222 dpavlin 18
223 dpavlin 12 #define CPU_FAMILY_INIT(n,s) int n ## _cpu_family_init( \
224     struct cpu_family *fp) { \
225     /* Fill in the cpu_family struct with valid data for this arch. */ \
226     fp->name = s; \
227     fp->cpu_new = n ## _cpu_new; \
228     fp->list_available_types = n ## _cpu_list_available_types; \
229     fp->register_match = n ## _cpu_register_match; \
230     fp->disassemble_instr = n ## _cpu_disassemble_instr; \
231     fp->register_dump = n ## _cpu_register_dump; \
232     fp->run = n ## _cpu_run; \
233     fp->dumpinfo = n ## _cpu_dumpinfo; \
234     fp->show_full_statistics = n ## _cpu_show_full_statistics; \
235     fp->tlbdump = n ## _cpu_tlbdump; \
236     fp->interrupt = n ## _cpu_interrupt; \
237     fp->interrupt_ack = n ## _cpu_interrupt_ack; \
238     fp->functioncall_trace = n ## _cpu_functioncall_trace; \
239     return 1; \
240     }
241    
242    
243 dpavlin 4 #endif /* CPU_H */

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