--- trunk/src/include/bus_pci.h	2007/10/08 16:19:37	22
+++ trunk/src/include/bus_pci.h	2007/10/08 16:21:17	34
@@ -2,7 +2,7 @@
 #define	BUS_PCI_H
 
 /*
- *  Copyright (C) 2004-2006  Anders Gavare.  All rights reserved.
+ *  Copyright (C) 2004-2007  Anders Gavare.  All rights reserved.
  *
  *  Redistribution and use in source and binary forms, with or without
  *  modification, are permitted provided that the following conditions are met:
@@ -28,7 +28,7 @@
  *  SUCH DAMAGE.
  *
  *
- *  $Id: bus_pci.h,v 1.29 2006/02/18 13:15:21 debug Exp $
+ *  $Id: bus_pci.h,v 1.33 2006/12/30 13:31:00 debug Exp $
  */
 
 #include "misc.h"
@@ -39,13 +39,24 @@
 
 struct pci_device;
 
+
 #ifndef BUS_PCI_C
+
 struct pci_data;
+
 #else
 
 struct pci_data {
-	/*  IRQ nr of the controller itself.  */
-	int		irq_nr;
+	/*
+	 *  IRQ paths:
+	 *
+	 *  irq_path		Path of the controller itself.
+	 *  irq_path_isa	Path base of ISA interrupts.
+	 *  irq_path_pci	Path base of PCI interrupts.
+	 */
+	char		*irq_path;
+	char		*irq_path_isa;
+	char		*irq_path_pci;
 
 	/*
 	 *  Default I/O port, memory, and irq bases for PCI and legacy ISA
@@ -60,11 +71,9 @@
 
 	uint64_t	pci_portbase;
 	uint64_t	pci_membase;
-	int		pci_irqbase;
 
 	uint64_t	isa_portbase;
 	uint64_t	isa_membase;
-	int		isa_irqbase;
 
 	/*  Current base when allocating space for PCI devices:  */
 	uint64_t	cur_pci_portbase;
@@ -80,13 +89,27 @@
 #define	PCI_CFG_MEM_SIZE	0x100
 
 struct pci_device {
+	/*  Pointer to the next PCI device on this bus:  */
 	struct pci_device	*next;
+
+	/*  Pointer back to the bus this device is connected to:  */
 	struct pci_data		*pcibus;
+
+	/*  Short device name, and bus/device/function value:  */
 	char			*name;
 	int			bus, device, function;
+
+	/*  Configuration memory:  */
 	unsigned char		cfg_mem[PCI_CFG_MEM_SIZE];
 	unsigned char		cfg_mem_size[PCI_CFG_MEM_SIZE];
+
+	/*  Used when setting up the configuration registers:  */
 	int			cur_mapreg_offset;
+
+	/*  Function to handle device-specific cfg register writes:  */
+	int			(*cfg_reg_write)(struct pci_device *pd,
+				    int reg, uint32_t value);
+	void			*extra;
 };
 
 #define	PCIINIT(name)	void pciinit_ ## name(struct machine *machine,	\
@@ -127,10 +150,12 @@
 	uint64_t *data, int len, int writeflag);
 
 /*  Initialization:  */
-struct pci_data *bus_pci_init(struct machine *machine, int irq_nr,
+struct pci_data *bus_pci_init(struct machine *machine, char *irq_path,
 	uint64_t pci_actual_io_offset, uint64_t pci_actual_mem_offset,
-	uint64_t pci_portbase, uint64_t pci_membase, int pci_irqbase,
-	uint64_t isa_portbase, uint64_t isa_membase, int isa_irqbase);
+	uint64_t pci_portbase, uint64_t pci_membase, char *pci_irqbase,
+	uint64_t isa_portbase, uint64_t isa_membase, char *isa_irqbase);
+
+/*  Add a PCI device to a PCI bus:  */
 void bus_pci_add(struct machine *machine, struct pci_data *pci_data,
 	struct memory *mem, int bus, int device, int function,
 	const char *name);