/[gxemul]/trunk/src/include/algor_p5064reg.h
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Contents of /trunk/src/include/algor_p5064reg.h

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Revision 22 - (show annotations)
Mon Oct 8 16:19:37 2007 UTC (16 years, 6 months ago) by dpavlin
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File size: 5720 byte(s)
++ trunk/HISTORY	(local)
$Id: HISTORY,v 1.1121 2006/02/18 21:03:08 debug Exp $
20051126	Cobalt and PReP now work with the 21143 NIC.
		Continuing on Alpha dyntrans things.
		Fixing some more left-shift-by-24 to unsigned.
20051127	Working on OpenFirmware emulation; major cleanup/redesign.
		Progress on MacPPC emulation: NetBSD detects two CPUs (when
		running with -n 2), framebuffer output (for text) works.
		Adding quick-hack Bandit PCI controller and "gc" interrupt
		controller for MacPPC.
20051128	Changing from a Bandit to a Uni-North controller for macppc.
		Continuing on OpenFirmware and MacPPC emulation in general
		(obio controller, and wdc attached to the obio seems to work).
20051129	More work on MacPPC emulation (adding a dummy ADB controller).
		Continuing the PCI bus cleanup (endianness and tag composition)
		and rewriting all PCI controllers' access functions.
20051130	Various minor PPC dyntrans optimizations.
		Manually inlining some parts of the framebuffer redraw routine.
		Slowly beginning the conversion of the old MIPS emulation into
		dyntrans (but this will take quite some time to get right).
		Generalizing quick_pc_to_pointers.
20051201	Documentation update (David Muse has made available a kernel
		which simplifies Debian/DECstation installation).
		Continuing on the ADB bus controller.
20051202	Beginning a rewrite of the Zilog serial controller (dev_zs).
20051203	Continuing on the zs rewrite (now called dev_z8530); conversion
		to devinit style.
		Reworking some of the input-only vs output-only vs input-output
		details of src/console.c, better warning messages, and adding
		a debug dump.
		Removing the concept of "device state"; it wasn't really used.
		Changing some debug output (-vv should now be used to show all
		details about devices and busses; not shown during normal
		startup anymore).
		Beginning on some SPARC instruction disassembly support.
20051204	Minor PPC updates (WALNUT skeleton stuff).
		Continuing on the MIPS dyntrans rewrite.
		More progress on the ADB controller (a keyboard is "detected"
		by NetBSD and OpenBSD).
		Downgrading OpenBSD/arc as a guest OS from "working" to
		"almost working" in the documentation.
		Progress on Algor emulation ("v3" PCI controller).
20051205	Minor updates.
20051207	Sorting devices according to address; this reduces complexity
		of device lookups from O(n) to O(log n) in memory_rw (but no
		real performance increase (yet) in experiments).
20051210	Beginning the work on native dyntrans backends (by making a
		simple skeleton; so far only for Alpha hosts).
20051211	Some very minor SPARC updates.
20051215	Fixing a bug in the MIPS mul (note: not mult) instruction,
		so it also works with non-64-bit emulation. (Thanks to Alec
		Voropay for noticing the problem.)
20051216	More work on the fake/empty/simple/skeleton/whatever backend;
		performance doesn't increase, so this isn't really worth it,
		but it was probably worth it to prepare for a real backend
		later.
20051219	More instr call statistics gathering and analysis stuff.
20051220	Another fix for MIPS 'mul'. Also converting mul and {d,}cl{o,z}
		to dyntrans.
		memory_ppc.c syntax error fix (noticed by Peter Valchev).
		Beginning to move out machines from src/machine.c into
		individual files in src/machines (in a way similar to the
		autodev system for devices).
20051222	Updating the documentation regarding NetBSD/pmax 3.0.
20051223	- " - NetBSD/cats 3.0.
20051225	- " - NetBSD/hpcmips 3.0.
20051226	Continuing on the machine registry redesign.
		Adding support for ARM rrx (33-bit rotate).
		Fixing some signed/unsigned issues (exposed by gcc -W).
20051227	Fixing the bug which prevented a NetBSD/prep 3.0 install kernel
		from starting (triggered when an mtmsr was the last instruction
		on a page). Unfortunately not enough to get the kernel to run
		as well as the 2.1 kernels did.
20051230	Some dyntrans refactoring.
20051231	Continuing on the machine registry redesign.
20060101-10	Continuing... moving more machines. Moving MD interrupt stuff
		from machine.c into a new src/machines/interrupts.c.
20060114	Adding various mvmeppc machine skeletons.
20060115	Continuing on mvme* stuff. NetBSD/mvmeppc prints boot messages
		(for MVME1600) and reaches the root device prompt, but no
		specific hardware devices are emulated yet.
20060116	Minor updates to the mvme1600 emulation mode; the Eagle PCI bus
		seems to work without much modification, and a 21143 can be
		detected, interrupts might work (but untested so far).
		Adding a fake MK48Txx (mkclock) device, for NetBSD/mvmeppc.
20060121	Adding an aux control register for ARM. (A BIG thank you to
		Olivier Houchard for tracking down this bug.)
20060122	Adding more ARM instructions (smulXY), and dev_iq80321_7seg.
20060124	Adding disassembly of more ARM instructions (mia*, mra/mar),
		and some semi-bogus XScale and i80321 registers.
20060201-02	Various minor updates. Moving the last machines out of
		machine.c.
20060204	Adding a -c command line option, for running debugger commands
		before the simulation starts, but after all files have been
		loaded.
		Minor iq80321-related updates.
20060209	Minor hacks (DEVINIT macro, etc).
		Preparing for the generalization of the 64-bit dyntrans address
		translation subsystem.
20060216	Adding ARM ldrd (double-register load).
20060217	Continuing on various ARM-related stuff.
20060218	More progress on the ATA/wdc emulation for NetBSD/iq80321.
		NetBSD/evbarm can now be installed :-)  Updating the docs, etc.
		Continuing on Algor emulation.

==============  RELEASE 0.3.8  ==============


1 /* GXemul: $Id: algor_p5064reg.h,v 1.1 2006/02/18 17:55:25 debug Exp $ */
2 /* $NetBSD: algor_p5064reg.h,v 1.2 2002/02/20 01:34:19 simonb Exp $ */
3
4 #ifndef P5064_H
5 #define P5064_H
6
7 /*-
8 * Copyright (c) 2001 The NetBSD Foundation, Inc.
9 * All rights reserved.
10 *
11 * This code is derived from software contributed to The NetBSD Foundation
12 * by Jason R. Thorpe.
13 *
14 * Redistribution and use in source and binary forms, with or without
15 * modification, are permitted provided that the following conditions
16 * are met:
17 * 1. Redistributions of source code must retain the above copyright
18 * notice, this list of conditions and the following disclaimer.
19 * 2. Redistributions in binary form must reproduce the above copyright
20 * notice, this list of conditions and the following disclaimer in the
21 * documentation and/or other materials provided with the distribution.
22 * 3. All advertising materials mentioning features or use of this software
23 * must display the following acknowledgement:
24 * This product includes software developed by the NetBSD
25 * Foundation, Inc. and its contributors.
26 * 4. Neither the name of The NetBSD Foundation nor the names of its
27 * contributors may be used to endorse or promote products derived
28 * from this software without specific prior written permission.
29 *
30 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
31 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
32 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
33 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
34 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
35 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
36 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
37 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
38 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
39 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
40 * POSSIBILITY OF SUCH DAMAGE.
41 */
42
43 /*
44 * Memory map and register definitions for the Algorithmics P-5064.
45 */
46
47 #define P5064_MEMORY 0x00000000UL /* onboard DRAM memory */
48 /* 256 MB */
49 #define P5064_ISAMEM 0x10000000UL /* ISA window of PCI memory */
50 /* 8MB */
51 #define P5064_PCIMEM 0x11000000UL /* PCI memory window */
52 /* 112MB */
53 #define P5064_PCIIO 0x1d000000UL /* PCI I/O window */
54 /* 16MB */
55 #define P5064_PCICFG 0x1ee00000UL /* PCI config space */
56 /* 1MB */
57 #define P5064_V360EPC 0x1ef00000UL /* V360EPC PCI controller */
58 /* 64KB */
59 #define P5064_CFGBOOT_W 0x1f800000UL /* configured bootstrap (W) */
60 /* 512KB */
61 #define P5064_SOCKET_W 0x1f900000UL /* socket EPROM (W) */
62 /* 512KB */
63 #define P5064_FLASH_W 0x1fa00000UL /* flash (W) */
64 /* 1MB */
65 #define P5064_CFBOOT 0x1fc00000UL /* configured bootstrap */
66 /* 512KB */
67 #define P5064_SOCKET 0x1fd00000UL /* socket EPROM */
68 /* 512KB */
69 #define P5064_FLASH 0x1fe00000UL /* flash */
70 /* 1MB */
71 #define P5064_LED0 0x1ff00000UL /* LED (1reg) */
72 #define P5064_LED1 0x1ff20010UL /* LED (4reg) */
73 #define P5064_LCD 0x1ff30000UL /* LCD display */
74 #define P5064_Z80GPIO 0x1ff40000UL /* Z80 GPIO (rev B only) */
75 #define P5064_Z80GPIO_IACK 0x1ff50000UL /* intr. ack. for Z80 */
76 #define P5064_DBG_UART 0x1ff60000UL /* UART on debug board */
77 #define P5064_LOCINT 0x1ff90000UL /* local interrupts */
78 #define P5064_PANIC 0x1ff90004UL /* panic interrupts */
79 #define P5064_PCIINT 0x1ff90008UL /* PCI interrupts */
80 #define P5064_ISAINT 0x1ff9000cUL /* ISA interrupts */
81 #define P5064_XBAR0 0x1ff90010UL /* Int. xbar 0 */
82 #define P5064_XBAR1 0x1ff90014UL /* Int. xbar 1 */
83 #define P5064_XBAR2 0x1ff90018UL /* Int. xbar 2 */
84 #define P5064_XBAR3 0x1ff9001cUL /* Int. xbar 3 */
85 #define P5064_XBAR4 0x1ff90020UL /* Int. xbar 4 */
86 #define P5064_KBDINT 0x1ff90024UL /* keyboard interrupts */
87 #define P5064_LOGICREV 0x1ff9003cUL /* logic revision */
88 #define P5064_CFG0 0x1ffa0000UL /* board configuration 0 */
89 #define P5064_CFG1 0x1ffb0000UL /* board configuration 1 */
90 #define P5064_DRAMCFG 0x1ffc0000UL /* DRAM configuration */
91 #define P5064_BOARDREV 0x1ffd0000UL /* board revision */
92 #define P5064_PCIMEM_HI 0x20000000UL /* PCI memory high window */
93 /* 3.5GB */
94
95 /* P5064_LOCINT */
96 #define LOCINT_PCIBR 0x01
97 #define LOCINT_FLP 0x02
98 #define LOCINT_MKBD 0x04
99 #define LOCINT_COM1 0x08
100 #define LOCINT_COM2 0x10
101 #define LOCINT_CENT 0x20
102 #define LOCINT_RTC 0x80
103
104 /* P5064_PANIC */
105 #define PANIC_DEBUG 0x01
106 #define PANIC_PFAIL 0x02
107 #define PANIC_BERR 0x04
108 #define PANIC_ISANMI 0x08
109 #define PANIC_IOPERR 0x10
110 #define PANIC_CENT 0x20
111 #define PANIC_EWAKE 0x40
112 #define PANIC_ECODERR 0x80
113
114 /* P5064_PCIINT */
115 #define PCIINT_EMDINT 0x01
116 #define PCIINT_ETH 0x02
117 #define PCIINT_SCSI 0x04
118 #define PCIINT_USB 0x08
119 #define PCIINT_PCI0 0x10
120 #define PCIINT_PCI1 0x20
121 #define PCIINT_PCI2 0x40
122 #define PCIINT_PCI3 0x80
123
124 /* P5064_ISAINT */
125 #define ISAINT_ISABR 0x01
126 #define ISAINT_IDE0 0x02
127 #define ISAINT_IDE1 0x04
128
129 /* P5064_KBDINT */
130 #define KBDINT_KBD 0x01
131 #define KBDINT_MOUSE 0x02
132
133 /*
134 * The Algorithmics PMON initializes two DMA windows:
135 *
136 * THE MANUAL CLAIMS THIS:
137 * PCI 0080.0000 -> Phys 0080.0000 (8MB)
138 *
139 * THE PMON FIRMWARE DOES THIS:
140 * PCI 0080.0000 -> Phys 0000.0000 (8MB)
141 *
142 * PCI 8000.0000 -> Phys 0000.0000 (256MB)
143 */
144 #define P5064_DMA_ISA_PCIBASE 0x00800000UL
145 #define P5064_DMA_ISA_PHYSBASE 0x00000000UL
146 #define P5064_DMA_ISA_SIZE (8 * 1024 * 1024)
147
148 #define P5064_DMA_PCI_PCIBASE 0x80000000UL
149 #define P5064_DMA_PCI_PHYSBASE 0x00000000UL
150 #define P5064_DMA_PCI_SIZE (256 * 1024 * 1024)
151
152 #endif /* P5064 */

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