/[gxemul]/trunk/src/devices/pci_vt82c586.c
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Contents of /trunk/src/devices/pci_vt82c586.c

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Revision 10 - (show annotations)
Mon Oct 8 16:18:27 2007 UTC (13 years, 2 months ago) by dpavlin
File MIME type: text/plain
File size: 4204 byte(s)
++ trunk/HISTORY	(local)
$Id: HISTORY,v 1.815 2005/06/27 23:04:35 debug Exp $
20050617	Experimenting some more with netbooting OpenBSD/sgi. Adding
		a hack which allows emulated ethernet networks to be
		distributed across multiple emulator processes.
20050618	Minor updates (documentation, dummy YAMON emulation, etc).
20050620	strcpy/strcat -> strlcpy/strlcat updates.
		Some more progress on evbmips (Malta).
20050621	Adding a section to doc/configfiles.html about ethernet
		emulation across multiple hosts.
		Beginning the work on the ARM translation engine (using the
		dynamic-but-not-binary translation method).
		Fixing a bintrans bug: 0x9fc00000 should always be treated as
		PROM area, just as 0xbfc00000 is.
		Minor progress on Malta emulation (the PCI-ISA bus).
20050622	NetBSD/evbmips can now be installed (using another emulated
		machine) and run (including userland and so on). :-)
		Spliting up the bintrans haddr_entry field into two (one for
		read, one for write). Probably not much of a speed increase,
		though.
		Updating some NetBSD 2.0 -> 2.0.2 in the documentation.
20050623	Minor updates (documentation, the TODO file, etc).
		gzipped kernels are now always automagically gunzipped when
		loaded.
20050624	Adding a dummy Playstation Portable (PSP) mode, just barely
		enough to run Hello World (in weird colors :-).
		Removing the -b command line option; old bintrans is enabled
		by default instead. It makes more sense.
		Trying to finally fix the non-working performance measurement
		thing (instr/second etc).
20050625	Continuing on the essential basics for ARM emulation. Two
		instructions seem to work, a branch and a simple "mov". (The
		mov arguments are not correct yet.) Performance is definitely
		reasonable.
		Various other minor updates.
		Adding the ARM "bl" instruction.
		Adding support for combining multiple ARM instructions into one
		function call. ("mov" + "mov" is the only one implemented so
		far, but it seems to work.)
		Cleaning up some IP32 interrupt things (crime/mace); disabling
		the PS/2 keyboard controller on IP32, so that NetBSD/sgimips
		boots into userland again.
20050626	Finally! NetBSD/sgimips netboots. Adding instructions to
		doc/guestoses.html on how to set up an nfs server etc.
		Various other minor fixes.
		Playstation Portable ".pbp" files can now be used directly.
		(The ELF part of the .pbp is extracted transparently.)
		Converting some sprintf -> snprintf.
		Adding some more instructions to the ARM disassembler.
20050627	More ARM updates. Adding some simple ldr(b), str(b),
		cmps, and conditional branch instructions, enough to run
		a simple Hello World program.
		All ARM instructions are now inlined/generated for all possible
		condition codes.
		Adding add and sub, and more load/store instructions.
		Removing dummy files: cpu_alpha.c, cpu_hppa.c, and cpu_sparc.c.
		Some minor documentation updates; preparing for a 0.3.4
		release. Updating some URLs.

==============  RELEASE 0.3.4  ==============


1 /*
2 * Copyright (C) 2004 Anders Gavare. All rights reserved.
3 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions are met:
6 *
7 * 1. Redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer.
9 * 2. Redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution.
12 * 3. The name of the author may not be used to endorse or promote products
13 * derived from this software without specific prior written permission.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25 * SUCH DAMAGE.
26 *
27 *
28 * $Id: pci_vt82c586.c,v 1.14 2005/06/21 18:48:08 debug Exp $
29 *
30 * VIATECH VT82C586 devices:
31 *
32 * vt82c586_isa PCI->ISA bridge
33 * vt82c586_ide IDE controller
34 *
35 * TODO: This more or less just a dummy device, so far.
36 */
37
38 #include <stdio.h>
39 #include <stdlib.h>
40 #include <string.h>
41
42 #include "machine.h"
43 #include "memory.h"
44 #include "misc.h"
45 #include "devices.h"
46 #include "bus_pci.h"
47
48
49 #define PCI_VENDOR_VIATECH 0x1106 /* VIA Technologies */
50 #define PCI_PRODUCT_VIATECH_VT82C586_IDE 0x1571 /* VT82C586 (Apollo VP)
51 IDE Controller */
52 #define PCI_PRODUCT_VIATECH_VT82C586_ISA 0x0586 /* VT82C586 (Apollo VP)
53 PCI-ISA Bridge */
54
55
56 /*
57 * pci_vt82c586_isa_rr():
58 */
59 uint32_t pci_vt82c586_isa_rr(int reg)
60 {
61 /* NetBSD reads from 0x04, 0x08, 0x3c, 0x0c, 0x2c during init */
62
63 switch (reg) {
64 case 0x00:
65 return PCI_VENDOR_VIATECH +
66 (PCI_PRODUCT_VIATECH_VT82C586_ISA << 16);
67 case 0x04:
68 return 0xffffffff; /* ??? */
69 case 0x08:
70 /* Revision 37 or 39 */
71 return PCI_CLASS_CODE(PCI_CLASS_BRIDGE,
72 PCI_SUBCLASS_BRIDGE_ISA, 0) + 39;
73 case 0x0c:
74 /* Bit 7 of Header-type byte ==> multi-function device */
75 return 0x00800000;
76 default:
77 return 0;
78 }
79 }
80
81
82 /*
83 * pci_vt82c586_isa_init():
84 */
85 void pci_vt82c586_isa_init(struct machine *machine, struct memory *mem)
86 {
87 }
88
89
90 /*
91 * pci_vt82c586_ide_rr():
92 */
93 uint32_t pci_vt82c586_ide_rr(int reg)
94 {
95 /* NetBSD reads from 0x04, 0x08, 0x3c, 0x0c, 0x2c during init */
96
97 switch (reg) {
98 case 0x00:
99 return PCI_VENDOR_VIATECH +
100 (PCI_PRODUCT_VIATECH_VT82C586_IDE << 16);
101 case 0x04:
102 return 0xffffffff; /* ??? */
103 case 0x08:
104 /* Possibly not correct: */
105 return PCI_CLASS_CODE(PCI_CLASS_MASS_STORAGE,
106 PCI_SUBCLASS_MASS_STORAGE_IDE, 0) + 0x01;
107 case 0x40: /* APO_IDECONF */
108 /* channel 0 and 1 enabled */
109 return 0x00000003;
110 default:
111 return 0;
112 }
113 }
114
115
116 /*
117 * pci_vt82c586_ide_init():
118 */
119 void pci_vt82c586_ide_init(struct machine *machine, struct memory *mem)
120 {
121 /*
122 * TODO: The check for machine type shouldn't be here?
123 */
124
125 switch (machine->machine_type) {
126
127 case MACHINE_COBALT:
128 /* what about these base addresses and interrupt
129 * numbers? They work for Cobalt...
130 * 7 = PCI interrupt?? (TODO)
131 */
132 dev_wdc_init(machine, mem, 0x100001f0, 6, 0); /* primary */
133 dev_wdc_init(machine, mem, 0x10000170, 6, 2); /* secondary */
134 break;
135
136 case MACHINE_EVBMIPS:
137 /* TODO: Irqs... */
138 dev_wdc_init(machine, mem, 0x180001f0, 8+14, 0);/* primary */
139 dev_wdc_init(machine, mem, 0x18000170, 8+15, 2);/* secondary */
140 break;
141
142 default:fatal("pci_vt82c586_ide_init(): unimplemented machine type\n");
143 exit(1);
144 }
145 }
146

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