/[gxemul]/trunk/src/devices/pci_dec21030.c
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Contents of /trunk/src/devices/pci_dec21030.c

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Revision 12 - (show annotations)
Mon Oct 8 16:18:38 2007 UTC (16 years, 6 months ago) by dpavlin
File MIME type: text/plain
File size: 8491 byte(s) 
++ trunk/HISTORY	(local)
$Id: HISTORY,v 1.905 2005/08/16 09:16:24 debug Exp $
20050628	Continuing the work on the ARM translation engine. end_of_page
		works. Experimenting with load/store translation caches
		(virtual -> physical -> host).
20050629	More ARM stuff (memory access translation cache, mostly). This
		might break a lot of stuff elsewhere, probably some MIPS-
		related translation things.
20050630	Many load/stores are now automatically generated and included
		into cpu_arm_instr.c; 1024 functions in total (!).
		Fixes based on feedback from Alec Voropay: only print 8 hex
		digits instead of 16 in some cases when emulating 32-bit
		machines; similar 8 vs 16 digit fix for breakpoint addresses;
		4Kc has 16 TLB entries, not 48; the MIPS config select1
		register is now printed with "reg ,0".
		Also changing many other occurances of 16 vs 8 digit output.
		Adding cache associativity fields to mips_cpu_types.h; updating
		some other cache fields; making the output of
		mips_cpu_dumpinfo() look nicer.
		Generalizing the bintrans stuff for device accesses to also
		work with the new translation system. (This might also break
		some MIPS things.)
		Adding multi-load/store instructions to the ARM disassembler
		and the translator, and some optimizations of various kinds.
20050701	Adding a simple dev_disk (it can read/write sectors from
		disk images).
20050712	Adding dev_ether (a simple ethernet send/receive device).
		Debugger command "ninstrs" for toggling show_nr_of_instructions
		during runtime.
		Removing the framebuffer logo.
20050713	Continuing on dev_ether.
		Adding a dummy cpu_alpha (again).
20050714	More work on cpu_alpha.
20050715	More work on cpu_alpha. Many instructions work, enough to run
		a simple framebuffer fill test (similar to the ARM test).
20050716	More Alpha stuff.
20050717	Minor updates (Alpha stuff).
20050718	Minor updates (Alpha stuff).
20050719	Generalizing some Alpha instructions.
20050720	More Alpha-related updates.
20050721	Continuing on cpu_alpha. Importing rpb.h from NetBSD/alpha.
20050722	Alpha-related updates: userland stuff (Hello World using
		write() compiled statically for FreeBSD/Alpha runs fine), and
		more instructions are now implemented.
20050723	Fixing ldq_u and stq_u.
		Adding more instructions (conditional moves, masks, extracts,
		shifts).
20050724	More FreeBSD/Alpha userland stuff, and adding some more
		instructions (inserts).
20050725	Continuing on the Alpha stuff. (Adding dummy ldt/stt.)
		Adding a -A command line option to turn off alignment checks
		in some cases (for translated code).
		Trying to remove the old bintrans code which updated the pc
		and nr_of_executed_instructions for every instruction.
20050726	Making another attempt att removing the pc/nr of instructions
		code. This time it worked, huge performance increase for
		artificial test code, but performance loss for real-world
		code :-( so I'm scrapping that code for now.
		Tiny performance increase on Alpha (by using ret instead of
		jmp, to play nice with the Alpha's branch prediction) for the
		old MIPS bintrans backend.
20050727	Various minor fixes and cleanups.
20050728	Switching from a 2-level virtual to host/physical translation
		system for ARM emulation, to a 1-level translation.
		Trying to switch from 2-level to 1-level for the MIPS bintrans
		system as well (Alpha only, so far), but there is at least one
		problem: caches and/or how they work with device mappings.
20050730	Doing the 2-level to 1-level conversion for the i386 backend.
		The cache/device bug is still there for R2K/3K :(
		Various other minor updates (Malta etc).
		The mc146818 clock now updates the UIP bit in a way which works
		better with Linux for at least sgimips and Malta emulation.
		Beginning the work on refactoring the dyntrans system.
20050731	Continuing the dyntrans refactoring.
		Fixing a small but serious host alignment bug in memory_rw.
		Adding support for big-endian load/stores to the i386 bintrans
		backend.
		Another minor i386 bintrans backend update: stores from the
		zero register are now one (or two) loads shorter.
		The slt and sltu instructions were incorrectly implemented for
		the i386 backend; only using them for 32-bit mode for now.
20050801	Continuing the dyntrans refactoring.
		Cleanup of the ns16550 serial controller (removing unnecessary
		code).
		Bugfix (memory corruption bug) in dev_gt, and a patch/hack from
		Alec Voropay for Linux/Malta.
20050802	More cleanup/refactoring of the dyntrans subsystem: adding
		phys_page pointers to the lookup tables, for quick jumps
		between translated pages.
		Better fix for the ns16550 device (but still no real FIFO
		functionality).
		Converting cpu_ppc to the new dyntrans system. This means that
		I will have to start from scratch with implementing each
		instruction, and figure out how to implement dual 64/32-bit
		modes etc.
		Removing the URISC CPU family, because it was useless.
20050803	When selecting a machine type, the main type can now be omitted
		if the subtype name is unique. (I.e. -E can be omitted.)
		Fixing a dyntrans/device update bug. (Writes to offset 0 of
		a device could sometimes go unnoticed.)
		Adding an experimental "instruction combination" hack for
		ARM for memset-like byte fill loops.
20050804	Minor progress on cpu_alpha and related things.
		Finally fixing the MIPS dmult/dmultu bugs.
		Fixing some minor TODOs.
20050805	Generalizing the 8259 PIC. It now also works with Cobalt
		and evbmips emulation, in addition to the x86 hack.
		Finally converting the ns16550 device to use devinit.
		Continuing the work on the dyntrans system. Thinking about
		how to add breakpoints.
20050806	More dyntrans updates. Breakpoints seem to work now.
20050807	Minor updates: cpu_alpha and related things; removing
		dev_malta (as it isn't used any more).
		Dyntrans: working on general "show trace tree" support.
		The trace tree stuff now works with both the old MIPS code and
		with newer dyntrans modes. :)
		Continuing on Alpha-related stuff (trying to get *BSD to boot
		a bit further, adding more instructions, etc).
20050808	Adding a dummy IA64 cpu family, and continuing the refactoring
		of the dyntrans system.
		Removing the regression test stuff, because it was more or
		less useless.
		Adding loadlinked/storeconditional type instructions to the
		Alpha emulation. (Needed for Linux/alpha. Not very well tested
		yet.)
20050809	The function call trace tree now prints a per-function nr of
		arguments. (Semi-meaningless, since that data isn't read yet
		from the ELFs; some hardcoded symbols such as memcpy() and
		strlen() work fine, though.)
		More dyntrans refactoring; taking out more of the things that
		are common to all cpu families.
20050810	Working on adding support for "dual mode" for PPC dyntrans
		(i.e. both 64-bit and 32-bit modes).
		(Re)adding some simple PPC instructions.
20050811	Adding a dummy M68K cpu family. The dyntrans system isn't ready
		for variable-length ISAs yet, so it's completely bogus so far.
		Re-adding more PPC instructions.
		Adding a hack to src/file.c which allows OpenBSD/mac68k a.out
		kernels to be loaded.
		Beginning to add PPC loads/stores. So far they only work in
		32-bit mode.
20050812	The configure file option "add_remote" now accepts symbolic
		host names, in addition to numeric IPv4 addresses.
		Re-adding more PPC instructions.
20050814	Continuing to port back more PPC instructions.
		Found and fixed the cache/device write-update bug for 32-bit
		MIPS bintrans. :-)
		Triggered a really weird and annoying bug in Compaq's C
		compiler; ccc sometimes outputs code which loads from an
		address _before_ checking whether the pointer was NULL or not.
		(I'm not sure how to handle this problem.)
20050815	Removing all of the old x86 instruction execution code; adding
		a new (dummy) dyntrans module for x86.
		Taking the first steps to extend the dyntrans system to support
		variable-length instructions.
		Slowly preparing for the next release.
20050816	Adding a dummy SPARC cpu module.
		Minor updates (documentation etc) for the release.

==============  RELEASE 0.3.5  ==============
1 /*
2 * Copyright (C) 2004 Anders Gavare. All rights reserved.
3 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions are met:
6 *
7 * 1. Redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer.
9 * 2. Redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution.
12 * 3. The name of the author may not be used to endorse or promote products
13 * derived from this software without specific prior written permission.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25 * SUCH DAMAGE.
26 *
27 *
28 * $Id: pci_dec21030.c,v 1.16 2005/07/12 08:49:13 debug Exp $
29 *
30 * DEC 21030 "tga" graphics.
31 *
32 * Resolutions that seem to be possible: 640x480, 1024x768, 1280x1024.
33 * 8 bits, perhaps others? (24 bit?)
34 *
35 * NetBSD should say something like this:
36 *
37 * tga0 at pci0 dev 12 function 0: TGA2 pass 2, board type T8-02
38 * tga0: 1280 x 1024, 8bpp, Bt485 RAMDAC
39 *
40 * See netbsd/src/sys/dev/pci/tga.c for more info.
41 * tga_rop_vtov() for video-to-video copy (scrolling and fast
42 * erasing)
43 *
44 * TODO: This device is far from complete.
45 * The RAMDAC is non-existant.
46 *
47 * TODO: all fb device writes with direct writes to the framebuffer
48 * memory, and update the x1,y1,x2,y2 coordinates instead.
49 * That will give better performance.
50 */
51
52 #include <stdio.h>
53 #include <stdlib.h>
54 #include <string.h>
55
56 #include "memory.h"
57 #include "misc.h"
58 #include "devices.h"
59 #include "bus_pci.h"
60 #include "tgareg.h"
61
62 #define MAX_XSIZE 2048
63
64 #if 1
65 int dec21030_default_xsize = 640;
66 int dec21030_default_ysize = 480;
67 #else
68 int dec21030_default_xsize = 1024;
69 int dec21030_default_ysize = 768;
70 #endif
71
72
73 /* TODO: Ugly hack: this causes the framebuffer to be in memory */
74 #define FRAMEBUFFER_PADDR 0x4000000000ULL
75 #define FRAMEBUFFER_BASE 0x201000
76
77 #define PCI_VENDOR_DEC 0x1011 /* Digital Equipment */
78 #define PCI_PRODUCT_DEC_21030 0x0004 /* DECchip 21030 ("TGA") */
79
80 struct dec21030_data {
81 int graphics_mode;
82 uint32_t pixel_mask;
83 uint32_t copy_source;
84 uint32_t color;
85 struct vfb_data *vfb_data;
86 };
87
88
89 /*
90 * pci_dec21030_rr():
91 *
92 * See http://mail-index.netbsd.org/port-arc/2001/08/13/0000.html
93 * for more info.
94 */
95 uint32_t pci_dec21030_rr(int reg)
96 {
97 switch (reg) {
98 case 0x00:
99 return PCI_VENDOR_DEC + (PCI_PRODUCT_DEC_21030 << 16);
100 case 0x04:
101 return 0x02800087;
102 case 0x08:
103 return 0x03800003;
104 /* return
105 PCI_CLASS_CODE(PCI_CLASS_DISPLAY, PCI_SUBCLASS_DISPLAY_VGA, 0)
106 + 0x03; */
107 case 0x0c:
108 return 0x0000ff00;
109 case 0x10:
110 /* address (8=prefetchable) */
111 return 0x00000000 + 8;
112 case 0x30:
113 return 0x08000001;
114 case 0x3c:
115 return 0x00000100; /* interrupt pin ? */
116 default:
117 return 0;
118 }
119 }
120
121
122 /*
123 * dev_dec21030_access():
124 */
125 int dev_dec21030_access(struct cpu *cpu, struct memory *mem,
126 uint64_t relative_addr, unsigned char *data, size_t len,
127 int writeflag, void *extra)
128 {
129 struct dec21030_data *d = extra;
130 uint64_t idata, odata = 0;
131 int reg, r, i, white = 255, black = 0;
132 int newlen;
133 unsigned char buf2[MAX_XSIZE];
134
135 /* Read/write to the framebuffer: */
136 if (relative_addr >= FRAMEBUFFER_BASE) {
137 /* TODO: Perhaps this isn't graphics mode (GMOR),
138 but GOPR (operation) specific: */
139
140 switch (d->graphics_mode) {
141 case 1: /* Bitmap write: */
142 /* Copy from data into buf2: */
143 for (i=0; i<len; i++) {
144 buf2[i*8 + 0] = data[i]&1? white : black;
145 buf2[i*8 + 1] = data[i]&2? white : black;
146 buf2[i*8 + 2] = data[i]&4? white : black;
147 buf2[i*8 + 3] = data[i]&8? white : black;
148 buf2[i*8 + 4] = data[i]&16? white : black;
149 buf2[i*8 + 5] = data[i]&32? white : black;
150 buf2[i*8 + 6] = data[i]&64? white : black;
151 buf2[i*8 + 7] = data[i]&128? white : black;
152 }
153
154 newlen = 0;
155 for (i=0; i<32; i++)
156 if (d->pixel_mask & (1 << i))
157 newlen ++;
158
159 if (newlen > len * 8)
160 newlen = len * 8;
161
162 r = dev_fb_access(cpu, mem, relative_addr -
163 FRAMEBUFFER_BASE, buf2, newlen, writeflag,
164 d->vfb_data);
165 break;
166 case 0x2d: /* Block fill: */
167 /* data is nr of pixels to fill minus one */
168 newlen = memory_readmax64(cpu, data, len) + 1;
169 /* debug("YO addr=0x%08x, newlen=%i\n", relative_addr,
170 newlen); */
171 if (newlen > MAX_XSIZE)
172 newlen = MAX_XSIZE;
173 memset(buf2, d->color, newlen);
174 r = dev_fb_access(cpu, mem, relative_addr -
175 FRAMEBUFFER_BASE, buf2, newlen, MEM_WRITE,
176 d->vfb_data);
177 break;
178 default:
179 r = dev_fb_access(cpu, mem, relative_addr -
180 FRAMEBUFFER_BASE, data, len, writeflag,
181 d->vfb_data);
182 }
183 return r;
184 }
185
186 idata = memory_readmax64(cpu, data, len);
187
188 /* Read from/write to the dec21030's registers: */
189 reg = ((relative_addr - TGA_MEM_CREGS) & (TGA_CREGS_ALIAS - 1))
190 / sizeof(uint32_t);
191 switch (reg) {
192
193 /* Color? (there are 8 of these, 2 used in 8-bit mode,
194 8 in 24-bit mode) */
195 case TGA_REG_GBCR0:
196 if (writeflag == MEM_WRITE)
197 d->color = idata;
198 else
199 odata = d->color;
200 break;
201
202 /* Board revision */
203 /* case TGA_MEM_CREGS + sizeof(uint32_t) * TGA_REG_GREV: */
204 case TGA_REG_GREV:
205 /* 01,02,03,04 (rev0) and 20,21,22 (rev1) are allowed */
206 odata = 0x04;
207 break;
208
209 /* Graphics Mode: */
210 case TGA_REG_GMOR:
211 if (writeflag == MEM_WRITE)
212 d->graphics_mode = idata;
213 else
214 odata = d->graphics_mode;
215 break;
216
217 /* Pixel mask: */
218 case TGA_REG_GPXR_S: /* "one-shot" */
219 case TGA_REG_GPXR_P: /* persistant */
220 if (writeflag == MEM_WRITE)
221 d->pixel_mask = idata;
222 else
223 odata = d->pixel_mask;
224 break;
225
226 /* Horizonsal size: */
227 case TGA_REG_VHCR:
228 odata = dec21030_default_xsize / 4; /* lowest 9 bits */
229 break;
230
231 /* Vertical size: */
232 case TGA_REG_VVCR:
233 odata = dec21030_default_ysize; /* lowest 11 bits */
234 break;
235
236 /* Block copy source: */
237 case TGA_REG_GCSR:
238 d->copy_source = idata;
239 debug("[ dec21030: block copy source = 0x%08x ]\n", idata);
240 break;
241
242 /* Block copy destination: */
243 case TGA_REG_GCDR:
244 debug("[ dec21030: block copy destination = 0x%08x ]\n", idata);
245 newlen = 64;
246 /* Both source and destination are raw framebuffer addresses,
247 offset by 0x1000. */
248 dev_fb_access(cpu, mem, d->copy_source - 0x1000,
249 buf2, newlen, MEM_READ, d->vfb_data);
250 dev_fb_access(cpu, mem, idata - 0x1000,
251 buf2, newlen, MEM_WRITE, d->vfb_data);
252 break;
253
254 default:
255 if (writeflag == MEM_WRITE)
256 debug("[ dec21030: unimplemented write to address"
257 " 0x%x (=reg 0x%x), data=0x%02x ]\n",
258 (int)relative_addr, reg, (int)idata);
259 else
260 debug("[ dec21030: unimplemented read from address"
261 " 0x%x (=reg 0x%x) ]\n", (int)relative_addr, reg);
262 }
263
264 if (writeflag == MEM_READ)
265 memory_writemax64(cpu, data, len, odata);
266
267 return 1;
268 }
269
270
271 /*
272 * pci_dec21030_init():
273 */
274 void pci_dec21030_init(struct machine *machine, struct memory *mem)
275 {
276 struct dec21030_data *d;
277
278 d = malloc(sizeof(struct dec21030_data));
279 if (d == NULL) {
280 fprintf(stderr, "out of memory\n");
281 exit(1);
282 }
283 memset(d, 0, sizeof(struct dec21030_data));
284
285 /* TODO: this address is based on what NetBSD/arc uses...
286 fix this */
287 memory_device_register(mem, "dec21030", 0x100000000ULL,
288 128*1048576, dev_dec21030_access, d, MEM_DEFAULT, NULL);
289
290 /*
291 * TODO: I have no idea about how/where this framebuffer should
292 * be in relation to the pci device
293 */
294 d->vfb_data = dev_fb_init(machine, mem, FRAMEBUFFER_PADDR, VFB_GENERIC,
295 dec21030_default_xsize, dec21030_default_ysize,
296 dec21030_default_xsize, dec21030_default_ysize, 8, "TGA");
297 }
298
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