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dpavlin |
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/* |
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* Copyright (C) 2004-2006 Anders Gavare. All rights reserved. |
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* |
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* Redistribution and use in source and binary forms, with or without |
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* modification, are permitted provided that the following conditions are met: |
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* |
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* 1. Redistributions of source code must retain the above copyright |
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* notice, this list of conditions and the following disclaimer. |
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* 2. Redistributions in binary form must reproduce the above copyright |
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* notice, this list of conditions and the following disclaimer in the |
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* documentation and/or other materials provided with the distribution. |
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* 3. The name of the author may not be used to endorse or promote products |
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* derived from this software without specific prior written permission. |
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* |
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND |
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE |
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS |
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) |
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY |
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF |
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* SUCH DAMAGE. |
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* |
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* |
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* $Id: dev_z8530.c,v 1.5 2006/02/09 20:02:59 debug Exp $ |
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* |
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* Zilog "zs" serial controller (Z8530). |
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* |
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* Features: |
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* o) Two channels, 0 = "channel B", 1 = "channel A". |
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* |
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* This is a work in progress... TODOs include: |
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* o) Implement more of the register set. |
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* o) Verify that it works with other guest OSes than NetBSD and OpenBSD. |
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* o) Implement DMA! |
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*/ |
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#include <stdio.h> |
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#include <stdlib.h> |
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#include <string.h> |
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#include "console.h" |
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#include "cpu.h" |
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#include "device.h" |
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#include "machine.h" |
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#include "memory.h" |
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#include "misc.h" |
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#include "z8530reg.h" |
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#define debug fatal |
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#define ZS_TICK_SHIFT 14 |
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#define ZS_N_REGS 16 |
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#define DEV_Z8530_LENGTH 4 |
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struct z8530_data { |
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int irq_nr; |
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int dma_irq_nr; |
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int irq_asserted; |
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int in_use; |
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int addr_mult; |
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/* 2 of everything, because there are two channels. */ |
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int console_handle[2]; |
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int reg_select[2]; |
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uint8_t rr[2][ZS_N_REGS]; |
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uint8_t wr[2][ZS_N_REGS]; |
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}; |
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/* |
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* check_incoming(): |
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*/ |
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static void check_incoming(struct cpu *cpu, struct z8530_data *d) |
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{ |
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if (console_charavail(d->console_handle[0])) { |
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d->rr[1][3] |= ZSRR3_IP_B_RX; |
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d->rr[0][0] |= ZSRR0_RX_READY; |
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} |
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if (console_charavail(d->console_handle[1])) { |
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d->rr[1][3] |= ZSRR3_IP_A_RX; |
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d->rr[1][0] |= ZSRR0_RX_READY; |
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} |
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} |
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/* |
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* dev_z8530_tick(): |
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*/ |
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void dev_z8530_tick(struct cpu *cpu, void *extra) |
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{ |
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struct z8530_data *d = (struct z8530_data *) extra; |
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int asserted = 0; |
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if (d->rr[1][3] & ZSRR3_IP_B_TX && d->wr[0][1] & ZSWR1_TIE) |
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asserted = 1; |
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if (d->rr[1][3] & ZSRR3_IP_A_TX && d->wr[1][1] & ZSWR1_TIE) |
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asserted = 1; |
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d->rr[1][3] &= ~(ZSRR3_IP_B_RX | ZSRR3_IP_A_RX); |
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if (!asserted) |
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check_incoming(cpu, d); |
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if (d->rr[1][3] & ZSRR3_IP_B_RX && (d->wr[0][1]&0x18) != ZSWR1_RIE_NONE) |
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asserted = 1; |
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if (d->rr[1][3] & ZSRR3_IP_A_RX && (d->wr[1][1]&0x18) != ZSWR1_RIE_NONE) |
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asserted = 1; |
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if (!(d->wr[1][9] & ZSWR9_MASTER_IE)) |
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asserted = 0; |
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if (asserted) |
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cpu_interrupt(cpu, d->irq_nr); |
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if (d->irq_asserted && !asserted) |
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cpu_interrupt_ack(cpu, d->irq_nr); |
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d->irq_asserted = asserted; |
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} |
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/* |
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* dev_z8530_access(): |
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*/ |
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DEVICE_ACCESS(z8530) |
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{ |
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struct z8530_data *d = extra; |
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uint64_t idata = 0, odata = 0; |
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int port_nr; |
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if (writeflag == MEM_WRITE) |
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idata = memory_readmax64(cpu, data, len); |
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/* Both ports are always ready to transmit: */ |
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d->rr[0][0] |= ZSRR0_TX_READY | ZSRR0_DCD | ZSRR0_CTS; |
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d->rr[1][0] |= ZSRR0_TX_READY | ZSRR0_DCD | ZSRR0_CTS; |
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relative_addr /= d->addr_mult; |
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port_nr = relative_addr / 2; |
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relative_addr &= 1; |
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if (relative_addr == 0) { |
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/* Register access: */ |
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if (writeflag == MEM_READ) { |
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odata = d->rr[port_nr][d->reg_select[port_nr]]; |
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if (d->reg_select[port_nr] != 0) |
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debug("[ z8530: read from port %i reg %2i: " |
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"0x%02x ]\n", port_nr, d->reg_select[ |
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port_nr], (int)odata); |
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d->reg_select[port_nr] = 0; |
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} else { |
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if (d->reg_select[port_nr] == 0) { |
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d->reg_select[port_nr] = idata & 15; |
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} else { |
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d->wr[port_nr][d->reg_select[port_nr]] = idata; |
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switch (d->reg_select[port_nr]) { |
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case 8: /* Interrupt ack: */ |
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if (idata == ZSWR0_CLR_INTR) |
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d->rr[1][3] = 0; |
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break; |
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default:debug("[ z8530: write to port %i reg " |
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"%2i: 0x%02x ]\n", port_nr, d-> |
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reg_select[port_nr], (int)idata); |
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} |
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d->reg_select[port_nr] = 0; |
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} |
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} |
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} else { |
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/* Data access: */ |
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if (writeflag == MEM_READ) { |
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int x = console_readchar(d->console_handle[port_nr]); |
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d->rr[port_nr][0] &= ~ZSRR0_RX_READY; |
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odata = x < 0? 0 : x; |
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} else { |
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idata &= 255; |
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if (idata != 0) |
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console_putchar(d->console_handle[port_nr], |
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idata); |
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if (1 /* d->wr[port_nr][1] & ZSWR1_TIE */) { |
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if (port_nr == 0) |
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d->rr[1][3] |= ZSRR3_IP_B_TX; |
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else |
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d->rr[1][3] |= ZSRR3_IP_A_TX; |
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} |
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} |
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} |
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if (writeflag == MEM_READ) |
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memory_writemax64(cpu, data, len, odata); |
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dev_z8530_tick(cpu, extra); |
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return 1; |
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} |
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DEVINIT(z8530) |
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{ |
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struct z8530_data *d = malloc(sizeof(struct z8530_data)); |
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char tmp[100]; |
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if (d == NULL) { |
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fprintf(stderr, "out of memory\n"); |
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exit(1); |
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} |
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memset(d, 0, sizeof(struct z8530_data)); |
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d->irq_nr = devinit->irq_nr; |
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d->dma_irq_nr = devinit->dma_irq_nr; |
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d->in_use = devinit->in_use; |
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d->addr_mult = devinit->addr_mult; |
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snprintf(tmp, sizeof(tmp), "%s [ch-b]", devinit->name); |
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d->console_handle[0] = console_start_slave(devinit->machine, tmp, |
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d->in_use); |
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snprintf(tmp, sizeof(tmp), "%s [ch-a]", devinit->name); |
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d->console_handle[1] = console_start_slave(devinit->machine, tmp, 0); |
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if (devinit->name2 != NULL && devinit->name2[0]) |
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snprintf(tmp, sizeof(tmp), "%s [%s]", devinit->name, |
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devinit->name2); |
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else |
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snprintf(tmp, sizeof(tmp), "%s", devinit->name); |
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memory_device_register(devinit->machine->memory, tmp, devinit->addr, |
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DEV_Z8530_LENGTH * d->addr_mult, dev_z8530_access, d, DM_DEFAULT, |
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NULL); |
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machine_add_tickfunction(devinit->machine, dev_z8530_tick, d, |
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ZS_TICK_SHIFT); |
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devinit->return_ptr = (void *)(size_t) d->console_handle[0]; |
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return 1; |
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} |
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