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dpavlin |
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/* |
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* Copyright (C) 2004-2005 Anders Gavare. All rights reserved. |
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* |
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* Redistribution and use in source and binary forms, with or without |
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* modification, are permitted provided that the following conditions are met: |
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* |
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* 1. Redistributions of source code must retain the above copyright |
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* notice, this list of conditions and the following disclaimer. |
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* 2. Redistributions in binary form must reproduce the above copyright |
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* notice, this list of conditions and the following disclaimer in the |
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* documentation and/or other materials provided with the distribution. |
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* 3. The name of the author may not be used to endorse or promote products |
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* derived from this software without specific prior written permission. |
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* |
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND |
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE |
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS |
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) |
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY |
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF |
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* SUCH DAMAGE. |
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* |
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dpavlin |
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* |
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* $Id: dev_wdc.c,v 1.39 2005/09/27 23:55:44 debug Exp $ |
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* |
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* Standard "wdc" IDE controller. |
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dpavlin |
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*/ |
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#include <stdio.h> |
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#include <stdlib.h> |
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#include <string.h> |
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#include "console.h" |
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#include "cpu.h" |
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dpavlin |
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#include "device.h" |
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dpavlin |
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#include "diskimage.h" |
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#include "machine.h" |
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#include "memory.h" |
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#include "misc.h" |
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#include "wdcreg.h" |
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dpavlin |
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#define DEV_WDC_LENGTH 8 |
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dpavlin |
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#define WDC_TICK_SHIFT 14 |
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#define WDC_INBUF_SIZE (512*257) |
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dpavlin |
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/* |
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* INT_DELAY=2 to be safe, 1 is faster but maybe buggy. 0 is fastest. |
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* |
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* The only reason for this delay to exist is because (some versions of) |
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* NetBSD for hpcmips have interrupt problems. These problems are not only |
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* triggered inside the emulator, but also on real hardware. Using the |
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* delay is an ugly (but working) work-around. |
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*/ |
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dpavlin |
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#define INT_DELAY 1 |
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dpavlin |
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extern int quiet_mode; |
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dpavlin |
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/* #define debug fatal */ |
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struct wdc_data { |
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int irq_nr; |
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int base_drive; |
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dpavlin |
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int data_debug; |
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dpavlin |
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|
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dpavlin |
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/* Cached values: */ |
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int cyls[2]; |
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int heads[2]; |
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int sectors_per_track[2]; |
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dpavlin |
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unsigned char identify_struct[512]; |
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unsigned char inbuf[WDC_INBUF_SIZE]; |
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int inbuf_head; |
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int inbuf_tail; |
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dpavlin |
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int delayed_interrupt; |
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dpavlin |
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int write_in_progress; |
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int write_count; |
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int64_t write_offset; |
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int error; |
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int precomp; |
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int seccnt; |
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int sector; |
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int cyl_lo; |
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int cyl_hi; |
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int sectorsize; |
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int lba; |
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int drive; |
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int head; |
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int cur_command; |
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}; |
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/* |
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* dev_wdc_tick(): |
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*/ |
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void dev_wdc_tick(struct cpu *cpu, void *extra) |
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{ |
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struct wdc_data *d = extra; |
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if (d->delayed_interrupt) { |
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d->delayed_interrupt --; |
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if (d->delayed_interrupt == 0) |
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cpu_interrupt(cpu, d->irq_nr); |
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} |
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} |
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/* |
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* wdc_addtoinbuf(): |
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* |
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* Write to the inbuf at its head, read at its tail. |
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*/ |
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static void wdc_addtoinbuf(struct wdc_data *d, int c) |
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{ |
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d->inbuf[d->inbuf_head] = c; |
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d->inbuf_head = (d->inbuf_head + 1) % WDC_INBUF_SIZE; |
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if (d->inbuf_head == d->inbuf_tail) |
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dpavlin |
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fatal("[ wdc_addtoinbuf(): WARNING! wdc inbuf overrun ]\n"); |
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dpavlin |
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} |
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/* |
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* wdc_get_inbuf(): |
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* |
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* Read from the tail of inbuf. |
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*/ |
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static uint64_t wdc_get_inbuf(struct wdc_data *d) |
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{ |
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int c = d->inbuf[d->inbuf_tail]; |
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if (d->inbuf_head == d->inbuf_tail) { |
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dpavlin |
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fatal("[ wdc: WARNING! someone is reading too much from the " |
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"wdc inbuf! ]\n"); |
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dpavlin |
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return -1; |
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} |
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d->inbuf_tail = (d->inbuf_tail + 1) % WDC_INBUF_SIZE; |
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return c; |
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} |
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/* |
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* wdc_initialize_identify_struct(d): |
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*/ |
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static void wdc_initialize_identify_struct(struct cpu *cpu, struct wdc_data *d) |
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{ |
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dpavlin |
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uint64_t total_size; |
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dpavlin |
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char namebuf[40]; |
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dpavlin |
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dpavlin |
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total_size = diskimage_getsize(cpu->machine, d->drive + d->base_drive, |
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DISKIMAGE_IDE); |
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dpavlin |
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memset(d->identify_struct, 0, sizeof(d->identify_struct)); |
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/* Offsets are in 16-bit WORDS! High byte, then low. */ |
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/* 0: general flags */ |
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d->identify_struct[2 * 0 + 0] = 0; |
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d->identify_struct[2 * 0 + 1] = 1 << 6; |
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/* 1: nr of cylinders */ |
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dpavlin |
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d->identify_struct[2 * 1 + 0] = (d->cyls[d->drive] >> 8); |
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d->identify_struct[2 * 1 + 1] = d->cyls[d->drive] & 255; |
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dpavlin |
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/* 3: nr of heads */ |
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dpavlin |
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d->identify_struct[2 * 3 + 0] = d->heads[d->drive] >> 8; |
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d->identify_struct[2 * 3 + 1] = d->heads[d->drive]; |
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dpavlin |
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/* 6: sectors per track */ |
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dpavlin |
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d->identify_struct[2 * 6 + 0] = d->sectors_per_track[d->drive] >> 8; |
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d->identify_struct[2 * 6 + 1] = d->sectors_per_track[d->drive]; |
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dpavlin |
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/* 10-19: Serial number */ |
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memcpy(&d->identify_struct[2 * 10], "S/N 1234-5678 ", 20); |
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/* 23-26: Firmware version */ |
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memcpy(&d->identify_struct[2 * 23], "VER 1.0 ", 8); |
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/* 27-46: Model number */ |
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dpavlin |
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if (diskimage_getname(cpu->machine, d->drive + d->base_drive, |
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DISKIMAGE_IDE, namebuf, sizeof(namebuf))) { |
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int i; |
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for (i=0; i<sizeof(namebuf); i++) |
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if (namebuf[i] == 0) { |
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for (; i<sizeof(namebuf); i++) |
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namebuf[i] = ' '; |
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break; |
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} |
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memcpy(&d->identify_struct[2 * 27], namebuf, 40); |
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} else |
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memcpy(&d->identify_struct[2 * 27], |
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"Fake GXemul IDE disk ", 40); |
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dpavlin |
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/* 47: max sectors per multitransfer */ |
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d->identify_struct[2 * 47 + 0] = 0x80; |
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d->identify_struct[2 * 47 + 1] = 1; /* 1 or 16? */ |
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/* 57-58: current capacity in sectors */ |
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d->identify_struct[2 * 57 + 0] = ((total_size / 512) >> 24) % 255; |
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d->identify_struct[2 * 57 + 1] = ((total_size / 512) >> 16) % 255; |
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d->identify_struct[2 * 58 + 0] = ((total_size / 512) >> 8) % 255; |
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d->identify_struct[2 * 58 + 1] = (total_size / 512) & 255; |
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/* 60-61: total nr of addresable sectors */ |
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d->identify_struct[2 * 60 + 0] = ((total_size / 512) >> 24) % 255; |
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d->identify_struct[2 * 60 + 1] = ((total_size / 512) >> 16) % 255; |
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d->identify_struct[2 * 61 + 0] = ((total_size / 512) >> 8) % 255; |
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d->identify_struct[2 * 61 + 1] = (total_size / 512) & 255; |
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} |
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/* |
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dpavlin |
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* wdc__read(): |
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*/ |
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void wdc__read(struct cpu *cpu, struct wdc_data *d) |
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{ |
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unsigned char buf[512]; |
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int i, cyl = d->cyl_hi * 256+ d->cyl_lo; |
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int count = d->seccnt? d->seccnt : 256; |
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uint64_t offset = 512 * (d->sector - 1 |
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+ d->head * d->sectors_per_track[d->drive] + |
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d->heads[d->drive] * d->sectors_per_track[d->drive] * cyl); |
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#if 0 |
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/* LBA: */ |
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if (d->lba) |
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offset = 512 * (((d->head & 0xf) << 24) + (cyl << 8) |
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+ d->sector); |
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printf("WDC read from offset %lli\n", (long long)offset); |
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#endif |
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while (count > 0) { |
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diskimage_access(cpu->machine, d->drive + d->base_drive, |
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DISKIMAGE_IDE, 0, offset, buf, 512); |
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/* TODO: result code */ |
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for (i=0; i<512; i++) |
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wdc_addtoinbuf(d, buf[i]); |
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offset += 512; |
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count --; |
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} |
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d->delayed_interrupt = INT_DELAY; |
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} |
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/* |
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* wdc__write(): |
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*/ |
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void wdc__write(struct cpu *cpu, struct wdc_data *d) |
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{ |
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int cyl = d->cyl_hi * 256+ d->cyl_lo; |
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int count = d->seccnt? d->seccnt : 256; |
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uint64_t offset = 512 * (d->sector - 1 |
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+ d->head * d->sectors_per_track[d->drive] + |
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d->heads[d->drive] * d->sectors_per_track[d->drive] * cyl); |
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#if 0 |
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/* LBA: */ |
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if (d->lba) |
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offset = 512 * (((d->head & 0xf) << 24) + |
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(cyl << 8) + d->sector); |
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printf("WDC write to offset %lli\n", (long long)offset); |
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#endif |
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d->write_in_progress = 1; |
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d->write_count = count; |
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d->write_offset = offset; |
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/* TODO: result code? */ |
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} |
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/* |
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dpavlin |
4 |
* status_byte(): |
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dpavlin |
14 |
* |
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* Return a reasonable status byte corresponding to the controller's current |
| 286 |
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* state. |
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dpavlin |
4 |
*/ |
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static int status_byte(struct wdc_data *d, struct cpu *cpu) |
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{ |
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int odata = 0; |
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dpavlin |
14 |
/* |
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* Modern versions of OpenBSD wants WDCS_DSC. (Thanks to Alexander |
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* Yurchenko for noticing this.) |
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*/ |
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dpavlin |
6 |
if (diskimage_exist(cpu->machine, d->drive + d->base_drive, |
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DISKIMAGE_IDE)) |
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dpavlin |
14 |
odata |= WDCS_DRDY | WDCS_DSC; |
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dpavlin |
4 |
if (d->inbuf_head != d->inbuf_tail) |
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odata |= WDCS_DRQ; |
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if (d->write_in_progress) |
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odata |= WDCS_DRQ; |
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if (d->error) |
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odata |= WDCS_ERR; |
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return odata; |
| 307 |
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} |
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/* |
| 311 |
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* dev_wdc_altstatus_access(): |
| 312 |
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*/ |
| 313 |
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int dev_wdc_altstatus_access(struct cpu *cpu, struct memory *mem, |
| 314 |
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uint64_t relative_addr, unsigned char *data, size_t len, |
| 315 |
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int writeflag, void *extra) |
| 316 |
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{ |
| 317 |
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struct wdc_data *d = extra; |
| 318 |
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uint64_t idata = 0, odata = 0; |
| 319 |
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| 320 |
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idata = memory_readmax64(cpu, data, len); |
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/* Same as the normal status byte? */ |
| 323 |
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odata = status_byte(d, cpu); |
| 324 |
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| 325 |
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if (writeflag==MEM_READ) |
| 326 |
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debug("[ wdc: read from ALTSTATUS: 0x%02x ]\n", |
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(int)odata); |
| 328 |
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else |
| 329 |
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debug("[ wdc: write to ALT. CTRL: 0x%02x ]\n", |
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(int)idata); |
| 331 |
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| 332 |
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if (writeflag == MEM_READ) |
| 333 |
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memory_writemax64(cpu, data, len, odata); |
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| 335 |
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return 1; |
| 336 |
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} |
| 337 |
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| 339 |
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/* |
| 340 |
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* dev_wdc_access(): |
| 341 |
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*/ |
| 342 |
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int dev_wdc_access(struct cpu *cpu, struct memory *mem, |
| 343 |
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uint64_t relative_addr, unsigned char *data, size_t len, |
| 344 |
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int writeflag, void *extra) |
| 345 |
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{ |
| 346 |
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struct wdc_data *d = extra; |
| 347 |
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uint64_t idata = 0, odata = 0; |
| 348 |
dpavlin |
14 |
int i; |
| 349 |
dpavlin |
4 |
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| 350 |
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idata = memory_readmax64(cpu, data, len); |
| 351 |
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| 352 |
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switch (relative_addr) { |
| 353 |
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| 354 |
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case wd_data: /* 0: data */ |
| 355 |
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if (writeflag==MEM_READ) { |
| 356 |
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odata = 0; |
| 357 |
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| 358 |
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/* TODO: This is hardcoded for little-endian? */ |
| 359 |
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| 360 |
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odata += wdc_get_inbuf(d); |
| 361 |
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if (len >= 2) |
| 362 |
|
|
odata += (wdc_get_inbuf(d) << 8); |
| 363 |
|
|
if (len == 4) { |
| 364 |
|
|
odata += (wdc_get_inbuf(d) << 16); |
| 365 |
|
|
odata += (wdc_get_inbuf(d) << 24); |
| 366 |
|
|
} |
| 367 |
|
|
|
| 368 |
dpavlin |
14 |
if (d->data_debug) |
| 369 |
|
|
debug("[ wdc: read from DATA: 0x%04x ]\n", |
| 370 |
|
|
(int)odata); |
| 371 |
dpavlin |
4 |
if (d->inbuf_tail != d->inbuf_head) |
| 372 |
|
|
d->delayed_interrupt = INT_DELAY; |
| 373 |
|
|
} else { |
| 374 |
|
|
int inbuf_len; |
| 375 |
dpavlin |
14 |
if (d->data_debug) |
| 376 |
|
|
debug("[ wdc: write to DATA (len=%i): " |
| 377 |
|
|
"0x%08lx ]\n", (int)len, (long)idata); |
| 378 |
dpavlin |
4 |
if (!d->write_in_progress) { |
| 379 |
|
|
fatal("[ wdc: write to DATA, but not " |
| 380 |
|
|
"expecting any? (len=%i): 0x%08lx ]\n", |
| 381 |
|
|
(int)len, (long)idata); |
| 382 |
|
|
} |
| 383 |
|
|
|
| 384 |
|
|
switch (len) { |
| 385 |
|
|
case 4: wdc_addtoinbuf(d, idata & 0xff); |
| 386 |
|
|
wdc_addtoinbuf(d, (idata >> 8) & 0xff); |
| 387 |
|
|
wdc_addtoinbuf(d, (idata >> 16) & 0xff); |
| 388 |
|
|
wdc_addtoinbuf(d, (idata >> 24) & 0xff); |
| 389 |
|
|
break; |
| 390 |
|
|
case 2: wdc_addtoinbuf(d, idata & 0xff); |
| 391 |
|
|
wdc_addtoinbuf(d, (idata >> 8) & 0xff); |
| 392 |
|
|
break; |
| 393 |
|
|
case 1: wdc_addtoinbuf(d, idata); break; |
| 394 |
|
|
default:fatal("wdc: unimplemented write len %i\n", len); |
| 395 |
|
|
exit(1); |
| 396 |
|
|
} |
| 397 |
|
|
|
| 398 |
|
|
inbuf_len = d->inbuf_head - d->inbuf_tail; |
| 399 |
|
|
while (inbuf_len < 0) |
| 400 |
|
|
inbuf_len += WDC_INBUF_SIZE; |
| 401 |
|
|
|
| 402 |
|
|
#if 0 |
| 403 |
|
|
if ((inbuf_len % (512 * d->write_count)) == 0) { |
| 404 |
dpavlin |
14 |
#else |
| 405 |
|
|
if ((inbuf_len % 512) == 0) { |
| 406 |
dpavlin |
4 |
#endif |
| 407 |
|
|
int count = 1; /* d->write_count; */ |
| 408 |
|
|
unsigned char *buf = malloc(count * 512); |
| 409 |
|
|
if (buf == NULL) { |
| 410 |
|
|
fprintf(stderr, "out of memory\n"); |
| 411 |
|
|
exit(1); |
| 412 |
|
|
} |
| 413 |
|
|
|
| 414 |
|
|
for (i=0; i<512 * count; i++) |
| 415 |
|
|
buf[i] = wdc_get_inbuf(d); |
| 416 |
|
|
|
| 417 |
|
|
diskimage_access(cpu->machine, |
| 418 |
dpavlin |
6 |
d->drive + d->base_drive, DISKIMAGE_IDE, 1, |
| 419 |
dpavlin |
4 |
d->write_offset, buf, 512 * count); |
| 420 |
|
|
free(buf); |
| 421 |
|
|
|
| 422 |
|
|
d->write_count --; |
| 423 |
|
|
d->write_offset += 512; |
| 424 |
|
|
|
| 425 |
|
|
d->delayed_interrupt = INT_DELAY; |
| 426 |
|
|
|
| 427 |
|
|
if (d->write_count == 0) |
| 428 |
|
|
d->write_in_progress = 0; |
| 429 |
|
|
} |
| 430 |
|
|
} |
| 431 |
|
|
break; |
| 432 |
|
|
|
| 433 |
|
|
case wd_error: /* 1: error (r), precomp (w) */ |
| 434 |
|
|
if (writeflag==MEM_READ) { |
| 435 |
|
|
odata = d->error; |
| 436 |
dpavlin |
14 |
debug("[ wdc: read from ERROR: 0x%02x ]\n", |
| 437 |
|
|
(int)odata); |
| 438 |
dpavlin |
4 |
/* TODO: is the error value cleared on read? */ |
| 439 |
|
|
d->error = 0; |
| 440 |
|
|
} else { |
| 441 |
|
|
d->precomp = idata; |
| 442 |
dpavlin |
14 |
debug("[ wdc: write to PRECOMP: 0x%02x ]\n",(int)idata); |
| 443 |
dpavlin |
4 |
} |
| 444 |
|
|
break; |
| 445 |
|
|
|
| 446 |
|
|
case wd_seccnt: /* 2: sector count */ |
| 447 |
|
|
if (writeflag==MEM_READ) { |
| 448 |
|
|
odata = d->seccnt; |
| 449 |
dpavlin |
14 |
debug("[ wdc: read from SECCNT: 0x%02x ]\n",(int)odata); |
| 450 |
dpavlin |
4 |
} else { |
| 451 |
|
|
d->seccnt = idata; |
| 452 |
dpavlin |
14 |
debug("[ wdc: write to SECCNT: 0x%02x ]\n", (int)idata); |
| 453 |
dpavlin |
4 |
} |
| 454 |
|
|
break; |
| 455 |
|
|
|
| 456 |
|
|
case wd_sector: /* 3: first sector */ |
| 457 |
|
|
if (writeflag==MEM_READ) { |
| 458 |
|
|
odata = d->sector; |
| 459 |
dpavlin |
14 |
debug("[ wdc: read from SECTOR: 0x%02x ]\n",(int)odata); |
| 460 |
dpavlin |
4 |
} else { |
| 461 |
|
|
d->sector = idata; |
| 462 |
dpavlin |
14 |
debug("[ wdc: write to SECTOR: 0x%02x ]\n", (int)idata); |
| 463 |
dpavlin |
4 |
} |
| 464 |
|
|
break; |
| 465 |
|
|
|
| 466 |
|
|
case wd_cyl_lo: /* 4: cylinder low */ |
| 467 |
|
|
if (writeflag==MEM_READ) { |
| 468 |
|
|
odata = d->cyl_lo; |
| 469 |
dpavlin |
14 |
debug("[ wdc: read from CYL_LO: 0x%02x ]\n",(int)odata); |
| 470 |
dpavlin |
4 |
} else { |
| 471 |
|
|
d->cyl_lo = idata; |
| 472 |
dpavlin |
14 |
debug("[ wdc: write to CYL_LO: 0x%02x ]\n", (int)idata); |
| 473 |
dpavlin |
4 |
} |
| 474 |
|
|
break; |
| 475 |
|
|
|
| 476 |
|
|
case wd_cyl_hi: /* 5: cylinder low */ |
| 477 |
|
|
if (writeflag==MEM_READ) { |
| 478 |
|
|
odata = d->cyl_hi; |
| 479 |
dpavlin |
14 |
debug("[ wdc: read from CYL_HI: 0x%02x ]\n",(int)odata); |
| 480 |
dpavlin |
4 |
} else { |
| 481 |
|
|
d->cyl_hi = idata; |
| 482 |
dpavlin |
14 |
debug("[ wdc: write to CYL_HI: 0x%02x ]\n", (int)idata); |
| 483 |
dpavlin |
4 |
} |
| 484 |
|
|
break; |
| 485 |
|
|
|
| 486 |
|
|
case wd_sdh: /* 6: sectorsize/drive/head */ |
| 487 |
|
|
if (writeflag==MEM_READ) { |
| 488 |
|
|
odata = (d->sectorsize << 6) + (d->lba << 5) + |
| 489 |
|
|
(d->drive << 4) + (d->head); |
| 490 |
|
|
debug("[ wdc: read from SDH: 0x%02x (sectorsize %i," |
| 491 |
|
|
" lba=%i, drive %i, head %i) ]\n", (int)odata, |
| 492 |
|
|
d->sectorsize, d->lba, d->drive, d->head); |
| 493 |
|
|
} else { |
| 494 |
|
|
d->sectorsize = (idata >> 6) & 3; |
| 495 |
|
|
d->lba = (idata >> 5) & 1; |
| 496 |
|
|
d->drive = (idata >> 4) & 1; |
| 497 |
|
|
d->head = idata & 0xf; |
| 498 |
|
|
debug("[ wdc: write to SDH: 0x%02x (sectorsize %i," |
| 499 |
|
|
" lba=%i, drive %i, head %i) ]\n", (int)idata, |
| 500 |
|
|
d->sectorsize, d->lba, d->drive, d->head); |
| 501 |
|
|
} |
| 502 |
|
|
break; |
| 503 |
|
|
|
| 504 |
|
|
case wd_command: /* 7: command or status */ |
| 505 |
|
|
if (writeflag==MEM_READ) { |
| 506 |
|
|
odata = status_byte(d, cpu); |
| 507 |
dpavlin |
6 |
if (!quiet_mode) |
| 508 |
|
|
debug("[ wdc: read from STATUS: 0x%02x ]\n", |
| 509 |
dpavlin |
14 |
(int)odata); |
| 510 |
dpavlin |
4 |
cpu_interrupt_ack(cpu, d->irq_nr); |
| 511 |
|
|
d->delayed_interrupt = 0; |
| 512 |
|
|
} else { |
| 513 |
dpavlin |
14 |
debug("[ wdc: write to COMMAND: 0x%02x ]\n",(int)idata); |
| 514 |
dpavlin |
4 |
d->cur_command = idata; |
| 515 |
|
|
|
| 516 |
|
|
/* TODO: Is this correct behaviour? */ |
| 517 |
|
|
if (!diskimage_exist(cpu->machine, |
| 518 |
dpavlin |
6 |
d->drive + d->base_drive, DISKIMAGE_IDE)) { |
| 519 |
dpavlin |
4 |
d->error |= WDCE_ABRT; |
| 520 |
|
|
d->delayed_interrupt = INT_DELAY; |
| 521 |
|
|
break; |
| 522 |
|
|
} |
| 523 |
|
|
|
| 524 |
|
|
/* Handle the command: */ |
| 525 |
|
|
switch (d->cur_command) { |
| 526 |
dpavlin |
14 |
|
| 527 |
dpavlin |
4 |
case WDCC_READ: |
| 528 |
dpavlin |
14 |
if (!quiet_mode) |
| 529 |
|
|
debug("[ wdc: READ from drive %i, head" |
| 530 |
|
|
" %i, cyl %i, sector %i, nsecs %i " |
| 531 |
|
|
"]\n", d->drive, d->head, |
| 532 |
|
|
d->cyl_hi*256+d->cyl_lo, d->sector, |
| 533 |
|
|
d->seccnt); |
| 534 |
|
|
wdc__read(cpu, d); |
| 535 |
|
|
break; |
| 536 |
dpavlin |
6 |
|
| 537 |
dpavlin |
4 |
case WDCC_WRITE: |
| 538 |
dpavlin |
14 |
if (!quiet_mode) |
| 539 |
|
|
debug("[ wdc: WRITE to drive %i, head" |
| 540 |
|
|
" %i, cyl %i, sector %i, nsecs %i" |
| 541 |
|
|
" ]\n", d->drive, d->head, |
| 542 |
|
|
d->cyl_hi*256+d->cyl_lo, d->sector, |
| 543 |
|
|
d->seccnt); |
| 544 |
|
|
wdc__write(cpu, d); |
| 545 |
dpavlin |
4 |
break; |
| 546 |
|
|
|
| 547 |
|
|
case WDCC_IDP: /* Initialize drive parameters */ |
| 548 |
|
|
debug("[ wdc: IDP drive %i (TODO) ]\n", |
| 549 |
|
|
d->drive); |
| 550 |
|
|
/* TODO */ |
| 551 |
|
|
d->delayed_interrupt = INT_DELAY; |
| 552 |
|
|
break; |
| 553 |
dpavlin |
14 |
|
| 554 |
dpavlin |
4 |
case SET_FEATURES: |
| 555 |
|
|
fatal("[ wdc: SET_FEATURES drive %i (TODO), " |
| 556 |
|
|
"feature 0x%02x ]\n", d->drive, d->precomp); |
| 557 |
|
|
/* TODO */ |
| 558 |
|
|
switch (d->precomp) { |
| 559 |
|
|
case WDSF_SET_MODE: |
| 560 |
|
|
fatal("[ wdc: WDSF_SET_MODE drive %i, " |
| 561 |
|
|
"pio/dma flags 0x%02x ]\n", |
| 562 |
|
|
d->drive, d->seccnt); |
| 563 |
|
|
break; |
| 564 |
|
|
default: |
| 565 |
|
|
d->error |= WDCE_ABRT; |
| 566 |
|
|
} |
| 567 |
|
|
/* TODO: always interrupt? */ |
| 568 |
|
|
d->delayed_interrupt = INT_DELAY; |
| 569 |
|
|
break; |
| 570 |
dpavlin |
14 |
|
| 571 |
dpavlin |
4 |
case WDCC_RECAL: |
| 572 |
|
|
debug("[ wdc: RECAL drive %i ]\n", d->drive); |
| 573 |
|
|
d->delayed_interrupt = INT_DELAY; |
| 574 |
|
|
break; |
| 575 |
dpavlin |
14 |
|
| 576 |
dpavlin |
4 |
case WDCC_IDENTIFY: |
| 577 |
|
|
debug("[ wdc: IDENTIFY drive %i ]\n", d->drive); |
| 578 |
|
|
wdc_initialize_identify_struct(cpu, d); |
| 579 |
|
|
/* The IDENTIFY data block is sent out |
| 580 |
|
|
in low/high byte order: */ |
| 581 |
|
|
for (i=0; i<sizeof(d->identify_struct); i+=2) { |
| 582 |
|
|
wdc_addtoinbuf(d, d->identify_struct |
| 583 |
|
|
[i+1]); |
| 584 |
|
|
wdc_addtoinbuf(d, d->identify_struct |
| 585 |
|
|
[i+0]); |
| 586 |
|
|
} |
| 587 |
|
|
d->delayed_interrupt = INT_DELAY; |
| 588 |
|
|
break; |
| 589 |
dpavlin |
14 |
|
| 590 |
dpavlin |
4 |
case WDCC_IDLE_IMMED: |
| 591 |
|
|
debug("[ wdc: IDLE_IMMED drive %i ]\n", |
| 592 |
|
|
d->drive); |
| 593 |
|
|
/* TODO: interrupt here? */ |
| 594 |
|
|
d->delayed_interrupt = INT_DELAY; |
| 595 |
|
|
break; |
| 596 |
dpavlin |
14 |
|
| 597 |
|
|
/* Unsupported commands, without warning: */ |
| 598 |
|
|
case ATAPI_IDENTIFY_DEVICE: |
| 599 |
|
|
case WDCC_SEC_SET_PASSWORD: |
| 600 |
|
|
case WDCC_SEC_UNLOCK: |
| 601 |
|
|
case WDCC_SEC_ERASE_PREPARE: |
| 602 |
|
|
case WDCC_SEC_ERASE_UNIT: |
| 603 |
|
|
case WDCC_SEC_FREEZE_LOCK: |
| 604 |
|
|
case WDCC_SEC_DISABLE_PASSWORD: |
| 605 |
|
|
d->error |= WDCE_ABRT; |
| 606 |
|
|
break; |
| 607 |
|
|
|
| 608 |
dpavlin |
4 |
default: |
| 609 |
|
|
/* TODO */ |
| 610 |
|
|
d->error |= WDCE_ABRT; |
| 611 |
|
|
|
| 612 |
dpavlin |
14 |
fatal("[ wdc: WARNING! Unimplemented command " |
| 613 |
|
|
"0x%02x (drive %i, head %i, cyl %i, sector" |
| 614 |
|
|
" %i, nsecs %i) ]\n", d->cur_command, |
| 615 |
|
|
d->drive, d->head, d->cyl_hi*256+d->cyl_lo, |
| 616 |
dpavlin |
4 |
d->sector, d->seccnt); |
| 617 |
|
|
} |
| 618 |
|
|
} |
| 619 |
|
|
break; |
| 620 |
|
|
|
| 621 |
|
|
default: |
| 622 |
|
|
if (writeflag==MEM_READ) |
| 623 |
|
|
debug("[ wdc: read from 0x%02x ]\n", |
| 624 |
|
|
(int)relative_addr); |
| 625 |
|
|
else |
| 626 |
|
|
debug("[ wdc: write to 0x%02x: 0x%02x ]\n", |
| 627 |
|
|
(int)relative_addr, (int)idata); |
| 628 |
|
|
} |
| 629 |
|
|
|
| 630 |
|
|
if (writeflag == MEM_READ) |
| 631 |
|
|
memory_writemax64(cpu, data, len, odata); |
| 632 |
|
|
|
| 633 |
|
|
return 1; |
| 634 |
|
|
} |
| 635 |
|
|
|
| 636 |
|
|
|
| 637 |
|
|
/* |
| 638 |
dpavlin |
14 |
* devinit_wdc(): |
| 639 |
dpavlin |
4 |
*/ |
| 640 |
dpavlin |
14 |
int devinit_wdc(struct devinit *devinit) |
| 641 |
dpavlin |
4 |
{ |
| 642 |
|
|
struct wdc_data *d; |
| 643 |
|
|
uint64_t alt_status_addr; |
| 644 |
dpavlin |
14 |
int i; |
| 645 |
dpavlin |
4 |
|
| 646 |
|
|
d = malloc(sizeof(struct wdc_data)); |
| 647 |
|
|
if (d == NULL) { |
| 648 |
|
|
fprintf(stderr, "out of memory\n"); |
| 649 |
|
|
exit(1); |
| 650 |
|
|
} |
| 651 |
|
|
memset(d, 0, sizeof(struct wdc_data)); |
| 652 |
dpavlin |
14 |
d->irq_nr = devinit->irq_nr; |
| 653 |
dpavlin |
4 |
|
| 654 |
dpavlin |
14 |
/* base_drive = 0 for the primary controller, 2 for the secondary. */ |
| 655 |
|
|
d->base_drive = 0; |
| 656 |
|
|
if ((devinit->addr & 0xfff) == 0x170) |
| 657 |
|
|
d->base_drive = 2; |
| 658 |
dpavlin |
4 |
|
| 659 |
dpavlin |
14 |
alt_status_addr = devinit->addr + 0x206; |
| 660 |
|
|
|
| 661 |
dpavlin |
4 |
/* Special hack for pcic/hpcmips: TODO: Fix */ |
| 662 |
dpavlin |
14 |
if (devinit->addr == 0x14000180) |
| 663 |
dpavlin |
4 |
alt_status_addr = 0x14000386; |
| 664 |
|
|
|
| 665 |
dpavlin |
14 |
/* Get disk geometries: */ |
| 666 |
|
|
for (i=0; i<2; i++) |
| 667 |
|
|
if (diskimage_exist(devinit->machine, d->base_drive +i, |
| 668 |
|
|
DISKIMAGE_IDE)) |
| 669 |
|
|
diskimage_getchs(devinit->machine, d->base_drive + i, |
| 670 |
|
|
DISKIMAGE_IDE, &d->cyls[i], &d->heads[i], |
| 671 |
|
|
&d->sectors_per_track[i]); |
| 672 |
dpavlin |
4 |
|
| 673 |
dpavlin |
14 |
memory_device_register(devinit->machine->memory, "wdc_altstatus", |
| 674 |
|
|
alt_status_addr, 2, dev_wdc_altstatus_access, d, MEM_DEFAULT, NULL); |
| 675 |
|
|
memory_device_register(devinit->machine->memory, devinit->name, |
| 676 |
|
|
devinit->addr, DEV_WDC_LENGTH, dev_wdc_access, d, MEM_DEFAULT, |
| 677 |
|
|
NULL); |
| 678 |
|
|
|
| 679 |
|
|
machine_add_tickfunction(devinit->machine, dev_wdc_tick, |
| 680 |
dpavlin |
4 |
d, WDC_TICK_SHIFT); |
| 681 |
dpavlin |
14 |
|
| 682 |
|
|
return 1; |
| 683 |
dpavlin |
4 |
} |
| 684 |
|
|
|
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