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/* |
/* |
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* Copyright (C) 2004-2005 Anders Gavare. All rights reserved. |
* Copyright (C) 2004-2006 Anders Gavare. All rights reserved. |
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* |
* |
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* Redistribution and use in source and binary forms, with or without |
* Redistribution and use in source and binary forms, with or without |
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* modification, are permitted provided that the following conditions are met: |
* modification, are permitted provided that the following conditions are met: |
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* SUCH DAMAGE. |
* SUCH DAMAGE. |
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* |
* |
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* |
* |
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* $Id: dev_vr41xx.c,v 1.30 2005/08/05 09:11:48 debug Exp $ |
* $Id: dev_vr41xx.c,v 1.38 2006/07/23 19:36:04 debug Exp $ |
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* |
* |
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* VR41xx (actually, VR4122 and VR4131) misc functions. |
* VR41xx (actually, VR4122 and VR4131) misc functions. |
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* |
* |
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} |
} |
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/* |
DEVICE_TICK(vr41xx) |
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* dev_vr41xx_tick(): |
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*/ |
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void dev_vr41xx_tick(struct cpu *cpu, void *extra) |
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{ |
{ |
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struct vr41xx_data *d = extra; |
struct vr41xx_data *d = extra; |
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default: |
default: |
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if (writeflag == MEM_WRITE) |
if (writeflag == MEM_WRITE) |
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debug("[ vr41xx KIU: unimplemented write to offset " |
debug("[ vr41xx KIU: unimplemented write to offset " |
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"0x%x, data=0x%016llx ]\n", ofs, (long long)idata); |
"0x%x, data=0x%016"PRIx64" ]\n", ofs, |
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(uint64_t) idata); |
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else |
else |
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debug("[ vr41xx KIU: unimplemented read from offset " |
debug("[ vr41xx KIU: unimplemented read from offset " |
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"0x%x ]\n", ofs); |
"0x%x ]\n", ofs); |
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} |
} |
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/* |
DEVICE_ACCESS(vr41xx) |
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* dev_vr41xx_access(): |
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*/ |
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int dev_vr41xx_access(struct cpu *cpu, struct memory *mem, |
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uint64_t relative_addr, unsigned char *data, size_t len, |
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int writeflag, void *extra) |
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{ |
{ |
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struct vr41xx_data *d = (struct vr41xx_data *) extra; |
struct vr41xx_data *d = (struct vr41xx_data *) extra; |
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uint64_t idata = 0, odata = 0; |
uint64_t idata = 0, odata = 0; |
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int regnr; |
int regnr; |
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int revision = 0; |
int revision = 0; |
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idata = memory_readmax64(cpu, data, len); |
if (writeflag == MEM_WRITE) |
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idata = memory_readmax64(cpu, data, len); |
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regnr = relative_addr / sizeof(uint64_t); |
regnr = relative_addr / sizeof(uint64_t); |
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/* KIU ("Keyboard Interface Unit") is handled separately. */ |
/* KIU ("Keyboard Interface Unit") is handled separately. */ |
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default: |
default: |
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if (writeflag == MEM_WRITE) |
if (writeflag == MEM_WRITE) |
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debug("[ vr41xx: unimplemented write to address " |
debug("[ vr41xx: unimplemented write to address " |
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"0x%llx, data=0x%016llx ]\n", |
"0x%"PRIx64", data=0x%016"PRIx64" ]\n", |
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(long long)relative_addr, (long long)idata); |
(uint64_t) relative_addr, (uint64_t) idata); |
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else |
else |
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debug("[ vr41xx: unimplemented read from address " |
debug("[ vr41xx: unimplemented read from address " |
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"0x%llx ]\n", (long long)relative_addr); |
"0x%"PRIx64" ]\n", (uint64_t) relative_addr); |
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} |
} |
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ret: |
ret: |
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/* TODO: VRC4173 has the KIU at offset 0x100? */ |
/* TODO: VRC4173 has the KIU at offset 0x100? */ |
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d->kiu_offset = 0x180; |
d->kiu_offset = 0x180; |
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d->kiu_console_handle = console_start_slave_inputonly(machine, "kiu"); |
d->kiu_console_handle = console_start_slave_inputonly( |
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machine, "kiu", 1); |
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d->kiu_irq_nr = VRIP_INTR_KIU; |
d->kiu_irq_nr = VRIP_INTR_KIU; |
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switch (cpumodel) { |
switch (cpumodel) { |
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break; |
break; |
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case 4181: |
case 4181: |
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baseaddr = 0xa000000; |
baseaddr = 0xa000000; |
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dev_ram_init(mem, 0xb000000, 0x1000000, DEV_RAM_MIRROR, |
dev_ram_init(machine, 0xb000000, 0x1000000, DEV_RAM_MIRROR, |
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0xa000000); |
0xa000000); |
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break; |
break; |
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case 4122: |
case 4122: |
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} |
} |
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memory_device_register(mem, "vr41xx", baseaddr, DEV_VR41XX_LENGTH, |
memory_device_register(mem, "vr41xx", baseaddr, DEV_VR41XX_LENGTH, |
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dev_vr41xx_access, (void *)d, MEM_DEFAULT, NULL); |
dev_vr41xx_access, (void *)d, DM_DEFAULT, NULL); |
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/* |
/* |
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* TODO: Find out which controllers are at which addresses on |
* TODO: Find out which controllers are at which addresses on |
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* which chips. |
* which chips. |
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*/ |
*/ |
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if (cpumodel == 4131) { |
if (cpumodel == 4131) { |
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snprintf(tmps, sizeof(tmps), "ns16550 irq=%i addr=0x%llx " |
snprintf(tmps, sizeof(tmps), "ns16550 irq=%i addr=0x%"PRIx64" " |
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"name2=siu", 8+VRIP_INTR_SIU, (long long)(baseaddr+0x800)); |
"name2=siu", 8+VRIP_INTR_SIU, (uint64_t) (baseaddr+0x800)); |
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device_add(machine, tmps); |
device_add(machine, tmps); |
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} else { |
} else { |
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/* This is used by Linux and NetBSD: */ |
/* This is used by Linux and NetBSD: */ |
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device_add(machine, "pcic addr=0x140003e0"); |
device_add(machine, "pcic addr=0x140003e0"); |
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machine_add_tickfunction(machine, dev_vr41xx_tick, d, |
machine_add_tickfunction(machine, dev_vr41xx_tick, d, |
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DEV_VR41XX_TICKSHIFT); |
DEV_VR41XX_TICKSHIFT, 0.0); |
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/* Some machines (?) use ISA space at 0x15000000 instead of |
/* Some machines (?) use ISA space at 0x15000000 instead of |
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0x14000000, eg IBM WorkPad Z50. */ |
0x14000000, eg IBM WorkPad Z50. */ |
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dev_ram_init(mem, 0x15000000, 0x1000000, DEV_RAM_MIRROR, 0x14000000); |
dev_ram_init(machine, 0x15000000, 0x1000000, DEV_RAM_MIRROR, |
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0x14000000); |
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return d; |
return d; |
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} |
} |