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/* |
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* Copyright (C) 2004-2006 Anders Gavare. All rights reserved. |
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* |
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* Redistribution and use in source and binary forms, with or without |
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* modification, are permitted provided that the following conditions are met: |
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* |
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* 1. Redistributions of source code must retain the above copyright |
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* notice, this list of conditions and the following disclaimer. |
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* 2. Redistributions in binary form must reproduce the above copyright |
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* notice, this list of conditions and the following disclaimer in the |
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* documentation and/or other materials provided with the distribution. |
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* 3. The name of the author may not be used to endorse or promote products |
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* derived from this software without specific prior written permission. |
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* |
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND |
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE |
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS |
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) |
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY |
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF |
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* SUCH DAMAGE. |
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* |
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* |
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dpavlin |
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* $Id: dev_vr41xx.c,v 1.41 2006/10/02 09:26:53 debug Exp $ |
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dpavlin |
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* |
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* VR41xx (actually, VR4122 and VR4131) misc functions. |
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* |
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* This is just a big hack. TODO: Fix. |
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*/ |
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#include <stdio.h> |
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#include <stdlib.h> |
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#include <string.h> |
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#include "console.h" |
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#include "cpu.h" |
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#include "device.h" |
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#include "devices.h" |
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#include "machine.h" |
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#include "memory.h" |
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#include "misc.h" |
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dpavlin |
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#include "timer.h" |
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dpavlin |
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#include "bcureg.h" |
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#include "vripreg.h" |
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#include "vrkiureg.h" |
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dpavlin |
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#include "vr_rtcreg.h" |
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#define DEV_VR41XX_TICKSHIFT 14 |
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dpavlin |
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/* #define debug fatal */ |
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static void recalc_kiu_int_assert(struct cpu *cpu, struct vr41xx_data *d) |
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{ |
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if (d->kiu_int_assert != 0) |
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cpu_interrupt(cpu, 8 + d->kiu_irq_nr); |
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else |
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cpu_interrupt_ack(cpu, 8 + d->kiu_irq_nr); |
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} |
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/* |
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* vr41xx_keytick(): |
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*/ |
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static void vr41xx_keytick(struct cpu *cpu, struct vr41xx_data *d) |
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{ |
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int keychange = 0; |
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/* |
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* Keyboard input: |
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* |
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* Hardcoded for MobilePro. (See NetBSD's hpckbdkeymap.h for |
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* info on other keyboard layouts. mobilepro780_keytrans is the |
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* one used here.) |
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* |
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* TODO: Make this work with "any" keyboard layout. |
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* |
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* ofs 0: |
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* 8000='o' 4000='.' 2000=DOWN 1000=UP |
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* 800=';' 400=''' 200='[' 100=? |
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* 80='l' 40=CR 20=RIGHT 10=LEFT |
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* 8='/' 4='\' 2=']' 1=SPACE |
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* ofs 2: |
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* 8000='a' 4000='s' 2000='d' 1000='f' |
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* 800='`' 400='-' 200='=' 100=? |
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* 80='z' 40='x' 20='c' 10='v' |
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* 8=? 4=? 2=? |
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* ofs 4: |
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* 8000='9' 4000='0' 2000=? 1000=? |
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* 800='b' 400='n' 200='m' 100=',' |
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* 80='q' 40='w' 20='e' 10='r' |
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* 8='5' 4='6' 2='7' 1='8' |
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* ofs 6: |
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* 8000=ESC 4000=DEL 2000=CAPS 1000=? |
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* 800='t' 400='y' 200='u' 100='i' |
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* 80='1' 40='2' 20='3' 10='4' |
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* 8='g' 4='h' 2='j' 1='k' |
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* ofs 8: |
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* 200=ALT_L |
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* 80= 40=TAB 20='p' 10=BS |
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* 8= 4= 2= 1=ALT_R |
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* ofs a: |
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* 800=SHIFT 4=CTRL |
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* |
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* |
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* The following are for the IBM WorkPad Z50: |
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* (Not yet implemented, TODO) |
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* |
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* 00 f1 f3 f5 f7 f9 - - f11 |
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* 08 f2 f4 f6 f8 f10 - - f12 |
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* 10 ' [ - 0 p ; up / |
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* 18 - - - 9 o l . - |
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* 20 left ] = 8 i k , - |
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* 28 h y 6 7 u j m n |
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* 30 - bs num del - \ ent sp |
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* 38 g t 5 4 r f v b |
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* 40 - - - 3 e d c right |
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* 48 - - - 2 w s x down |
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* 50 esc tab ~ 1 q a z - |
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* 58 menu Ls Lc Rc La Ra Rs - |
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*/ |
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if (d->d0 != 0 || d->d1 != 0 || d->d2 != 0 || |
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d->d3 != 0 || d->d4 != 0 || d->d5 != 0) |
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keychange = 1; |
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/* Release all keys: */ |
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if (!d->dont_clear_next) { |
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d->d0 = d->d1 = d->d2 = d->d3 = d->d4 = d->d5 = 0; |
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} else |
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d->dont_clear_next = 0; |
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if (console_charavail(d->kiu_console_handle)) { |
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char ch = console_readchar(d->kiu_console_handle); |
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if (d->escape_state > 0) { |
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switch (d->escape_state) { |
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case 1: /* expecting a [ */ |
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d->escape_state = 0; |
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if (ch == '[') |
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d->escape_state = 2; |
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break; |
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case 2: /* cursor keys etc: */ |
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dpavlin |
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/* Ugly hack for Mobilepro770: */ |
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if (cpu->machine->machine_subtype == |
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MACHINE_HPCMIPS_NEC_MOBILEPRO_770) { |
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switch (ch) { |
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case 'A': d->d0 = 0x2000; break; |
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case 'B': d->d0 = 0x20; break; |
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case 'C': d->d0 = 0x1000; break; |
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case 'D': d->d0 = 0x10; break; |
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default: fatal("[ vr41xx kiu: unimpl" |
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"emented escape 0x%02 ]\n", ch); |
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} |
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} else { |
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switch (ch) { |
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case 'A': d->d0 = 0x1000; break; |
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case 'B': d->d0 = 0x2000; break; |
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case 'C': d->d0 = 0x20; break; |
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case 'D': d->d0 = 0x10; break; |
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default: fatal("[ vr41xx kiu: unimpl" |
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"emented escape 0x%02 ]\n", ch); |
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} |
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} |
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d->escape_state = 0; |
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} |
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} else switch (ch) { |
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case '+': console_makeavail(d->kiu_console_handle, '='); |
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d->d5 = 0x800; break; |
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case '_': console_makeavail(d->kiu_console_handle, '-'); |
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d->d5 = 0x800; break; |
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case '<': console_makeavail(d->kiu_console_handle, ','); |
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d->d5 = 0x800; break; |
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case '>': console_makeavail(d->kiu_console_handle, '.'); |
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d->d5 = 0x800; break; |
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case '{': console_makeavail(d->kiu_console_handle, '['); |
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d->d5 = 0x800; break; |
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case '}': console_makeavail(d->kiu_console_handle, ']'); |
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d->d5 = 0x800; break; |
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case ':': console_makeavail(d->kiu_console_handle, ';'); |
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d->d5 = 0x800; break; |
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case '"': console_makeavail(d->kiu_console_handle, '\''); |
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d->d5 = 0x800; break; |
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case '|': console_makeavail(d->kiu_console_handle, '\\'); |
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d->d5 = 0x800; break; |
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case '?': console_makeavail(d->kiu_console_handle, '/'); |
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d->d5 = 0x800; break; |
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case '!': console_makeavail(d->kiu_console_handle, '1'); |
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d->d5 = 0x800; break; |
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case '@': console_makeavail(d->kiu_console_handle, '2'); |
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d->d5 = 0x800; break; |
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case '#': console_makeavail(d->kiu_console_handle, '3'); |
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d->d5 = 0x800; break; |
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case '$': console_makeavail(d->kiu_console_handle, '4'); |
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d->d5 = 0x800; break; |
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case '%': console_makeavail(d->kiu_console_handle, '5'); |
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d->d5 = 0x800; break; |
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case '^': console_makeavail(d->kiu_console_handle, '6'); |
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d->d5 = 0x800; break; |
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case '&': console_makeavail(d->kiu_console_handle, '7'); |
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d->d5 = 0x800; break; |
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case '*': console_makeavail(d->kiu_console_handle, '8'); |
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d->d5 = 0x800; break; |
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case '(': console_makeavail(d->kiu_console_handle, '9'); |
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d->d5 = 0x800; break; |
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case ')': console_makeavail(d->kiu_console_handle, '0'); |
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d->d5 = 0x800; break; |
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case '1': d->d3 = 0x80; break; |
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case '2': d->d3 = 0x40; break; |
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case '3': d->d3 = 0x20; break; |
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case '4': d->d3 = 0x10; break; |
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case '5': d->d2 = 0x08; break; |
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case '6': d->d2 = 0x04; break; |
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case '7': d->d2 = 0x02; break; |
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case '8': d->d2 = 0x01; break; |
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case '9': d->d2 = 0x8000; break; |
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case '0': d->d2 = 0x4000; break; |
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case ';': d->d0 = 0x800; break; |
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case '\'': d->d0 = 0x400; break; |
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case '[': d->d0 = 0x200; break; |
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case '/': d->d0 = 0x8; break; |
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case '\\': d->d0 = 0x4; break; |
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case ']': d->d0 = 0x2; break; |
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case 'a': d->d1 = 0x8000; break; |
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case 'b': d->d2 = 0x800; break; |
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case 'c': d->d1 = 0x20; break; |
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case 'd': d->d1 = 0x2000; break; |
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case 'e': d->d2 = 0x20; break; |
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case 'f': d->d1 = 0x1000; break; |
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case 'g': d->d3 = 0x8; break; |
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case 'h': d->d3 = 0x4; break; |
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case 'i': d->d3 = 0x100; break; |
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case 'j': d->d3 = 0x2; break; |
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case 'k': d->d3 = 0x1; break; |
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case 'l': d->d0 = 0x80; break; |
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case 'm': d->d2 = 0x200; break; |
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case 'n': d->d2 = 0x400; break; |
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case 'o': d->d0 = 0x8000; break; |
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case 'p': d->d4 = 0x20; break; |
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case 'q': d->d2 = 0x80; break; |
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case 'r': d->d2 = 0x10; break; |
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case 's': d->d1 = 0x4000; break; |
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case 't': d->d3 = 0x800; break; |
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case 'u': d->d3 = 0x200; break; |
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case 'v': d->d1 = 0x10; break; |
256 |
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case 'w': d->d2 = 0x40; break; |
257 |
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case 'x': d->d1 = 0x40; break; |
258 |
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case 'y': d->d3 = 0x400; break; |
259 |
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case 'z': d->d1 = 0x80; break; |
260 |
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261 |
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case ',': d->d2 = 0x100; break; |
262 |
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case '.': d->d0 = 0x4000; break; |
263 |
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case '-': d->d1 = 0x400; break; |
264 |
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case '=': d->d1 = 0x200; break; |
265 |
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266 |
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case '\r': |
267 |
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case '\n': d->d0 = 0x40; break; |
268 |
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case ' ': d->d0 = 0x01; break; |
269 |
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case '\b': d->d4 = 0x10; break; |
270 |
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271 |
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case 27: d->escape_state = 1; break; |
272 |
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273 |
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default: |
274 |
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/* Shifted: */ |
275 |
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if (ch >= 'A' && ch <= 'Z') { |
276 |
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console_makeavail(d->kiu_console_handle, |
277 |
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ch + 32); |
278 |
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d->d5 = 0x800; |
279 |
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d->dont_clear_next = 1; |
280 |
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break; |
281 |
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} |
282 |
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283 |
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/* CTRLed: */ |
284 |
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if (ch >= 1 && ch <= 26) { |
285 |
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console_makeavail(d->kiu_console_handle, |
286 |
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ch + 96); |
287 |
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d->d5 = 0x4; |
288 |
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d->dont_clear_next = 1; |
289 |
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break; |
290 |
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} |
291 |
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} |
292 |
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293 |
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if (d->escape_state == 0) |
294 |
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keychange = 1; |
295 |
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} |
296 |
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297 |
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if (keychange) { |
298 |
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/* 4=lost data, 2=data complete, 1=key input detected */ |
299 |
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d->kiu_int_assert |= 3; |
300 |
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recalc_kiu_int_assert(cpu, d); |
301 |
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} |
302 |
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} |
303 |
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304 |
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305 |
dpavlin |
32 |
/* |
306 |
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* timer_tick(): |
307 |
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*/ |
308 |
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static void timer_tick(struct timer *timer, void *extra) |
309 |
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{ |
310 |
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struct vr41xx_data *d = (struct vr41xx_data *) extra; |
311 |
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d->pending_timer_interrupts ++; |
312 |
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} |
313 |
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314 |
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315 |
dpavlin |
30 |
DEVICE_TICK(vr41xx) |
316 |
dpavlin |
4 |
{ |
317 |
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struct vr41xx_data *d = extra; |
318 |
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319 |
dpavlin |
32 |
if (d->pending_timer_interrupts > 0) { |
320 |
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if (d->cpumodel == 4121 || d->cpumodel == 4181) |
321 |
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cpu_interrupt(cpu, 3); |
322 |
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else |
323 |
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cpu_interrupt(cpu, 8 + VRIP_INTR_ETIMER); |
324 |
dpavlin |
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} |
325 |
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326 |
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if (cpu->machine->use_x11) |
327 |
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vr41xx_keytick(cpu, d); |
328 |
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} |
329 |
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330 |
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331 |
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/* |
332 |
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* vr41xx_kiu(): |
333 |
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* |
334 |
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* Keyboard Interface Unit. Return value is "odata". |
335 |
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* (See NetBSD's vrkiu.c for more info.) |
336 |
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*/ |
337 |
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static uint64_t vr41xx_kiu(struct cpu *cpu, int ofs, uint64_t idata, |
338 |
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int writeflag, struct vr41xx_data *d) |
339 |
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{ |
340 |
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uint64_t odata = 0; |
341 |
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342 |
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switch (ofs) { |
343 |
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case KIUDAT0: |
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odata = d->d0; break; |
345 |
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case KIUDAT1: |
346 |
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odata = d->d1; break; |
347 |
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case KIUDAT2: |
348 |
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odata = d->d2; break; |
349 |
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case KIUDAT3: |
350 |
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odata = d->d3; break; |
351 |
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case KIUDAT4: |
352 |
|
|
odata = d->d4; break; |
353 |
|
|
case KIUDAT5: |
354 |
|
|
odata = d->d5; break; |
355 |
|
|
case KIUSCANREP: |
356 |
|
|
if (writeflag == MEM_WRITE) { |
357 |
|
|
debug("[ vr41xx KIU: setting KIUSCANREP to 0x%04x ]\n", |
358 |
|
|
(int)idata); |
359 |
|
|
/* TODO */ |
360 |
|
|
} else |
361 |
|
|
fatal("[ vr41xx KIU: unimplemented read from " |
362 |
|
|
"KIUSCANREP ]\n"); |
363 |
|
|
break; |
364 |
|
|
case KIUSCANS: |
365 |
|
|
if (writeflag == MEM_WRITE) { |
366 |
|
|
debug("[ vr41xx KIU: write to KIUSCANS: 0x%04x: TODO" |
367 |
|
|
" ]\n", (int)idata); |
368 |
|
|
/* TODO */ |
369 |
|
|
} else |
370 |
|
|
debug("[ vr41xx KIU: unimplemented read from " |
371 |
|
|
"KIUSCANS ]\n"); |
372 |
|
|
break; |
373 |
|
|
case KIUINT: |
374 |
|
|
/* Interrupt. A wild guess: zero-on-write */ |
375 |
|
|
if (writeflag == MEM_WRITE) { |
376 |
|
|
d->kiu_int_assert &= ~idata; |
377 |
|
|
} else { |
378 |
|
|
odata = d->kiu_int_assert; |
379 |
|
|
} |
380 |
|
|
recalc_kiu_int_assert(cpu, d); |
381 |
|
|
break; |
382 |
|
|
case KIURST: |
383 |
|
|
/* Reset. */ |
384 |
|
|
break; |
385 |
|
|
default: |
386 |
|
|
if (writeflag == MEM_WRITE) |
387 |
|
|
debug("[ vr41xx KIU: unimplemented write to offset " |
388 |
dpavlin |
24 |
"0x%x, data=0x%016"PRIx64" ]\n", ofs, |
389 |
|
|
(uint64_t) idata); |
390 |
dpavlin |
4 |
else |
391 |
|
|
debug("[ vr41xx KIU: unimplemented read from offset " |
392 |
|
|
"0x%x ]\n", ofs); |
393 |
|
|
} |
394 |
|
|
|
395 |
|
|
return odata; |
396 |
|
|
} |
397 |
|
|
|
398 |
|
|
|
399 |
dpavlin |
22 |
DEVICE_ACCESS(vr41xx) |
400 |
dpavlin |
4 |
{ |
401 |
|
|
struct vr41xx_data *d = (struct vr41xx_data *) extra; |
402 |
|
|
uint64_t idata = 0, odata = 0; |
403 |
|
|
int regnr; |
404 |
|
|
int revision = 0; |
405 |
|
|
|
406 |
dpavlin |
18 |
if (writeflag == MEM_WRITE) |
407 |
|
|
idata = memory_readmax64(cpu, data, len); |
408 |
|
|
|
409 |
dpavlin |
4 |
regnr = relative_addr / sizeof(uint64_t); |
410 |
|
|
|
411 |
|
|
/* KIU ("Keyboard Interface Unit") is handled separately. */ |
412 |
|
|
if (relative_addr >= d->kiu_offset && |
413 |
|
|
relative_addr < d->kiu_offset + 0x20) { |
414 |
|
|
odata = vr41xx_kiu(cpu, relative_addr - d->kiu_offset, |
415 |
|
|
idata, writeflag, d); |
416 |
|
|
goto ret; |
417 |
|
|
} |
418 |
|
|
|
419 |
|
|
/* TODO: Maybe these should be handled separately as well? */ |
420 |
|
|
|
421 |
|
|
switch (relative_addr) { |
422 |
dpavlin |
32 |
|
423 |
dpavlin |
4 |
/* BCU: 0x00 .. 0x1c */ |
424 |
|
|
case BCUREVID_REG_W: /* 0x010 */ |
425 |
|
|
case BCU81REVID_REG_W: /* 0x014 */ |
426 |
|
|
/* |
427 |
|
|
* TODO? Linux seems to read 0x14. The lowest bits are |
428 |
|
|
* a divisor for PClock, bits 8 and up seem to be a |
429 |
|
|
* divisor for VTClock (relative to PClock?)... |
430 |
|
|
*/ |
431 |
|
|
switch (d->cpumodel) { |
432 |
|
|
case 4131: revision = BCUREVID_RID_4131; break; |
433 |
|
|
case 4122: revision = BCUREVID_RID_4122; break; |
434 |
|
|
case 4121: revision = BCUREVID_RID_4121; break; |
435 |
|
|
case 4111: revision = BCUREVID_RID_4111; break; |
436 |
|
|
case 4102: revision = BCUREVID_RID_4102; break; |
437 |
|
|
case 4101: revision = BCUREVID_RID_4101; break; |
438 |
|
|
case 4181: revision = BCUREVID_RID_4181; break; |
439 |
|
|
} |
440 |
|
|
odata = (revision << BCUREVID_RIDSHFT) | 0x020c; |
441 |
|
|
break; |
442 |
|
|
case BCU81CLKSPEED_REG_W: /* 0x018 */ |
443 |
|
|
/* |
444 |
|
|
* TODO: Implement this for ALL cpu types: |
445 |
|
|
*/ |
446 |
|
|
odata = BCUCLKSPEED_DIVT4 << BCUCLKSPEED_DIVTSHFT; |
447 |
|
|
break; |
448 |
|
|
|
449 |
|
|
/* DMAAU: 0x20 .. 0x3c */ |
450 |
|
|
|
451 |
|
|
/* DCU: 0x40 .. 0x5c */ |
452 |
|
|
|
453 |
|
|
/* CMU: 0x60 .. 0x7c */ |
454 |
|
|
|
455 |
|
|
/* ICU: 0x80 .. 0xbc */ |
456 |
|
|
case 0x80: /* Level 1 system interrupt reg 1... */ |
457 |
|
|
if (writeflag == MEM_READ) |
458 |
|
|
odata = d->sysint1; |
459 |
|
|
else { |
460 |
|
|
/* TODO: clear-on-write-one? */ |
461 |
|
|
d->sysint1 &= ~idata; |
462 |
|
|
d->sysint1 &= 0xffff; |
463 |
|
|
} |
464 |
|
|
break; |
465 |
|
|
case 0x88: |
466 |
|
|
if (writeflag == MEM_READ) |
467 |
|
|
odata = d->giuint; |
468 |
|
|
else |
469 |
|
|
d->giuint &= ~idata; |
470 |
|
|
break; |
471 |
|
|
case 0x8c: |
472 |
|
|
if (writeflag == MEM_READ) |
473 |
|
|
odata = d->msysint1; |
474 |
|
|
else |
475 |
|
|
d->msysint1 = idata; |
476 |
|
|
break; |
477 |
|
|
case 0x94: |
478 |
|
|
if (writeflag == MEM_READ) |
479 |
|
|
odata = d->giumask; |
480 |
|
|
else |
481 |
|
|
d->giumask = idata; |
482 |
|
|
break; |
483 |
|
|
case 0xa0: /* Level 1 system interrupt reg 2... */ |
484 |
|
|
if (writeflag == MEM_READ) |
485 |
|
|
odata = d->sysint2; |
486 |
|
|
else { |
487 |
|
|
/* TODO: clear-on-write-one? */ |
488 |
|
|
d->sysint2 &= ~idata; |
489 |
|
|
d->sysint2 &= 0xffff; |
490 |
|
|
} |
491 |
|
|
break; |
492 |
|
|
case 0xa6: |
493 |
|
|
if (writeflag == MEM_READ) |
494 |
|
|
odata = d->msysint2; |
495 |
|
|
else |
496 |
|
|
d->msysint2 = idata; |
497 |
|
|
break; |
498 |
|
|
|
499 |
dpavlin |
32 |
/* RTC: */ |
500 |
|
|
case 0xc0: |
501 |
|
|
case 0xc2: |
502 |
|
|
case 0xc4: |
503 |
|
|
{ |
504 |
|
|
struct timeval tv; |
505 |
|
|
gettimeofday(&tv, NULL); |
506 |
|
|
/* Adjust time by 120 years and 29 days. */ |
507 |
|
|
tv.tv_sec += (int64_t) (120*365 + 29) * 24*60*60; |
508 |
dpavlin |
4 |
|
509 |
dpavlin |
32 |
switch (relative_addr) { |
510 |
|
|
case 0xc0: |
511 |
|
|
odata = (tv.tv_sec & 1) << 15; |
512 |
|
|
break; |
513 |
|
|
case 0xc2: |
514 |
|
|
odata = (tv.tv_sec >> 1) & 0xffff; |
515 |
|
|
break; |
516 |
|
|
case 0xc4: |
517 |
|
|
odata = (tv.tv_sec >> 17) & 0xffff; |
518 |
|
|
break; |
519 |
|
|
} |
520 |
|
|
} |
521 |
|
|
break; |
522 |
|
|
|
523 |
|
|
case 0xd0: /* RTCL1_L_REG_W */ |
524 |
|
|
if (writeflag == MEM_WRITE && idata != 0) { |
525 |
|
|
int hz = RTCL1_L_HZ / idata; |
526 |
|
|
debug("[ vr41xx: rtc interrupts at %i Hz ]\n", hz); |
527 |
|
|
if (d->timer == NULL) |
528 |
|
|
d->timer = timer_add(hz, timer_tick, d); |
529 |
|
|
else |
530 |
|
|
timer_update_frequency(d->timer, hz); |
531 |
|
|
} |
532 |
|
|
break; |
533 |
|
|
case 0xd2: /* RTCL1_H_REG_W */ |
534 |
|
|
break; |
535 |
|
|
|
536 |
dpavlin |
4 |
case 0x108: |
537 |
|
|
if (writeflag == MEM_READ) |
538 |
|
|
odata = d->giuint; |
539 |
|
|
else |
540 |
|
|
d->giuint &= ~idata; |
541 |
|
|
break; |
542 |
|
|
/* case 0x10a: |
543 |
|
|
"High" part of GIU? |
544 |
|
|
break; |
545 |
|
|
*/ |
546 |
|
|
|
547 |
|
|
case 0x13e: /* on 4181? */ |
548 |
|
|
/* RTC interrupt register... */ |
549 |
|
|
/* Ack. timer interrupts? */ |
550 |
|
|
cpu_interrupt_ack(cpu, 8 + VRIP_INTR_ETIMER); |
551 |
dpavlin |
32 |
if (d->pending_timer_interrupts > 0) |
552 |
|
|
d->pending_timer_interrupts --; |
553 |
dpavlin |
4 |
break; |
554 |
|
|
|
555 |
|
|
case 0x1de: /* on 4121? */ |
556 |
|
|
/* RTC interrupt register... */ |
557 |
|
|
/* Ack. timer interrupts? */ |
558 |
|
|
cpu_interrupt_ack(cpu, 3); |
559 |
dpavlin |
32 |
if (d->pending_timer_interrupts > 0) |
560 |
|
|
d->pending_timer_interrupts --; |
561 |
dpavlin |
4 |
break; |
562 |
|
|
|
563 |
|
|
default: |
564 |
|
|
if (writeflag == MEM_WRITE) |
565 |
|
|
debug("[ vr41xx: unimplemented write to address " |
566 |
dpavlin |
24 |
"0x%"PRIx64", data=0x%016"PRIx64" ]\n", |
567 |
|
|
(uint64_t) relative_addr, (uint64_t) idata); |
568 |
dpavlin |
4 |
else |
569 |
|
|
debug("[ vr41xx: unimplemented read from address " |
570 |
dpavlin |
24 |
"0x%"PRIx64" ]\n", (uint64_t) relative_addr); |
571 |
dpavlin |
4 |
} |
572 |
|
|
|
573 |
|
|
ret: |
574 |
|
|
/* Recalculate interrupt assertions: */ |
575 |
|
|
cpu_interrupt_ack(cpu, 8 + 31); /* TODO: hopefully nothing |
576 |
|
|
useful at irq 15 in |
577 |
|
|
sysint2 */ |
578 |
|
|
|
579 |
|
|
if (writeflag == MEM_READ) |
580 |
|
|
memory_writemax64(cpu, data, len, odata); |
581 |
|
|
|
582 |
|
|
return 1; |
583 |
|
|
} |
584 |
|
|
|
585 |
|
|
|
586 |
|
|
/* |
587 |
|
|
* dev_vr41xx_init(): |
588 |
|
|
*/ |
589 |
|
|
struct vr41xx_data *dev_vr41xx_init(struct machine *machine, |
590 |
|
|
struct memory *mem, int cpumodel) |
591 |
|
|
{ |
592 |
|
|
uint64_t baseaddr = 0; |
593 |
dpavlin |
12 |
char tmps[100]; |
594 |
dpavlin |
4 |
struct vr41xx_data *d = malloc(sizeof(struct vr41xx_data)); |
595 |
dpavlin |
12 |
|
596 |
dpavlin |
4 |
if (d == NULL) { |
597 |
|
|
fprintf(stderr, "out of memory\n"); |
598 |
|
|
exit(1); |
599 |
|
|
} |
600 |
|
|
memset(d, 0, sizeof(struct vr41xx_data)); |
601 |
|
|
|
602 |
|
|
d->cpumodel = cpumodel; |
603 |
|
|
|
604 |
|
|
/* TODO: VRC4173 has the KIU at offset 0x100? */ |
605 |
|
|
d->kiu_offset = 0x180; |
606 |
dpavlin |
22 |
d->kiu_console_handle = console_start_slave_inputonly( |
607 |
|
|
machine, "kiu", 1); |
608 |
dpavlin |
4 |
d->kiu_irq_nr = VRIP_INTR_KIU; |
609 |
|
|
|
610 |
|
|
switch (cpumodel) { |
611 |
|
|
case 4101: |
612 |
|
|
case 4102: |
613 |
|
|
case 4111: |
614 |
|
|
case 4121: |
615 |
|
|
baseaddr = 0xb000000; |
616 |
|
|
break; |
617 |
|
|
case 4181: |
618 |
|
|
baseaddr = 0xa000000; |
619 |
dpavlin |
18 |
dev_ram_init(machine, 0xb000000, 0x1000000, DEV_RAM_MIRROR, |
620 |
dpavlin |
4 |
0xa000000); |
621 |
|
|
break; |
622 |
|
|
case 4122: |
623 |
|
|
case 4131: |
624 |
|
|
baseaddr = 0xf000000; |
625 |
|
|
break; |
626 |
|
|
default: |
627 |
|
|
printf("Unimplemented VR cpu model\n"); |
628 |
|
|
exit(1); |
629 |
|
|
} |
630 |
|
|
|
631 |
|
|
memory_device_register(mem, "vr41xx", baseaddr, DEV_VR41XX_LENGTH, |
632 |
dpavlin |
20 |
dev_vr41xx_access, (void *)d, DM_DEFAULT, NULL); |
633 |
dpavlin |
4 |
|
634 |
|
|
/* |
635 |
|
|
* TODO: Find out which controllers are at which addresses on |
636 |
|
|
* which chips. |
637 |
|
|
*/ |
638 |
|
|
if (cpumodel == 4131) { |
639 |
dpavlin |
24 |
snprintf(tmps, sizeof(tmps), "ns16550 irq=%i addr=0x%"PRIx64" " |
640 |
|
|
"name2=siu", 8+VRIP_INTR_SIU, (uint64_t) (baseaddr+0x800)); |
641 |
dpavlin |
12 |
device_add(machine, tmps); |
642 |
dpavlin |
4 |
} else { |
643 |
|
|
/* This is used by Linux and NetBSD: */ |
644 |
dpavlin |
12 |
snprintf(tmps, sizeof(tmps), "ns16550 irq=%i addr=0x%x " |
645 |
|
|
"name2=serial", 8+VRIP_INTR_SIU, 0xc000000); |
646 |
|
|
device_add(machine, tmps); |
647 |
dpavlin |
4 |
} |
648 |
|
|
|
649 |
|
|
/* Hm... maybe this should not be here. TODO */ |
650 |
|
|
device_add(machine, "pcic addr=0x140003e0"); |
651 |
|
|
|
652 |
|
|
machine_add_tickfunction(machine, dev_vr41xx_tick, d, |
653 |
dpavlin |
24 |
DEV_VR41XX_TICKSHIFT, 0.0); |
654 |
dpavlin |
4 |
|
655 |
|
|
/* Some machines (?) use ISA space at 0x15000000 instead of |
656 |
|
|
0x14000000, eg IBM WorkPad Z50. */ |
657 |
dpavlin |
18 |
dev_ram_init(machine, 0x15000000, 0x1000000, DEV_RAM_MIRROR, |
658 |
|
|
0x14000000); |
659 |
dpavlin |
4 |
|
660 |
|
|
return d; |
661 |
|
|
} |
662 |
|
|
|