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/* |
/* |
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* Copyright (C) 2004-2005 Anders Gavare. All rights reserved. |
* Copyright (C) 2004-2006 Anders Gavare. All rights reserved. |
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* |
* |
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* Redistribution and use in source and binary forms, with or without |
* Redistribution and use in source and binary forms, with or without |
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* modification, are permitted provided that the following conditions are met: |
* modification, are permitted provided that the following conditions are met: |
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* SUCH DAMAGE. |
* SUCH DAMAGE. |
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* |
* |
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* |
* |
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* $Id: dev_unreadable.c,v 1.10 2005/11/13 00:14:10 debug Exp $ |
* $Id: dev_unreadable.c,v 1.12 2006/02/09 20:02:59 debug Exp $ |
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* |
* |
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* A simple device which returns an error for all accesses (both reads and |
* A simple device which returns an error for all accesses (both reads and |
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* writes). |
* writes). |
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/* |
/* |
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* dev_unreadable_access(): |
* dev_unreadable_access(): |
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*/ |
*/ |
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int dev_unreadable_access(struct cpu *cpu, struct memory *mem, |
DEVICE_ACCESS(unreadable) |
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uint64_t relative_addr, unsigned char *data, size_t len, |
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int writeflag, void *extra) |
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{ |
{ |
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return 0; |
return 0; |
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} |
} |
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/* |
DEVINIT(unreadable) |
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* devinit_unreadable(): |
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*/ |
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int devinit_unreadable(struct devinit *devinit) |
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{ |
{ |
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memory_device_register(devinit->machine->memory, |
memory_device_register(devinit->machine->memory, |
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devinit->name, devinit->addr, devinit->len, |
devinit->name, devinit->addr, devinit->len, |