/[gxemul]/trunk/src/devices/dev_turbochannel.c
This is repository of my old source code which isn't updated any more. Go to git.rot13.org for current projects!
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Annotation of /trunk/src/devices/dev_turbochannel.c

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Revision 12 - (hide annotations)
Mon Oct 8 16:18:38 2007 UTC (16 years, 5 months ago) by dpavlin
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File size: 11343 byte(s)
++ trunk/HISTORY	(local)
$Id: HISTORY,v 1.905 2005/08/16 09:16:24 debug Exp $
20050628	Continuing the work on the ARM translation engine. end_of_page
		works. Experimenting with load/store translation caches
		(virtual -> physical -> host).
20050629	More ARM stuff (memory access translation cache, mostly). This
		might break a lot of stuff elsewhere, probably some MIPS-
		related translation things.
20050630	Many load/stores are now automatically generated and included
		into cpu_arm_instr.c; 1024 functions in total (!).
		Fixes based on feedback from Alec Voropay: only print 8 hex
		digits instead of 16 in some cases when emulating 32-bit
		machines; similar 8 vs 16 digit fix for breakpoint addresses;
		4Kc has 16 TLB entries, not 48; the MIPS config select1
		register is now printed with "reg ,0".
		Also changing many other occurances of 16 vs 8 digit output.
		Adding cache associativity fields to mips_cpu_types.h; updating
		some other cache fields; making the output of
		mips_cpu_dumpinfo() look nicer.
		Generalizing the bintrans stuff for device accesses to also
		work with the new translation system. (This might also break
		some MIPS things.)
		Adding multi-load/store instructions to the ARM disassembler
		and the translator, and some optimizations of various kinds.
20050701	Adding a simple dev_disk (it can read/write sectors from
		disk images).
20050712	Adding dev_ether (a simple ethernet send/receive device).
		Debugger command "ninstrs" for toggling show_nr_of_instructions
		during runtime.
		Removing the framebuffer logo.
20050713	Continuing on dev_ether.
		Adding a dummy cpu_alpha (again).
20050714	More work on cpu_alpha.
20050715	More work on cpu_alpha. Many instructions work, enough to run
		a simple framebuffer fill test (similar to the ARM test).
20050716	More Alpha stuff.
20050717	Minor updates (Alpha stuff).
20050718	Minor updates (Alpha stuff).
20050719	Generalizing some Alpha instructions.
20050720	More Alpha-related updates.
20050721	Continuing on cpu_alpha. Importing rpb.h from NetBSD/alpha.
20050722	Alpha-related updates: userland stuff (Hello World using
		write() compiled statically for FreeBSD/Alpha runs fine), and
		more instructions are now implemented.
20050723	Fixing ldq_u and stq_u.
		Adding more instructions (conditional moves, masks, extracts,
		shifts).
20050724	More FreeBSD/Alpha userland stuff, and adding some more
		instructions (inserts).
20050725	Continuing on the Alpha stuff. (Adding dummy ldt/stt.)
		Adding a -A command line option to turn off alignment checks
		in some cases (for translated code).
		Trying to remove the old bintrans code which updated the pc
		and nr_of_executed_instructions for every instruction.
20050726	Making another attempt att removing the pc/nr of instructions
		code. This time it worked, huge performance increase for
		artificial test code, but performance loss for real-world
		code :-( so I'm scrapping that code for now.
		Tiny performance increase on Alpha (by using ret instead of
		jmp, to play nice with the Alpha's branch prediction) for the
		old MIPS bintrans backend.
20050727	Various minor fixes and cleanups.
20050728	Switching from a 2-level virtual to host/physical translation
		system for ARM emulation, to a 1-level translation.
		Trying to switch from 2-level to 1-level for the MIPS bintrans
		system as well (Alpha only, so far), but there is at least one
		problem: caches and/or how they work with device mappings.
20050730	Doing the 2-level to 1-level conversion for the i386 backend.
		The cache/device bug is still there for R2K/3K :(
		Various other minor updates (Malta etc).
		The mc146818 clock now updates the UIP bit in a way which works
		better with Linux for at least sgimips and Malta emulation.
		Beginning the work on refactoring the dyntrans system.
20050731	Continuing the dyntrans refactoring.
		Fixing a small but serious host alignment bug in memory_rw.
		Adding support for big-endian load/stores to the i386 bintrans
		backend.
		Another minor i386 bintrans backend update: stores from the
		zero register are now one (or two) loads shorter.
		The slt and sltu instructions were incorrectly implemented for
		the i386 backend; only using them for 32-bit mode for now.
20050801	Continuing the dyntrans refactoring.
		Cleanup of the ns16550 serial controller (removing unnecessary
		code).
		Bugfix (memory corruption bug) in dev_gt, and a patch/hack from
		Alec Voropay for Linux/Malta.
20050802	More cleanup/refactoring of the dyntrans subsystem: adding
		phys_page pointers to the lookup tables, for quick jumps
		between translated pages.
		Better fix for the ns16550 device (but still no real FIFO
		functionality).
		Converting cpu_ppc to the new dyntrans system. This means that
		I will have to start from scratch with implementing each
		instruction, and figure out how to implement dual 64/32-bit
		modes etc.
		Removing the URISC CPU family, because it was useless.
20050803	When selecting a machine type, the main type can now be omitted
		if the subtype name is unique. (I.e. -E can be omitted.)
		Fixing a dyntrans/device update bug. (Writes to offset 0 of
		a device could sometimes go unnoticed.)
		Adding an experimental "instruction combination" hack for
		ARM for memset-like byte fill loops.
20050804	Minor progress on cpu_alpha and related things.
		Finally fixing the MIPS dmult/dmultu bugs.
		Fixing some minor TODOs.
20050805	Generalizing the 8259 PIC. It now also works with Cobalt
		and evbmips emulation, in addition to the x86 hack.
		Finally converting the ns16550 device to use devinit.
		Continuing the work on the dyntrans system. Thinking about
		how to add breakpoints.
20050806	More dyntrans updates. Breakpoints seem to work now.
20050807	Minor updates: cpu_alpha and related things; removing
		dev_malta (as it isn't used any more).
		Dyntrans: working on general "show trace tree" support.
		The trace tree stuff now works with both the old MIPS code and
		with newer dyntrans modes. :)
		Continuing on Alpha-related stuff (trying to get *BSD to boot
		a bit further, adding more instructions, etc).
20050808	Adding a dummy IA64 cpu family, and continuing the refactoring
		of the dyntrans system.
		Removing the regression test stuff, because it was more or
		less useless.
		Adding loadlinked/storeconditional type instructions to the
		Alpha emulation. (Needed for Linux/alpha. Not very well tested
		yet.)
20050809	The function call trace tree now prints a per-function nr of
		arguments. (Semi-meaningless, since that data isn't read yet
		from the ELFs; some hardcoded symbols such as memcpy() and
		strlen() work fine, though.)
		More dyntrans refactoring; taking out more of the things that
		are common to all cpu families.
20050810	Working on adding support for "dual mode" for PPC dyntrans
		(i.e. both 64-bit and 32-bit modes).
		(Re)adding some simple PPC instructions.
20050811	Adding a dummy M68K cpu family. The dyntrans system isn't ready
		for variable-length ISAs yet, so it's completely bogus so far.
		Re-adding more PPC instructions.
		Adding a hack to src/file.c which allows OpenBSD/mac68k a.out
		kernels to be loaded.
		Beginning to add PPC loads/stores. So far they only work in
		32-bit mode.
20050812	The configure file option "add_remote" now accepts symbolic
		host names, in addition to numeric IPv4 addresses.
		Re-adding more PPC instructions.
20050814	Continuing to port back more PPC instructions.
		Found and fixed the cache/device write-update bug for 32-bit
		MIPS bintrans. :-)
		Triggered a really weird and annoying bug in Compaq's C
		compiler; ccc sometimes outputs code which loads from an
		address _before_ checking whether the pointer was NULL or not.
		(I'm not sure how to handle this problem.)
20050815	Removing all of the old x86 instruction execution code; adding
		a new (dummy) dyntrans module for x86.
		Taking the first steps to extend the dyntrans system to support
		variable-length instructions.
		Slowly preparing for the next release.
20050816	Adding a dummy SPARC cpu module.
		Minor updates (documentation etc) for the release.

==============  RELEASE 0.3.5  ==============


1 dpavlin 4 /*
2     * Copyright (C) 2003-2005 Anders Gavare. All rights reserved.
3     *
4     * Redistribution and use in source and binary forms, with or without
5     * modification, are permitted provided that the following conditions are met:
6     *
7     * 1. Redistributions of source code must retain the above copyright
8     * notice, this list of conditions and the following disclaimer.
9     * 2. Redistributions in binary form must reproduce the above copyright
10     * notice, this list of conditions and the following disclaimer in the
11     * documentation and/or other materials provided with the distribution.
12     * 3. The name of the author may not be used to endorse or promote products
13     * derived from this software without specific prior written permission.
14     *
15     * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16     * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17     * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18     * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19     * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20     * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21     * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22     * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23     * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24     * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25     * SUCH DAMAGE.
26     *
27     *
28 dpavlin 12 * $Id: dev_turbochannel.c,v 1.43 2005/07/12 08:49:13 debug Exp $
29 dpavlin 4 *
30     * Generic framework for TURBOchannel devices, used in DECstation machines.
31     */
32    
33     #include <stdio.h>
34     #include <stdlib.h>
35     #include <string.h>
36    
37     #include "devices.h"
38     #include "machine.h"
39     #include "memory.h"
40     #include "misc.h"
41     #include "sfbreg.h"
42    
43    
44 dpavlin 10 #define DEVICE_NAME_BUFLEN 9
45     #define CARD_NAME_BUFLEN 9
46     #define CARD_FIRMWARE_BUFLEN 5
47    
48 dpavlin 4 struct turbochannel_data {
49     int slot_nr;
50     uint64_t baseaddr;
51     uint64_t endaddr;
52     int irq;
53    
54     int rom_skip;
55    
56 dpavlin 10 char device_name[DEVICE_NAME_BUFLEN]; /* NUL-terminated */
57 dpavlin 4
58     /* These should be terminated with spaces */
59 dpavlin 10 char card_firmware_version[CARD_NAME_BUFLEN];
60     char card_vendor_name[CARD_NAME_BUFLEN];
61     char card_module_name[CARD_NAME_BUFLEN];
62     char card_firmware_type[CARD_FIRMWARE_BUFLEN];
63 dpavlin 4 };
64    
65    
66     /*
67     * dev_turbochannel_access():
68     */
69     int dev_turbochannel_access(struct cpu *cpu, struct memory *mem,
70     uint64_t relative_addr, unsigned char *data, size_t len,
71     int writeflag, void *extra)
72     {
73     struct turbochannel_data *d = extra;
74     uint64_t idata = 0, odata = 0;
75    
76     idata = memory_readmax64(cpu, data, len);
77    
78     relative_addr += d->rom_skip;
79    
80     if (writeflag == MEM_READ) {
81     debug("[ turbochannel: read from slot %i addr 0x%08lx (",
82     d->slot_nr, (long)relative_addr);
83    
84     relative_addr &= 0x7fff;
85    
86     switch (relative_addr) {
87     case 0x3e0:
88     odata = 0x00000001; debug("ROM width");
89     break;
90     case 0x3e4:
91     odata = 0x00000004; debug("ROM stride");
92     break;
93     case 0x3e8:
94     /* 8KB * romsize */
95     odata = 0x00000001; debug("ROM size");
96     break;
97     case 0x3ec:
98     /* 4MB * slotsize */
99     odata = 0x00000001; debug("slot size");
100     break;
101     case 0x3f0:
102     odata = 0x55555555; debug("ROM signature byte 0");
103     break;
104     case 0x3f4:
105     odata = 0x00000000; debug("ROM signature byte 1");
106     break;
107     case 0x3f8:
108     odata = 0xaaaaaaaa; debug("ROM signature byte 2");
109     break;
110     case 0x3fc:
111     odata = 0xffffffff; debug("ROM signature byte 3");
112     break;
113     case 0x470:
114     /* 0=nothing, 1=parity */
115     odata = 0x00000000; debug("flags"); break;
116     default:
117     if (relative_addr >= 0x400 && relative_addr < 0x420)
118     odata = d->card_firmware_version[
119     (relative_addr-0x400)/4];
120     else if (relative_addr >= 0x420 &&
121     relative_addr < 0x440)
122     odata = d->card_vendor_name[
123     (relative_addr-0x420)/4];
124     else if (relative_addr >= 0x440 &&
125     relative_addr < 0x460)
126     odata = d->card_module_name[
127     (relative_addr-0x440)/4];
128     else if (relative_addr >= 0x460 &&
129     relative_addr < 0x470)
130     odata = d->card_firmware_type[
131     (relative_addr-0x460)/4];
132     else {
133     debug("?");
134     }
135     }
136    
137     /*
138     * If this slot is empty, return an error so that a DBE
139     * exception is caused. (This is the way DECstation operating
140     * systems have to detect the absence of cards in a
141     * TURBOchannel slot.)
142     *
143     * NOTE: The Sprite kernel reads from offsets 0x3e0..0x400
144     * without handling the DBE exception, and both Ultrix and
145     * NetBSD seem to detect the DBE exception using addresses
146     * around offset 0x0 or 0x3c0000. This code seems to work
147     * with all of the those OS kernels:
148     */
149     if (d->card_module_name[0] == ' ') {
150     /* Return no data for empty slot: */
151     odata = 0;
152    
153     /* Return DBE exception in some cases: */
154     if (relative_addr < 0x3e0 || relative_addr >= 0x500)
155     return 0;
156     }
157    
158     debug(") ]\n");
159     } else {
160     /* debug("[ turbochannel: write to 0x%08lx: 0x%08x ]\n",
161     (long)relative_addr, (int)idata); */
162     }
163    
164     if (writeflag == MEM_READ)
165     memory_writemax64(cpu, data, len, odata);
166    
167     return 1;
168     }
169    
170    
171     /*
172     * dev_turbochannel_init():
173     *
174     * This is a generic turbochannel card device. device_name should point
175     * to a string such as "PMAG-BA".
176     *
177     * TODO: When running for example dual-head, maybe the name of each
178     * framebuffer should include the card slot number?
179     */
180     void dev_turbochannel_init(struct machine *machine, struct memory *mem,
181     int slot_nr, uint64_t baseaddr, uint64_t endaddr,
182     char *device_name, int irq)
183     {
184     struct vfb_data *fb;
185     struct turbochannel_data *d;
186 dpavlin 10 int rom_offset=0x3c0000, rom_length=DEV_TURBOCHANNEL_LEN, rom_skip=0;
187 dpavlin 4 char *name2;
188 dpavlin 10 size_t nlen;
189 dpavlin 4
190     if (device_name == NULL)
191     return;
192    
193     if (strlen(device_name) > 8) {
194     fprintf(stderr, "dev_turbochannel_init(): bad device_name\n");
195     exit(1);
196     }
197    
198     d = malloc(sizeof(struct turbochannel_data));
199     if (d == NULL) {
200     fprintf(stderr, "out of memory\n");
201     exit(1);
202     }
203     memset(d, 0, sizeof(struct turbochannel_data));
204     d->slot_nr = slot_nr;
205     d->baseaddr = baseaddr;
206     d->endaddr = endaddr;
207     d->irq = irq;
208    
209 dpavlin 10 strlcpy(d->device_name, device_name, DEVICE_NAME_BUFLEN);
210 dpavlin 4
211 dpavlin 10 strncpy(d->card_firmware_version, "V5.3a ", CARD_NAME_BUFLEN);
212     strncpy(d->card_vendor_name, "DEC ", CARD_NAME_BUFLEN);
213     strncpy(d->card_firmware_type, "TCF0", CARD_FIRMWARE_BUFLEN);
214 dpavlin 4
215     memset(d->card_module_name, ' ', 8);
216 dpavlin 10 memcpy(d->card_module_name, device_name, strlen(device_name));
217 dpavlin 4
218     /*
219     * According to NetBSD/pmax:
220     *
221     * PMAD-AA: le1 at tc0 slot 2 offset 0x0: address 00:00:00:00:00:00
222     * PMAG-AA: mfb0 at tc0 slot 2 offset 0x0: 1280x1024x8
223     * PMAG-BA: cfb0 at tc0 slot 2 offset 0x0cfb0: 1024x864x8
224     * PMAG-CA: px0 at tc0 slot 2 offset 0x0: 2D, 4x1 stamp, 8 plane
225     * (PMAG-DA,EA,FA,FB are also pixelstamps)
226     * PMAG-DV: xcfb0 at tc0 slot 2 offset 0x0: 1024x768x8
227     * PMAG-JA: "truecolor" in Ultrix
228     * PMAGB-BA: sfb0 at tc0 slot 0 offset 0x0: 0x0x8
229     * PMAGB-VA: sfb0 at tc0 slot 2 offset 0x0: 0x0x8
230     * PMAZ-AA: asc0 at tc0 slot 2 offset 0x0: NCR53C94, 25MHz, SCSI ID 7
231     *
232     * PMAF-FA: fta0 at tc0 slot 0 (fddi network, "DEC", "V1.0b")
233     */
234    
235     if (strcmp(device_name, "PMAD-AA")==0) {
236     /* le in NetBSD, Lance ethernet */
237     dev_le_init(machine, mem, baseaddr, 0, 0, irq, DEV_LE_LENGTH);
238     /* One ROM at 0x1c03e0, and one at 0x3c0000. */
239     rom_skip = 0x300;
240     rom_offset = 0x1c0000;
241     rom_length = 0x201000;
242     } else if (strcmp(device_name, "PMAZ-AA")==0) {
243     /* asc in NetBSD, SCSI */
244     dev_asc_init(machine, mem, baseaddr, irq, d,
245     DEV_ASC_DEC, NULL, NULL);
246     rom_offset = 0xc0000;
247     /* There is a copy at 0x0, at least that's where Linux
248     looks for the rom signature */
249     } else if (strcmp(device_name, "PMAG-AA")==0) {
250     /* mfb in NetBSD */
251     fb = dev_fb_init(machine, mem, baseaddr + VFB_MFB_VRAM,
252 dpavlin 12 VFB_GENERIC, 1280, 1024, 2048, 1024, 8, device_name);
253 dpavlin 4 /* bt455 = palette, bt431 = cursor */
254     dev_bt455_init(mem, baseaddr + VFB_MFB_BT455, fb);
255     dev_bt431_init(mem, baseaddr + VFB_MFB_BT431, fb, 8);
256     rom_offset = 0;
257     } else if (strcmp(device_name, "PMAG-BA")==0) {
258     /* cfb in NetBSD */
259     fb = dev_fb_init(machine, mem, baseaddr, VFB_GENERIC,
260 dpavlin 12 1024,864, 1024,1024,8, device_name);
261 dpavlin 4 dev_bt459_init(machine, mem, baseaddr + VFB_CFB_BT459,
262     baseaddr + 0x300000, fb, 8, irq, BT459_BA);
263     /* ROM at both 0x380000 and 0x3c0000? */
264     rom_offset = 0x380000;
265     rom_length = 0x080000;
266     } else if (strcmp(device_name, "PMAGB-BA")==0) {
267     /* sfb in NetBSD */
268     /* TODO: This is not working with Ultrix yet. */
269     fb = dev_fb_init(machine, mem, baseaddr + SFB_OFFSET_VRAM,
270 dpavlin 12 VFB_GENERIC, 1280,1024, 1280,1024,8, device_name);
271 dpavlin 4 dev_sfb_init(machine, mem, baseaddr + SFB_ASIC_OFFSET, fb);
272     /* TODO: the CLEAR doesn't get through, as the address
273     range is already in use by the asic */
274     dev_bt459_init(machine, mem, baseaddr + SFB_OFFSET_BT459,
275     baseaddr + SFB_CLEAR, fb, 8, irq, BT459_BBA);
276     rom_offset = 0x0; /* ? TODO */
277     } else if (strcmp(device_name, "PMAG-CA")==0) {
278     /* px in NetBSD */
279     dev_px_init(machine, mem, baseaddr, DEV_PX_TYPE_PX, irq);
280     rom_offset = 0x3c0000;
281     } else if (strcmp(device_name, "PMAG-DA")==0) {
282     /* pxg in NetBSD */
283     dev_px_init(machine, mem, baseaddr, DEV_PX_TYPE_PXG, irq);
284     rom_offset = 0x3c0000;
285     } else if (strcmp(device_name, "PMAG-EA")==0) {
286     /* pxg+ in NetBSD: TODO (not supported by the kernel
287     I've tried) */
288     fatal("TODO (see dev_turbochannel.c)\n");
289     rom_offset = 0x3c0000;
290     } else if (strcmp(device_name, "PMAG-FA")==0) {
291     /* "pxg+ Turbo" in NetBSD */
292     dev_px_init(machine, mem, baseaddr,
293     DEV_PX_TYPE_PXGPLUSTURBO, irq);
294     rom_offset = 0x3c0000;
295     } else if (strcmp(device_name, "PMAG-DV")==0) {
296     /* xcfb in NetBSD: TODO */
297     fb = dev_fb_init(machine, mem, baseaddr + 0x2000000,
298 dpavlin 12 VFB_DEC_MAXINE, 0, 0, 0, 0, 0, "PMAG-DV");
299 dpavlin 4 /* TODO: not yet usable, needs a IMS332 vdac */
300     rom_offset = 0x3c0000;
301     } else if (strcmp(device_name, "PMAG-JA")==0) {
302     /* "Truecolor", mixed 8- and 24-bit */
303     dev_pmagja_init(machine, mem, baseaddr, irq);
304     rom_offset = 0; /* NOTE: 0, not 0x3c0000 */
305     } else if (strcmp(device_name, "PMAG-RO")==0) {
306     /* This works at least B/W in Ultrix, so far. */
307     fb = dev_fb_init(machine, mem, baseaddr + 0x200000,
308 dpavlin 12 VFB_GENERIC, 1280,1024, 1280,1024, 8, "PMAG-RO");
309 dpavlin 4 /* TODO: bt463 at offset 0x040000, not bt459 */
310     dev_bt459_init(machine, mem, baseaddr + 0x40000, 0,
311     fb, 8, irq, 0); /* TODO: type */
312     dev_bt431_init(mem, baseaddr + 0x40010, fb, 8); /* cursor */
313     rom_offset = 0x3c0000;
314     } else if (device_name[0] == '\0') {
315     /* If this slot is empty, then occupy the entire
316     4MB slot address range: */
317     rom_offset = 0;
318     rom_length = 4*1048576;
319     } else {
320     fatal("warning: unknown TURBOchannel device name \"%s\"\n",
321     device_name);
322     }
323    
324     d->rom_skip = rom_skip;
325    
326 dpavlin 10 nlen = strlen(device_name) + 30;
327     name2 = malloc(nlen);
328 dpavlin 4 if (name2 == NULL) {
329     fprintf(stderr, "out of memory in dev_turbochannel_init()\n");
330     exit(1);
331     }
332     if (*device_name)
333 dpavlin 10 snprintf(name2, nlen, "turbochannel [%s]", device_name);
334 dpavlin 4 else
335 dpavlin 10 snprintf(name2, nlen, "turbochannel");
336 dpavlin 4
337     memory_device_register(mem, name2, baseaddr + rom_offset + rom_skip,
338     rom_length-rom_skip, dev_turbochannel_access, d, MEM_DEFAULT, NULL);
339     }
340    

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