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/* |
/* |
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* Copyright (C) 2003-2005 Anders Gavare. All rights reserved. |
* Copyright (C) 2003-2006 Anders Gavare. All rights reserved. |
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* |
* |
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* Redistribution and use in source and binary forms, with or without |
* Redistribution and use in source and binary forms, with or without |
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* modification, are permitted provided that the following conditions are met: |
* modification, are permitted provided that the following conditions are met: |
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* SUCH DAMAGE. |
* SUCH DAMAGE. |
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* |
* |
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* |
* |
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* $Id: dev_sii.c,v 1.13 2005/02/11 09:53:48 debug Exp $ |
* $Id: dev_sii.c,v 1.17 2006/03/04 12:38:48 debug Exp $ |
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* |
* |
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* SII SCSI controller, used in some DECstation systems. |
* SII SCSI controller, used in some DECstation systems. |
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* |
* |
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/* |
/* |
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* dev_sii_access(): |
* dev_sii_access(): |
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*/ |
*/ |
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int dev_sii_access(struct cpu *cpu, struct memory *mem, |
DEVICE_ACCESS(sii) |
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uint64_t relative_addr, unsigned char *data, size_t len, |
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int writeflag, void *extra) |
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{ |
{ |
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uint64_t idata = 0, odata = 0; |
uint64_t idata = 0, odata = 0; |
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int regnr; |
int regnr; |
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} |
} |
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dev_sii_tick(cpu, extra); |
dev_sii_tick(cpu, extra); |
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idata = memory_readmax64(cpu, data, len); |
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if (writeflag == MEM_WRITE) |
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idata = memory_readmax64(cpu, data, len); |
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regnr = relative_addr / 2; |
regnr = relative_addr / 2; |
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odata = d->regs[regnr]; |
odata = d->regs[regnr]; |
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d->regs = (uint16_t *) &d->siiregs; |
d->regs = (uint16_t *) &d->siiregs; |
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memory_device_register(mem, "sii", baseaddr, DEV_SII_LENGTH, |
memory_device_register(mem, "sii", baseaddr, DEV_SII_LENGTH, |
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dev_sii_access, (void *)d, MEM_DEFAULT, NULL); |
dev_sii_access, (void *)d, DM_DEFAULT, NULL); |
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machine_add_tickfunction(machine, dev_sii_tick, d, SII_TICK_SHIFT); |
machine_add_tickfunction(machine, dev_sii_tick, d, |
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SII_TICK_SHIFT, 0.0); |
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} |
} |
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